Pipelining
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Pipelining is a technique that exploits parallelism among the
instructions in a sequential stream.
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The pipeline is broken into stages, where each stage will take
a single clock cycle.
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The stages described in the text are:
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IF - Instruction Fetch
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ID - Instruction Decode and register file read
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EX - EXecution or address calculation
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MEM - data MEMory access
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WB - Write Back
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Pipelining is similar to the multicycle implementation, but instead
of starting the next instruction after the last step of the current
instruction, we overlap the steps.
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