COP 4610: Operating Systems & Concurrent Programming

Processes: Abstract Model & Implementation

 

Topics


This set of slides amounts to an outline of topics from Chapter 3 of the textbook. The figures and tables are also taken from the textbook. For the corresponding detailed narrative, you can read the text directly. When I covered the previous generation of these slides in class, the previous term this course was offered, I felt I was wasting class time, since the material is explained perfectly well in the text. I have posted them here for the benefit of those who may find them useful. If we have enough time in class left after the Unix-specific material you need for your programming assignments, I may use them, but it is very unlikely we will cover all of them in class. Do not be misled by this into thinking you are not expected to read Chapter 3 of the textbook.


Major Requirements of an Operating System

Why do we need multiple processes?


The main reason is that the I/O activities are much slower than computation, so if we did not have the ability to interleave execution of more than one process the processor would be idle (waiting for I/O operations to complete) most of the time.


Process


Varying Terminology -- A Problem for Students


Processes in a Non-Virtual Memory System

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


This example supposesx the processes are implemented without virtual memory, so the real (physical) memory addresses are used. Please do not be confused by this. In our discussion of Unix processes we have assumed each process has its own independent logical address space. The textbook will get around to that (more modern) model later. The author just chooses to start by explaining how processes work with this older, more primitive memory model.


Traces of Individual Processes

Trace of Process ATrace of Process BTrace of Process C
5000800012000
5001800112001
5002800212002
5003800312003
5004 12004
5005 12005
5006 12006
5007 12007
5008 12008
5009 12009
5010 12010
5011 12011

Combined Traces of Processes

Inst. CycleInst. Address  Inst. CycleInst. Address 
15000  2712004 
25001  2812005 
35002  ----Time out
45003  29100 
55004  30101 
65005  31102 
----Time out  32103 
7100  33104 
8101  34105 
9102  355006 
10103  365007 
11104  375008 
12105  385009 
138000  395010 
148001  405011 
158002  ----Time out
168003  41100 
----I/O request 42101 
17100  43102 
18101  44103 
19102  45104 
20103  46105 
21104  4712006 
22105  4812007 
2312000  4912008 
2412001  5012009 
2512002  5112010 
2612003  5212011 
    --Time out

Orange shaded areas indicate execution of the dispatcher.


Two-State Process Model

Process may be in one of two states:


Two-State Process Model

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Queue for Not-Running Processes

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Reasons for Process Creation

examples:


Reasons for Process Termination


A Closer Look at Not-Running Processes

Dispatcher cannot just select the process that has been in the queue the longest, because it may be blocked


A Five-State Process Model


Five-State Process Model

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Process States for Trace Shown Earlier

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Adding a Queue for Blocked Processes

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Multiple Event Queues

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Suspended Processes

Suspended State

Terminology Warning: This usage of "suspend" is not universal. Some authors use the term slightly differently.


Process Model with One Suspend State

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Process Model with Two Suspend States

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Reasons for Process Suspension

Swapping
OS needs memory for another process
Other OS Reason
operator intervention, performance tuning, etc.
Interactive User Request
e.g., CTL-I from terminal
Timing
process requests sleep until specified time
Parent process request
job control

Processes & Resources

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.

Shows snapshot of resource allocation at one instant in time.


Operating System Control (Internal) Data Structures


Memory Tables


I/O Tables


File Tables


Process Table


Process Location


Operating System Control Tables

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Process Control Block


Process Control Block - Process Identification

Information that may be stored in the process control block includes:


Process Control Block - Processor State Information


Each process has one or more last-in-first-out (LIFO) system stacks associated with it. A stack is used to store parameters and calling addresses for procedure and system calls. The stack pointer points to the top of the stack.


Process Control Block - Process Control Information


The process state and other scheduling information is needed by the OS to perform its scheduling function.


Process Control Block - More Process Control Information


User Processes in Virtual Memory

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Processor State Information - Registers


Pentium II EFLAGS Register

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Modes of Execution


Process Creation


When to Switch a Process


Change of Process State


Execution of the Operating System

Note:These are idealized models. An actual OS will typically use a combination of these models.


Non-process Kernel

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


OS Functions Execute Within User Processes

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Process Image - OS Executes in User Space

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


Process-Based Operating System

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.


UNIX SVR4 Process Management


Unix Process States

User Running
executing in user mode
Kernel Running
executing in kernel mode
Ready to Run, in Memory
ready to run as soon as kernel schedules it
Asleep in Memory
waiting for an event, and in memory
Ready to Run, Swapped
not in memory; must be swapped in to run
Sleeping, Swapped
waiting for an event, and not in memory
Preempted
returning from kernel mode; kernel scheduled a higher priority process
Created
exists, but not yet ready to run
Zombie
terminated, but exit status is held for parent to collect

Unix Process State Transition Diagram

Figure © Prentice Hall. Reproduced here from Operating Systems, Internals and Design Principles (4th Edition) by permission of publisher.

Figures and tables © Prentice Hall. Topic outline abstracted from Operating Systems, Internals and Design Principles © Prentice Hall starting from Powerpoint Slides originally prepared by Patricia Roy © Prentice Hall. New content © 2002, 2005 T. P. Baker & Florida State University. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without written permission. (Last updated by $Author: cop4610 $ on $Date: 2002/09/02 20:27:19 $.)