#ifndef __I2C_H
#define __I2C_H

/*
 * i2c.h
 */

#include "hrt_types.h"

extern int hrt_i2c_init_device(hrt_dev_t* dev);
extern void hrt_i2c_release(hrt_dev_t *hrtdev);

/* ID tag */
#define HRT_I2C_HW_B  0xDE

/* bit info */
#define HRT_I2C_SCL   0x01
#define HRT_I2C_SDA   0x02

/* HRT_CONTROL_OFFSET is the offset of the I2C bus control port
   0x2000 = 8192 = 2^13 */
#define HRT_CONTROL_OFFSET 0x2000
#define HRT_CONTROL(addr) (addr + HRT_CONTROL_OFFSET)

#define I2C_CONTROL(addr) (addr + HRT_I2C_REG)

#define I2C_POKE(addr,data) { writeb(data,I2C_CONTROL(addr)); wmb(); }
#define I2C_PEEK(addr) (readb(I2C_CONTROL(addr)))
//static inline unsigned char I2C_PEEK(unsigned long addr)
//{ unsigned char c = readb(I2C_CONTROL(addr)); rmb(); return c; }

#define I2C_00(addr) { writeb(0,I2C_CONTROL(addr)); wmb(); }
#define I2C_10(addr) { writeb(1,I2C_CONTROL(addr)); wmb(); }
#define I2C_01(addr) { writeb(2,I2C_CONTROL(addr)); wmb(); }
#define I2C_11(addr) { writeb(3,I2C_CONTROL(addr)); wmb(); }

/* bit 7 at 0x2000 (the HRT512-8 control register) tells whether
   the CPU is sending data across the I2C bus */
#define I2C_BUSY(addr) (!(readb(HRT_CONTROL(addr)) & 0x80))
//static inline unsigned char I2C_BUSY(unsigned long addr) 
//{ unsigned char c = readb_p(HRT_CONTROL(addr)) & 0x80; rmb(); return c; }

#endif