1 /*
2 * SH7760 ("camelot") DMABRG audio DMA unit support
3 *
4 * Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
5 * licensed under the terms outlined in the file COPYING at the root
6 * of the linux kernel sources.
7 *
8 * The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
9 * trigger an interrupt when one half of the programmed transfer size
10 * has been xmitted.
11 *
12 * FIXME: little-endian only for now
13 */
14
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <asm/dmabrg.h>
24
25
26 /* registers and bits */
27 #define BRGATXSAR 0x00
28 #define BRGARXDAR 0x04
29 #define BRGATXTCR 0x08
30 #define BRGARXTCR 0x0C
31 #define BRGACR 0x10
32 #define BRGATXTCNT 0x14
33 #define BRGARXTCNT 0x18
34
35 #define ACR_RAR (1 << 18)
36 #define ACR_RDS (1 << 17)
37 #define ACR_RDE (1 << 16)
38 #define ACR_TAR (1 << 2)
39 #define ACR_TDS (1 << 1)
40 #define ACR_TDE (1 << 0)
41
42 /* receiver/transmitter data alignment */
43 #define ACR_RAM_NONE (0 << 24)
44 #define ACR_RAM_4BYTE (1 << 24)
45 #define ACR_RAM_2WORD (2 << 24)
46 #define ACR_TAM_NONE (0 << 8)
47 #define ACR_TAM_4BYTE (1 << 8)
48 #define ACR_TAM_2WORD (2 << 8)
49
50
51 struct camelot_pcm {
52 unsigned long mmio; /* DMABRG audio channel control reg MMIO */
53 unsigned int txid; /* ID of first DMABRG IRQ for this unit */
54
55 struct snd_pcm_substream *tx_ss;
56 unsigned long tx_period_size;
57 unsigned int tx_period;
58
59 struct snd_pcm_substream *rx_ss;
60 unsigned long rx_period_size;
61 unsigned int rx_period;
62
63 } cam_pcm_data[2] = {
64 {
65 .mmio = 0xFE3C0040,
66 .txid = DMABRGIRQ_A0TXF,
67 },
68 {
69 .mmio = 0xFE3C0060,
70 .txid = DMABRGIRQ_A1TXF,
71 },
72 };
73
74 #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
75
76 /*
77 * set a minimum of 16kb per period, to avoid interrupt-"storm" and
78 * resulting skipping. In general, the bigger the minimum size, the
79 * better for overall system performance. (The SH7760 is a puny CPU
80 * with a slow SDRAM interface and poor internal bus bandwidth,
81 * *especially* when the LCDC is active). The minimum for the DMAC
82 * is 8 bytes; 16kbytes are enough to get skip-free playback of a
83 * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
84 * reasonable responsiveness in MPlayer.
85 */
86 #define DMABRG_PERIOD_MIN 16 * 1024
87 #define DMABRG_PERIOD_MAX 0x03fffffc
88 #define DMABRG_PREALLOC_BUFFER 32 * 1024
89 #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
90
91 /* support everything the SSI supports */
92 #define DMABRG_RATES \
93 SNDRV_PCM_RATE_8000_192000
94
95 #define DMABRG_FMTS \
96 (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
97 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
98 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \
99 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
100 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
101
102 static struct snd_pcm_hardware camelot_pcm_hardware = {
103 .info = (SNDRV_PCM_INFO_MMAP |
104 SNDRV_PCM_INFO_INTERLEAVED |
105 SNDRV_PCM_INFO_BLOCK_TRANSFER |
106 SNDRV_PCM_INFO_MMAP_VALID),
107 .formats = DMABRG_FMTS,
108 .rates = DMABRG_RATES,
109 .rate_min = 8000,
110 .rate_max = 192000,
111 .channels_min = 2,
112 .channels_max = 8, /* max of the SSI */
113 .buffer_bytes_max = DMABRG_PERIOD_MAX,
114 .period_bytes_min = DMABRG_PERIOD_MIN,
115 .period_bytes_max = DMABRG_PERIOD_MAX / 2,
116 .periods_min = 2,
117 .periods_max = 2,
118 .fifo_size = 128,
119 };
120
121 static void camelot_txdma(void *data)
122 {
123 struct camelot_pcm *cam = data;
124 cam->tx_period ^= 1;
125 snd_pcm_period_elapsed(cam->tx_ss);
126 }
127
128 static void camelot_rxdma(void *data)
129 {
130 struct camelot_pcm *cam = data;
131 cam->rx_period ^= 1;
132 snd_pcm_period_elapsed(cam->rx_ss);
133 }
134
135 static int camelot_pcm_open(struct snd_pcm_substream *substream)
136 {
137 struct snd_soc_pcm_runtime *rtd = substream->private_data;
138 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
139 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
140 int ret, dmairq;
141
142 snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
143
144 /* DMABRG buffer half/full events */
145 dmairq = (recv) ? cam->txid + 2 : cam->txid;
146 if (recv) {
147 cam->rx_ss = substream;
148 ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
149 if (unlikely(ret)) {
150 pr_debug("audio unit %d irqs already taken!\n",
151 rtd->dai->cpu_dai->id);
152 return -EBUSY;
153 }
154 (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
155 } else {
156 cam->tx_ss = substream;
157 ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
158 if (unlikely(ret)) {
159 pr_debug("audio unit %d irqs already taken!\n",
160 rtd->dai->cpu_dai->id);
161 return -EBUSY;
162 }
163 (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
164 }
165 return 0;
166 }
167
168 static int camelot_pcm_close(struct snd_pcm_substream *substream)
169 {
170 struct snd_soc_pcm_runtime *rtd = substream->private_data;
171 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
172 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
173 int dmairq;
174
175 dmairq = (recv) ? cam->txid + 2 : cam->txid;
176
177 if (recv)
178 cam->rx_ss = NULL;
179 else
180 cam->tx_ss = NULL;
181
182 dmabrg_free_irq(dmairq + 1);
183 dmabrg_free_irq(dmairq);
184
185 return 0;
186 }
187
188 static int camelot_hw_params(struct snd_pcm_substream *substream,
189 struct snd_pcm_hw_params *hw_params)
190 {
191 struct snd_soc_pcm_runtime *rtd = substream->private_data;
192 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
193 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
194 int ret;
195
196 ret = snd_pcm_lib_malloc_pages(substream,
197 params_buffer_bytes(hw_params));
198 if (ret < 0)
199 return ret;
200
201 if (recv) {
202 cam->rx_period_size = params_period_bytes(hw_params);
203 cam->rx_period = 0;
204 } else {
205 cam->tx_period_size = params_period_bytes(hw_params);
206 cam->tx_period = 0;
207 }
208 return 0;
209 }
210
211 static int camelot_hw_free(struct snd_pcm_substream *substream)
212 {
213 return snd_pcm_lib_free_pages(substream);
214 }
215
216 static int camelot_prepare(struct snd_pcm_substream *substream)
217 {
218 struct snd_pcm_runtime *runtime = substream->runtime;
219 struct snd_soc_pcm_runtime *rtd = substream->private_data;
220 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
221
222 pr_debug("PCM data: addr 0x%08ulx len %d\n",
223 (u32)runtime->dma_addr, runtime->dma_bytes);
224
225 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
226 BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
227 BRGREG(BRGATXTCR) = runtime->dma_bytes;
228 } else {
229 BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
230 BRGREG(BRGARXTCR) = runtime->dma_bytes;
231 }
232
233 return 0;
234 }
235
236 static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
237 {
238 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
239 /* start DMABRG engine: XFER start, auto-addr-reload */
240 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
241 }
242
243 static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
244 {
245 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
246 /* forcibly terminate data transmission */
247 BRGREG(BRGACR) = acr | ACR_TDS;
248 }
249
250 static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
251 {
252 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
253 /* start DMABRG engine: recv start, auto-reload */
254 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
255 }
256
257 static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
258 {
259 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
260 /* forcibly terminate data receiver */
261 BRGREG(BRGACR) = acr | ACR_RDS;
262 }
263
264 static int camelot_trigger(struct snd_pcm_substream *substream, int cmd)
265 {
266 struct snd_soc_pcm_runtime *rtd = substream->private_data;
267 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
268 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
269
270 switch (cmd) {
271 case SNDRV_PCM_TRIGGER_START:
272 if (recv)
273 dmabrg_rec_dma_start(cam);
274 else
275 dmabrg_play_dma_start(cam);
276 break;
277 case SNDRV_PCM_TRIGGER_STOP:
278 if (recv)
279 dmabrg_rec_dma_stop(cam);
280 else
281 dmabrg_play_dma_stop(cam);
282 break;
283 default:
284 return -EINVAL;
285 }
286
287 return 0;
288 }
289
290 static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream)
291 {
292 struct snd_pcm_runtime *runtime = substream->runtime;
293 struct snd_soc_pcm_runtime *rtd = substream->private_data;
294 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
295 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
296 unsigned long pos;
297
298 /* cannot use the DMABRG pointer register: under load, by the
299 * time ALSA comes around to read the register, it is already
300 * far ahead (or worse, already done with the fragment) of the
301 * position at the time the IRQ was triggered, which results in
302 * fast-playback sound in my test application (ScummVM)
303 */
304 if (recv)
305 pos = cam->rx_period ? cam->rx_period_size : 0;
306 else
307 pos = cam->tx_period ? cam->tx_period_size : 0;
308
309 return bytes_to_frames(runtime, pos);
310 }
311
312 static struct snd_pcm_ops camelot_pcm_ops = {
313 .open = camelot_pcm_open,
314 .close = camelot_pcm_close,
315 .ioctl = snd_pcm_lib_ioctl,
316 .hw_params = camelot_hw_params,
317 .hw_free = camelot_hw_free,
318 .prepare = camelot_prepare,
319 .trigger = camelot_trigger,
320 .pointer = camelot_pos,
321 };
322
323 static void camelot_pcm_free(struct snd_pcm *pcm)
324 {
325 snd_pcm_lib_preallocate_free_for_all(pcm);
326 }
327
328 static int camelot_pcm_new(struct snd_card *card,
329 struct snd_soc_codec_dai *dai,
330 struct snd_pcm *pcm)
331 {
332 /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
333 * in MMAP mode (i.e. aplay -M)
334 */
335 snd_pcm_lib_preallocate_pages_for_all(pcm,
336 SNDRV_DMA_TYPE_CONTINUOUS,
337 snd_dma_continuous_data(GFP_KERNEL),
338 DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
339
340 return 0;
341 }
342
343 struct snd_soc_platform sh7760_soc_platform = {
344 .name = "sh7760-pcm",
345 .pcm_ops = &camelot_pcm_ops,
346 .pcm_new = camelot_pcm_new,
347 .pcm_free = camelot_pcm_free,
348 };
349 EXPORT_SYMBOL_GPL(sh7760_soc_platform);
350
351 MODULE_LICENSE("GPL");
352 MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
353 MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
354
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