Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ]
Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /* sound/soc/s3c24xx/s3c2412-i2s.c
  2  *
  3  * ALSA Soc Audio Layer - S3C2412 I2S driver
  4  *
  5  * Copyright (c) 2006 Wolfson Microelectronics PLC.
  6  *      Graeme Gregory graeme.gregory@wolfsonmicro.com
  7  *      linux@wolfsonmicro.com
  8  *
  9  * Copyright (c) 2007, 2004-2005 Simtec Electronics
 10  *      http://armlinux.simtec.co.uk/
 11  *      Ben Dooks <ben@simtec.co.uk>
 12  *
 13  * This program is free software; you can redistribute  it and/or modify it
 14  * under  the terms of  the GNU General  Public License as published by the
 15  * Free Software Foundation;  either version 2 of the  License, or (at your
 16  * option) any later version.
 17  */
 18 
 19 #include <linux/init.h>
 20 #include <linux/module.h>
 21 #include <linux/device.h>
 22 #include <linux/delay.h>
 23 #include <linux/gpio.h>
 24 #include <linux/clk.h>
 25 #include <linux/kernel.h>
 26 #include <linux/io.h>
 27 
 28 #include <sound/core.h>
 29 #include <sound/pcm.h>
 30 #include <sound/pcm_params.h>
 31 #include <sound/initval.h>
 32 #include <sound/soc.h>
 33 #include <mach/hardware.h>
 34 
 35 #include <plat/regs-s3c2412-iis.h>
 36 
 37 #include <plat/audio.h>
 38 #include <mach/regs-gpio.h>
 39 #include <mach/dma.h>
 40 
 41 #include "s3c24xx-pcm.h"
 42 #include "s3c2412-i2s.h"
 43 
 44 #define S3C2412_I2S_DEBUG 0
 45 
 46 static struct s3c2410_dma_client s3c2412_dma_client_out = {
 47         .name           = "I2S PCM Stereo out"
 48 };
 49 
 50 static struct s3c2410_dma_client s3c2412_dma_client_in = {
 51         .name           = "I2S PCM Stereo in"
 52 };
 53 
 54 static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_out = {
 55         .client         = &s3c2412_dma_client_out,
 56         .channel        = DMACH_I2S_OUT,
 57         .dma_addr       = S3C2410_PA_IIS + S3C2412_IISTXD,
 58         .dma_size       = 4,
 59 };
 60 
 61 static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_in = {
 62         .client         = &s3c2412_dma_client_in,
 63         .channel        = DMACH_I2S_IN,
 64         .dma_addr       = S3C2410_PA_IIS + S3C2412_IISRXD,
 65         .dma_size       = 4,
 66 };
 67 
 68 static struct s3c_i2sv2_info s3c2412_i2s;
 69 
 70 /*
 71  * Set S3C2412 Clock source
 72  */
 73 static int s3c2412_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
 74                                   int clk_id, unsigned int freq, int dir)
 75 {
 76         u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
 77 
 78         pr_debug("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id,
 79             freq, dir);
 80 
 81         switch (clk_id) {
 82         case S3C2412_CLKSRC_PCLK:
 83                 s3c2412_i2s.master = 1;
 84                 iismod &= ~S3C2412_IISMOD_MASTER_MASK;
 85                 iismod |= S3C2412_IISMOD_MASTER_INTERNAL;
 86                 break;
 87         case S3C2412_CLKSRC_I2SCLK:
 88                 s3c2412_i2s.master = 0;
 89                 iismod &= ~S3C2412_IISMOD_MASTER_MASK;
 90                 iismod |= S3C2412_IISMOD_MASTER_EXTERNAL;
 91                 break;
 92         default:
 93                 return -EINVAL;
 94         }
 95 
 96         writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
 97         return 0;
 98 }
 99 
100 
101 struct clk *s3c2412_get_iisclk(void)
102 {
103         return s3c2412_i2s.iis_clk;
104 }
105 EXPORT_SYMBOL_GPL(s3c2412_get_iisclk);
106 
107 
108 static int s3c2412_i2s_probe(struct platform_device *pdev,
109                              struct snd_soc_dai *dai)
110 {
111         int ret;
112 
113         pr_debug("Entered %s\n", __func__);
114 
115         ret = s3c_i2sv2_probe(pdev, dai, &s3c2412_i2s, S3C2410_PA_IIS);
116         if (ret)
117                 return ret;
118 
119         s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in;
120         s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out;
121 
122         s3c2412_i2s.iis_cclk = clk_get(&pdev->dev, "i2sclk");
123         if (s3c2412_i2s.iis_cclk == NULL) {
124                 pr_err("failed to get i2sclk clock\n");
125                 iounmap(s3c2412_i2s.regs);
126                 return -ENODEV;
127         }
128 
129         /* Set MPLL as the source for IIS CLK */
130 
131         clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
132         clk_enable(s3c2412_i2s.iis_cclk);
133 
134         s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk;
135 
136         /* Configure the I2S pins in correct mode */
137         s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
138         s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK);
139         s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK);
140         s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
141         s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
142 
143         return 0;
144 }
145 
146 #define S3C2412_I2S_RATES \
147         (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
148         SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
149         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
150 
151 static struct snd_soc_dai_ops s3c2412_i2s_dai_ops = {
152         .set_sysclk     = s3c2412_i2s_set_sysclk,
153 };
154 
155 struct snd_soc_dai s3c2412_i2s_dai = {
156         .name           = "s3c2412-i2s",
157         .id             = 0,
158         .probe          = s3c2412_i2s_probe,
159         .playback = {
160                 .channels_min   = 2,
161                 .channels_max   = 2,
162                 .rates          = S3C2412_I2S_RATES,
163                 .formats        = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
164         },
165         .capture = {
166                 .channels_min   = 2,
167                 .channels_max   = 2,
168                 .rates          = S3C2412_I2S_RATES,
169                 .formats        = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
170         },
171         .ops = &s3c2412_i2s_dai_ops,
172 };
173 EXPORT_SYMBOL_GPL(s3c2412_i2s_dai);
174 
175 static int __init s3c2412_i2s_init(void)
176 {
177         return  s3c_i2sv2_register_dai(&s3c2412_i2s_dai);
178 }
179 module_init(s3c2412_i2s_init);
180 
181 static void __exit s3c2412_i2s_exit(void)
182 {
183         snd_soc_unregister_dai(&s3c2412_i2s_dai);
184 }
185 module_exit(s3c2412_i2s_exit);
186 
187 /* Module information */
188 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
189 MODULE_DESCRIPTION("S3C2412 I2S SoC Interface");
190 MODULE_LICENSE("GPL");
191 
  This page was automatically generated by the LXR engine.