Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * Driver for Digigram VXpocket soundcards
  3  *
  4  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  5  *
  6  *   This program is free software; you can redistribute it and/or modify
  7  *   it under the terms of the GNU General Public License as published by
  8  *   the Free Software Foundation; either version 2 of the License, or
  9  *   (at your option) any later version.
 10  *
 11  *   This program is distributed in the hope that it will be useful,
 12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14  *   GNU General Public License for more details.
 15  *
 16  *   You should have received a copy of the GNU General Public License
 17  *   along with this program; if not, write to the Free Software
 18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 19  */
 20 
 21 #ifndef __VXPOCKET_H
 22 #define __VXPOCKET_H
 23 
 24 #include <sound/vx_core.h>
 25 
 26 #include <pcmcia/cs_types.h>
 27 #include <pcmcia/cs.h>
 28 #include <pcmcia/cistpl.h>
 29 #include <pcmcia/ds.h>
 30 
 31 struct snd_vxp_entry {
 32         dev_info_t *dev_info;
 33 
 34         /* module parameters */
 35         int *index_table;
 36         char **id_table;
 37         int *enable_table;
 38         int *ibl;
 39 
 40         /* h/w config */
 41         struct snd_vx_hardware *hardware;
 42         struct snd_vx_ops *ops;
 43 
 44         /* slots */
 45         vx_core_t *card_list[SNDRV_CARDS];
 46         dev_link_t *dev_list;           /* Linked list of devices */
 47 };
 48 
 49 struct snd_vxpocket {
 50 
 51         vx_core_t core;
 52 
 53         unsigned long port;
 54 
 55         int mic_level;  /* analog mic level (or boost) */
 56 
 57         unsigned int regCDSP;   /* current CDSP register */
 58         unsigned int regDIALOG; /* current DIALOG register */
 59 
 60         int index;
 61         struct snd_vxp_entry *hw_entry;
 62 
 63         /* pcmcia stuff */
 64         dev_link_t link;
 65         dev_node_t node;
 66 };
 67 
 68 extern struct snd_vx_ops snd_vxpocket_ops;
 69 
 70 void vx_set_mic_boost(vx_core_t *chip, int boost);
 71 void vx_set_mic_level(vx_core_t *chip, int level);
 72 
 73 /*
 74  * pcmcia stuff
 75  */
 76 dev_link_t *snd_vxpocket_attach(struct snd_vxp_entry *hw);
 77 void snd_vxpocket_detach(struct snd_vxp_entry *hw, dev_link_t *link);
 78 
 79 int vxp_add_mic_controls(vx_core_t *chip);
 80 
 81 /* Constants used to access the CDSP register (0x08). */
 82 #define CDSP_MAGIC      0xA7    /* magic value (for read) */
 83 /* for write */
 84 #define VXP_CDSP_CLOCKIN_SEL_MASK       0x80    /* 0 (internal), 1 (AES/EBU) */
 85 #define VXP_CDSP_DATAIN_SEL_MASK        0x40    /* 0 (analog), 1 (UER) */
 86 #define VXP_CDSP_SMPTE_SEL_MASK         0x20
 87 #define VXP_CDSP_RESERVED_MASK          0x10
 88 #define VXP_CDSP_MIC_SEL_MASK           0x08
 89 #define VXP_CDSP_VALID_IRQ_MASK         0x04
 90 #define VXP_CDSP_CODEC_RESET_MASK       0x02
 91 #define VXP_CDSP_DSP_RESET_MASK         0x01
 92 /* VXPOCKET 240/440 */
 93 #define P24_CDSP_MICS_SEL_MASK          0x18
 94 #define P24_CDSP_MIC20_SEL_MASK         0x10
 95 #define P24_CDSP_MIC38_SEL_MASK         0x08
 96 
 97 /* Constants used to access the MEMIRQ register (0x0C). */
 98 #define P44_MEMIRQ_MASTER_SLAVE_SEL_MASK 0x08
 99 #define P44_MEMIRQ_SYNCED_ALONE_SEL_MASK 0x04
100 #define P44_MEMIRQ_WCLK_OUT_IN_SEL_MASK  0x02 /* Not used */
101 #define P44_MEMIRQ_WCLK_UER_SEL_MASK     0x01 /* Not used */
102 
103 /* Micro levels (0x0C) */
104 
105 /* Constants used to access the DIALOG register (0x0D). */
106 #define VXP_DLG_XILINX_REPROG_MASK      0x80    /* W */
107 #define VXP_DLG_DATA_XICOR_MASK         0x80    /* R */
108 #define VXP_DLG_RESERVED4_0_MASK        0x40
109 #define VXP_DLG_RESERVED2_0_MASK        0x20
110 #define VXP_DLG_RESERVED1_0_MASK        0x10
111 #define VXP_DLG_DMAWRITE_SEL_MASK       0x08    /* W */
112 #define VXP_DLG_DMAREAD_SEL_MASK        0x04    /* W */
113 #define VXP_DLG_MEMIRQ_MASK             0x02    /* R */
114 #define VXP_DLG_DMA16_SEL_MASK          0x02    /* W */
115 #define VXP_DLG_ACK_MEMIRQ_MASK         0x01    /* R/W */
116 
117 
118 #endif /* __VXPOCKET_H */
119 
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