1 #ifndef AK4396_H_INCLUDED
2 #define AK4396_H_INCLUDED
3
4 #define AK4396_WRITE 0x2000
5
6 #define AK4396_CONTROL_1 0
7 #define AK4396_CONTROL_2 1
8 #define AK4396_CONTROL_3 2
9 #define AK4396_LCH_ATT 3
10 #define AK4396_RCH_ATT 4
11
12 /* control 1 */
13 #define AK4396_RSTN 0x01
14 #define AK4396_DIF_MASK 0x0e
15 #define AK4396_DIF_16_LSB 0x00
16 #define AK4396_DIF_20_LSB 0x02
17 #define AK4396_DIF_24_MSB 0x04
18 #define AK4396_DIF_24_I2S 0x06
19 #define AK4396_DIF_24_LSB 0x08
20 #define AK4396_ACKS 0x80
21 /* control 2 */
22 #define AK4396_SMUTE 0x01
23 #define AK4396_DEM_MASK 0x06
24 #define AK4396_DEM_441 0x00
25 #define AK4396_DEM_OFF 0x02
26 #define AK4396_DEM_48 0x04
27 #define AK4396_DEM_32 0x06
28 #define AK4396_DFS_MASK 0x18
29 #define AK4396_DFS_NORMAL 0x00
30 #define AK4396_DFS_DOUBLE 0x08
31 #define AK4396_DFS_QUAD 0x10
32 #define AK4396_SLOW 0x20
33 #define AK4396_DZFM 0x40
34 #define AK4396_DZFE 0x80
35 /* control 3 */
36 #define AK4396_DZFB 0x04
37 #define AK4396_DCKB 0x10
38 #define AK4396_DCKS 0x20
39 #define AK4396_DSDM 0x40
40 #define AK4396_D_P_MASK 0x80
41 #define AK4396_PCM 0x00
42 #define AK4396_DSD 0x80
43
44 #endif
45
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