1 /*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <sound/driver.h>
26 #include <asm/io.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/slab.h>
32 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/info.h>
35 #include <sound/mpu401.h>
36 #include <sound/initval.h>
37
38 #include <sound/asoundef.h>
39
40 #include "ice1712.h"
41 #include "envy24ht.h"
42
43 /* lowlevel routines */
44 #include "amp.h"
45 #include "revo.h"
46 #include "aureon.h"
47 #include "vt1720_mobo.h"
48 #include "pontis.h"
49 #include "prodigy192.h"
50
51
52 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
53 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
54 MODULE_LICENSE("GPL");
55 MODULE_SUPPORTED_DEVICE("{"
56 REVO_DEVICE_DESC
57 AMP_AUDIO2000_DEVICE_DESC
58 AUREON_DEVICE_DESC
59 VT1720_MOBO_DEVICE_DESC
60 PONTIS_DEVICE_DESC
61 PRODIGY192_DEVICE_DESC
62 "{VIA,VT1720},"
63 "{VIA,VT1724},"
64 "{ICEnsemble,Generic ICE1724},"
65 "{ICEnsemble,Generic Envy24HT}"
66 "{ICEnsemble,Generic Envy24PT}}");
67
68 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
69 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
70 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
71 static char *model[SNDRV_CARDS];
72
73 module_param_array(index, int, NULL, 0444);
74 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
75 module_param_array(id, charp, NULL, 0444);
76 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
77 module_param_array(enable, bool, NULL, 0444);
78 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
79 module_param_array(model, charp, NULL, 0444);
80 MODULE_PARM_DESC(model, "Use the given board model.");
81
82 #ifndef PCI_VENDOR_ID_ICE
83 #define PCI_VENDOR_ID_ICE 0x1412
84 #endif
85 #ifndef PCI_DEVICE_ID_VT1724
86 #define PCI_DEVICE_ID_VT1724 0x1724
87 #endif
88
89 /* Both VT1720 and VT1724 have the same PCI IDs */
90 static struct pci_device_id snd_vt1724_ids[] = {
91 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
92 { 0, }
93 };
94
95 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
96
97
98 static int PRO_RATE_LOCKED;
99 static int PRO_RATE_RESET = 1;
100 static unsigned int PRO_RATE_DEFAULT = 44100;
101
102 /*
103 * Basic I/O
104 */
105
106 /* check whether the clock mode is spdif-in */
107 static inline int is_spdif_master(ice1712_t *ice)
108 {
109 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
110 }
111
112 static inline int is_pro_rate_locked(ice1712_t *ice)
113 {
114 return is_spdif_master(ice) || PRO_RATE_LOCKED;
115 }
116
117 /*
118 * ac97 section
119 */
120
121 static unsigned char snd_vt1724_ac97_ready(ice1712_t *ice)
122 {
123 unsigned char old_cmd;
124 int tm;
125 for (tm = 0; tm < 0x10000; tm++) {
126 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
127 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
128 continue;
129 if (!(old_cmd & VT1724_AC97_READY))
130 continue;
131 return old_cmd;
132 }
133 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
134 return old_cmd;
135 }
136
137 static int snd_vt1724_ac97_wait_bit(ice1712_t *ice, unsigned char bit)
138 {
139 int tm;
140 for (tm = 0; tm < 0x10000; tm++)
141 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
142 return 0;
143 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
144 return -EIO;
145 }
146
147 static void snd_vt1724_ac97_write(ac97_t *ac97,
148 unsigned short reg,
149 unsigned short val)
150 {
151 ice1712_t *ice = (ice1712_t *)ac97->private_data;
152 unsigned char old_cmd;
153
154 old_cmd = snd_vt1724_ac97_ready(ice);
155 old_cmd &= ~VT1724_AC97_ID_MASK;
156 old_cmd |= ac97->num;
157 outb(reg, ICEMT1724(ice, AC97_INDEX));
158 outw(val, ICEMT1724(ice, AC97_DATA));
159 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
160 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
161 }
162
163 static unsigned short snd_vt1724_ac97_read(ac97_t *ac97, unsigned short reg)
164 {
165 ice1712_t *ice = (ice1712_t *)ac97->private_data;
166 unsigned char old_cmd;
167
168 old_cmd = snd_vt1724_ac97_ready(ice);
169 old_cmd &= ~VT1724_AC97_ID_MASK;
170 old_cmd |= ac97->num;
171 outb(reg, ICEMT1724(ice, AC97_INDEX));
172 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
173 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
174 return ~0;
175 return inw(ICEMT1724(ice, AC97_DATA));
176 }
177
178
179 /*
180 * GPIO operations
181 */
182
183 /* set gpio direction 0 = read, 1 = write */
184 static void snd_vt1724_set_gpio_dir(ice1712_t *ice, unsigned int data)
185 {
186 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
187 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
188 }
189
190 /* set the gpio mask (0 = writable) */
191 static void snd_vt1724_set_gpio_mask(ice1712_t *ice, unsigned int data)
192 {
193 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
194 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
195 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
196 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
197 }
198
199 static void snd_vt1724_set_gpio_data(ice1712_t *ice, unsigned int data)
200 {
201 outw(data, ICEREG1724(ice, GPIO_DATA));
202 if (! ice->vt1720)
203 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
204 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
205 }
206
207 static unsigned int snd_vt1724_get_gpio_data(ice1712_t *ice)
208 {
209 unsigned int data;
210 if (! ice->vt1720)
211 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
212 else
213 data = 0;
214 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
215 return data;
216 }
217
218 /*
219 * Interrupt handler
220 */
221
222 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
223 {
224 ice1712_t *ice = dev_id;
225 unsigned char status;
226 int handled = 0;
227
228 while (1) {
229 status = inb(ICEREG1724(ice, IRQSTAT));
230 if (status == 0)
231 break;
232
233 handled = 1;
234 /* these should probably be separated at some point,
235 but as we don't currently have MPU support on the board I will leave it */
236 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
237 if (ice->rmidi[0])
238 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
239 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
240 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
241 }
242 if (status & VT1724_IRQ_MTPCM) {
243 /*
244 * Multi-track PCM
245 * PCM assignment are:
246 * Playback DMA0 (M/C) = playback_pro_substream
247 * Playback DMA1 = playback_con_substream_ds[0]
248 * Playback DMA2 = playback_con_substream_ds[1]
249 * Playback DMA3 = playback_con_substream_ds[2]
250 * Playback DMA4 (SPDIF) = playback_con_substream
251 * Record DMA0 = capture_pro_substream
252 * Record DMA1 = capture_con_substream
253 */
254 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
255 if (mtstat & VT1724_MULTI_PDMA0) {
256 if (ice->playback_pro_substream)
257 snd_pcm_period_elapsed(ice->playback_pro_substream);
258 }
259 if (mtstat & VT1724_MULTI_RDMA0) {
260 if (ice->capture_pro_substream)
261 snd_pcm_period_elapsed(ice->capture_pro_substream);
262 }
263 if (mtstat & VT1724_MULTI_PDMA1) {
264 if (ice->playback_con_substream_ds[0])
265 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
266 }
267 if (mtstat & VT1724_MULTI_PDMA2) {
268 if (ice->playback_con_substream_ds[1])
269 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
270 }
271 if (mtstat & VT1724_MULTI_PDMA3) {
272 if (ice->playback_con_substream_ds[2])
273 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
274 }
275 if (mtstat & VT1724_MULTI_PDMA4) {
276 if (ice->playback_con_substream)
277 snd_pcm_period_elapsed(ice->playback_con_substream);
278 }
279 if (mtstat & VT1724_MULTI_RDMA1) {
280 if (ice->capture_con_substream)
281 snd_pcm_period_elapsed(ice->capture_con_substream);
282 }
283 /* ack anyway to avoid freeze */
284 outb(mtstat, ICEMT1724(ice, IRQ));
285 /* ought to really handle this properly */
286 if (mtstat & VT1724_MULTI_FIFO_ERR) {
287 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
288 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
289 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
290 /* If I don't do this, I get machine lockup due to continual interrupts */
291 }
292
293 }
294 }
295 return IRQ_RETVAL(handled);
296 }
297
298 /*
299 * PCM code - professional part (multitrack)
300 */
301
302 static unsigned int rates[] = {
303 8000, 9600, 11025, 12000, 16000, 22050, 24000,
304 32000, 44100, 48000, 64000, 88200, 96000,
305 176400, 192000,
306 };
307
308 static snd_pcm_hw_constraint_list_t hw_constraints_rates_96 = {
309 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
310 .list = rates,
311 .mask = 0,
312 };
313
314 static snd_pcm_hw_constraint_list_t hw_constraints_rates_48 = {
315 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
316 .list = rates,
317 .mask = 0,
318 };
319
320 static snd_pcm_hw_constraint_list_t hw_constraints_rates_192 = {
321 .count = ARRAY_SIZE(rates),
322 .list = rates,
323 .mask = 0,
324 };
325
326 struct vt1724_pcm_reg {
327 unsigned int addr; /* ADDR register offset */
328 unsigned int size; /* SIZE register offset */
329 unsigned int count; /* COUNT register offset */
330 unsigned int start; /* start & pause bit */
331 };
332
333 static int snd_vt1724_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
334 {
335 ice1712_t *ice = snd_pcm_substream_chip(substream);
336 unsigned char what;
337 unsigned char old;
338 struct list_head *pos;
339 snd_pcm_substream_t *s;
340
341 what = 0;
342 snd_pcm_group_for_each(pos, substream) {
343 struct vt1724_pcm_reg *reg;
344 s = snd_pcm_group_substream_entry(pos);
345 reg = s->runtime->private_data;
346 what |= reg->start;
347 snd_pcm_trigger_done(s, substream);
348 }
349
350 switch (cmd) {
351 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
352 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
353 spin_lock(&ice->reg_lock);
354 old = inb(ICEMT1724(ice, DMA_PAUSE));
355 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
356 old |= what;
357 else
358 old &= ~what;
359 outb(old, ICEMT1724(ice, DMA_PAUSE));
360 spin_unlock(&ice->reg_lock);
361 break;
362
363 case SNDRV_PCM_TRIGGER_START:
364 case SNDRV_PCM_TRIGGER_STOP:
365 spin_lock(&ice->reg_lock);
366 old = inb(ICEMT1724(ice, DMA_CONTROL));
367 if (cmd == SNDRV_PCM_TRIGGER_START)
368 old |= what;
369 else
370 old &= ~what;
371 outb(old, ICEMT1724(ice, DMA_CONTROL));
372 spin_unlock(&ice->reg_lock);
373 break;
374
375 default:
376 return -EINVAL;
377 }
378 return 0;
379 }
380
381 /*
382 */
383
384 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
385 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
386 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
387 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
388
389 static int get_max_rate(ice1712_t *ice)
390 {
391 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
392 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
393 return 192000;
394 else
395 return 96000;
396 } else
397 return 48000;
398 }
399
400 static void snd_vt1724_set_pro_rate(ice1712_t *ice, unsigned int rate, int force)
401 {
402 unsigned long flags;
403 unsigned char val, old;
404 unsigned int i;
405
406 if (rate > get_max_rate(ice))
407 return;
408
409 spin_lock_irqsave(&ice->reg_lock, flags);
410 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
411 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
412 /* running? we cannot change the rate now... */
413 spin_unlock_irqrestore(&ice->reg_lock, flags);
414 return;
415 }
416 if (!force && is_pro_rate_locked(ice)) {
417 spin_unlock_irqrestore(&ice->reg_lock, flags);
418 return;
419 }
420
421 switch (rate) {
422 case 8000: val = 6; break;
423 case 9600: val = 3; break;
424 case 11025: val = 10; break;
425 case 12000: val = 2; break;
426 case 16000: val = 5; break;
427 case 22050: val = 9; break;
428 case 24000: val = 1; break;
429 case 32000: val = 4; break;
430 case 44100: val = 8; break;
431 case 48000: val = 0; break;
432 case 64000: val = 15; break;
433 case 88200: val = 11; break;
434 case 96000: val = 7; break;
435 case 176400: val = 12; break;
436 case 192000: val = 14; break;
437 default:
438 snd_BUG();
439 val = 0;
440 break;
441 }
442 old = inb(ICEMT1724(ice, RATE));
443 if (old != val)
444 outb(val, ICEMT1724(ice, RATE));
445 else if (rate == ice->cur_rate) {
446 spin_unlock_irqrestore(&ice->reg_lock, flags);
447 return;
448 }
449
450 ice->cur_rate = rate;
451
452 /* check MT02 */
453 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
454 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
455 if (rate > 96000)
456 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
457 else
458 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
459 if (val != old) {
460 outb(val, ICEMT1724(ice, I2S_FORMAT));
461 if (ice->eeprom.subvendor == VT1724_SUBDEVICE_REVOLUTION71) {
462 /* FIXME: is this revo only? */
463 /* assert PRST# to converters; MT05 bit 7 */
464 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
465 spin_unlock_irqrestore(&ice->reg_lock, flags);
466 mdelay(5);
467 spin_lock_irqsave(&ice->reg_lock, flags);
468 /* deassert PRST# */
469 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
470 }
471 }
472 }
473 spin_unlock_irqrestore(&ice->reg_lock, flags);
474
475 /* set up codecs */
476 for (i = 0; i < ice->akm_codecs; i++) {
477 if (ice->akm[i].ops.set_rate_val)
478 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
479 }
480 }
481
482 static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
483 snd_pcm_hw_params_t * hw_params)
484 {
485 ice1712_t *ice = snd_pcm_substream_chip(substream);
486 int i, chs;
487
488 chs = params_channels(hw_params);
489 down(&ice->open_mutex);
490 /* mark surround channels */
491 if (substream == ice->playback_pro_substream) {
492 /* PDMA0 can be multi-channel up to 8 */
493 chs = chs / 2 - 1;
494 for (i = 0; i < chs; i++) {
495 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
496 up(&ice->open_mutex);
497 return -EBUSY;
498 }
499 ice->pcm_reserved[i] = substream;
500 }
501 for (; i < 3; i++) {
502 if (ice->pcm_reserved[i] == substream)
503 ice->pcm_reserved[i] = NULL;
504 }
505 } else {
506 for (i = 0; i < 3; i++) {
507 /* check individual playback stream */
508 if (ice->playback_con_substream_ds[i] == substream) {
509 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
510 up(&ice->open_mutex);
511 return -EBUSY;
512 }
513 ice->pcm_reserved[i] = substream;
514 break;
515 }
516 }
517 }
518 up(&ice->open_mutex);
519 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
520 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
521 }
522
523 static int snd_vt1724_pcm_hw_free(snd_pcm_substream_t * substream)
524 {
525 ice1712_t *ice = snd_pcm_substream_chip(substream);
526 int i;
527
528 down(&ice->open_mutex);
529 /* unmark surround channels */
530 for (i = 0; i < 3; i++)
531 if (ice->pcm_reserved[i] == substream)
532 ice->pcm_reserved[i] = NULL;
533 up(&ice->open_mutex);
534 return snd_pcm_lib_free_pages(substream);
535 }
536
537 static int snd_vt1724_playback_pro_prepare(snd_pcm_substream_t * substream)
538 {
539 ice1712_t *ice = snd_pcm_substream_chip(substream);
540 unsigned char val;
541 unsigned int size;
542
543 spin_lock_irq(&ice->reg_lock);
544 val = (8 - substream->runtime->channels) >> 1;
545 outb(val, ICEMT1724(ice, BURST));
546
547 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
548
549 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
550 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
551 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
552 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
553 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
554 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
555 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
556 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
557
558 spin_unlock_irq(&ice->reg_lock);
559
560 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
561 return 0;
562 }
563
564 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(snd_pcm_substream_t * substream)
565 {
566 ice1712_t *ice = snd_pcm_substream_chip(substream);
567 size_t ptr;
568
569 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
570 return 0;
571 #if 0 /* read PLAYBACK_ADDR */
572 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
573 if (ptr < substream->runtime->dma_addr) {
574 snd_printd("ice1724: invalid negative ptr\n");
575 return 0;
576 }
577 ptr -= substream->runtime->dma_addr;
578 ptr = bytes_to_frames(substream->runtime, ptr);
579 if (ptr >= substream->runtime->buffer_size) {
580 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->period_size);
581 return 0;
582 }
583 #else /* read PLAYBACK_SIZE */
584 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
585 ptr = (ptr + 1) << 2;
586 ptr = bytes_to_frames(substream->runtime, ptr);
587 if (! ptr)
588 ;
589 else if (ptr <= substream->runtime->buffer_size)
590 ptr = substream->runtime->buffer_size - ptr;
591 else {
592 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
593 ptr = 0;
594 }
595 #endif
596 return ptr;
597 }
598
599 static int snd_vt1724_pcm_prepare(snd_pcm_substream_t *substream)
600 {
601 ice1712_t *ice = snd_pcm_substream_chip(substream);
602 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
603
604 spin_lock_irq(&ice->reg_lock);
605 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
606 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, ice->profi_port + reg->size);
607 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ice->profi_port + reg->count);
608 spin_unlock_irq(&ice->reg_lock);
609 return 0;
610 }
611
612 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(snd_pcm_substream_t *substream)
613 {
614 ice1712_t *ice = snd_pcm_substream_chip(substream);
615 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
616 size_t ptr;
617
618 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
619 return 0;
620 #if 0 /* use ADDR register */
621 ptr = inl(ice->profi_port + reg->addr);
622 ptr -= substream->runtime->dma_addr;
623 return bytes_to_frames(substream->runtime, ptr);
624 #else /* use SIZE register */
625 ptr = inw(ice->profi_port + reg->size);
626 ptr = (ptr + 1) << 2;
627 ptr = bytes_to_frames(substream->runtime, ptr);
628 if (! ptr)
629 ;
630 else if (ptr <= substream->runtime->buffer_size)
631 ptr = substream->runtime->buffer_size - ptr;
632 else {
633 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
634 ptr = 0;
635 }
636 return ptr;
637 #endif
638 }
639
640 static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
641 .addr = VT1724_MT_PLAYBACK_ADDR,
642 .size = VT1724_MT_PLAYBACK_SIZE,
643 .count = VT1724_MT_PLAYBACK_COUNT,
644 .start = VT1724_PDMA0_START,
645 };
646
647 static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
648 .addr = VT1724_MT_CAPTURE_ADDR,
649 .size = VT1724_MT_CAPTURE_SIZE,
650 .count = VT1724_MT_CAPTURE_COUNT,
651 .start = VT1724_RDMA0_START,
652 };
653
654 static snd_pcm_hardware_t snd_vt1724_playback_pro =
655 {
656 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
657 SNDRV_PCM_INFO_BLOCK_TRANSFER |
658 SNDRV_PCM_INFO_MMAP_VALID |
659 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
660 .formats = SNDRV_PCM_FMTBIT_S32_LE,
661 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
662 .rate_min = 8000,
663 .rate_max = 192000,
664 .channels_min = 2,
665 .channels_max = 8,
666 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
667 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
668 .period_bytes_max = (1UL << 21),
669 .periods_min = 2,
670 .periods_max = 1024,
671 };
672
673 static snd_pcm_hardware_t snd_vt1724_spdif =
674 {
675 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
676 SNDRV_PCM_INFO_BLOCK_TRANSFER |
677 SNDRV_PCM_INFO_MMAP_VALID |
678 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
679 .formats = SNDRV_PCM_FMTBIT_S32_LE,
680 .rates = SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000,
681 .rate_min = 32000,
682 .rate_max = 48000,
683 .channels_min = 2,
684 .channels_max = 2,
685 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
686 .period_bytes_min = 2 * 4 * 2,
687 .period_bytes_max = (1UL << 18),
688 .periods_min = 2,
689 .periods_max = 1024,
690 };
691
692 static snd_pcm_hardware_t snd_vt1724_2ch_stereo =
693 {
694 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
695 SNDRV_PCM_INFO_BLOCK_TRANSFER |
696 SNDRV_PCM_INFO_MMAP_VALID |
697 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
698 .formats = SNDRV_PCM_FMTBIT_S32_LE,
699 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
700 .rate_min = 8000,
701 .rate_max = 192000,
702 .channels_min = 2,
703 .channels_max = 2,
704 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
705 .period_bytes_min = 2 * 4 * 2,
706 .period_bytes_max = (1UL << 18),
707 .periods_min = 2,
708 .periods_max = 1024,
709 };
710
711 /*
712 * set rate constraints
713 */
714 static int set_rate_constraints(ice1712_t *ice, snd_pcm_substream_t *substream)
715 {
716 snd_pcm_runtime_t *runtime = substream->runtime;
717 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
718 /* I2S */
719 /* VT1720 doesn't support more than 96kHz */
720 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
721 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_192);
722 else {
723 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000;
724 runtime->hw.rate_max = 96000;
725 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_96);
726 }
727 } else if (ice->ac97) {
728 /* ACLINK */
729 runtime->hw.rate_max = 48000;
730 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
731 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
732 }
733 return 0;
734 }
735
736 /* multi-channel playback needs alignment 8x32bit regardless of the channels
737 * actually used
738 */
739 #define VT1724_BUFFER_ALIGN 0x20
740
741 static int snd_vt1724_playback_pro_open(snd_pcm_substream_t * substream)
742 {
743 snd_pcm_runtime_t *runtime = substream->runtime;
744 ice1712_t *ice = snd_pcm_substream_chip(substream);
745 int chs;
746
747 runtime->private_data = &vt1724_playback_pro_reg;
748 ice->playback_pro_substream = substream;
749 runtime->hw = snd_vt1724_playback_pro;
750 snd_pcm_set_sync(substream);
751 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
752 set_rate_constraints(ice, substream);
753 down(&ice->open_mutex);
754 /* calculate the currently available channels */
755 for (chs = 0; chs < 3; chs++) {
756 if (ice->pcm_reserved[chs])
757 break;
758 }
759 chs = (chs + 1) * 2;
760 runtime->hw.channels_max = chs;
761 if (chs > 2) /* channels must be even */
762 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
763 up(&ice->open_mutex);
764 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
765 VT1724_BUFFER_ALIGN);
766 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
767 VT1724_BUFFER_ALIGN);
768 return 0;
769 }
770
771 static int snd_vt1724_capture_pro_open(snd_pcm_substream_t * substream)
772 {
773 ice1712_t *ice = snd_pcm_substream_chip(substream);
774 snd_pcm_runtime_t *runtime = substream->runtime;
775
776 runtime->private_data = &vt1724_capture_pro_reg;
777 ice->capture_pro_substream = substream;
778 runtime->hw = snd_vt1724_2ch_stereo;
779 snd_pcm_set_sync(substream);
780 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
781 set_rate_constraints(ice, substream);
782 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
783 VT1724_BUFFER_ALIGN);
784 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
785 VT1724_BUFFER_ALIGN);
786 return 0;
787 }
788
789 static int snd_vt1724_playback_pro_close(snd_pcm_substream_t * substream)
790 {
791 ice1712_t *ice = snd_pcm_substream_chip(substream);
792
793 if (PRO_RATE_RESET)
794 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
795 ice->playback_pro_substream = NULL;
796
797 return 0;
798 }
799
800 static int snd_vt1724_capture_pro_close(snd_pcm_substream_t * substream)
801 {
802 ice1712_t *ice = snd_pcm_substream_chip(substream);
803
804 if (PRO_RATE_RESET)
805 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
806 ice->capture_pro_substream = NULL;
807 return 0;
808 }
809
810 static snd_pcm_ops_t snd_vt1724_playback_pro_ops = {
811 .open = snd_vt1724_playback_pro_open,
812 .close = snd_vt1724_playback_pro_close,
813 .ioctl = snd_pcm_lib_ioctl,
814 .hw_params = snd_vt1724_pcm_hw_params,
815 .hw_free = snd_vt1724_pcm_hw_free,
816 .prepare = snd_vt1724_playback_pro_prepare,
817 .trigger = snd_vt1724_pcm_trigger,
818 .pointer = snd_vt1724_playback_pro_pointer,
819 };
820
821 static snd_pcm_ops_t snd_vt1724_capture_pro_ops = {
822 .open = snd_vt1724_capture_pro_open,
823 .close = snd_vt1724_capture_pro_close,
824 .ioctl = snd_pcm_lib_ioctl,
825 .hw_params = snd_vt1724_pcm_hw_params,
826 .hw_free = snd_vt1724_pcm_hw_free,
827 .prepare = snd_vt1724_pcm_prepare,
828 .trigger = snd_vt1724_pcm_trigger,
829 .pointer = snd_vt1724_pcm_pointer,
830 };
831
832 static int __devinit snd_vt1724_pcm_profi(ice1712_t * ice, int device)
833 {
834 snd_pcm_t *pcm;
835 int err;
836
837 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
838 if (err < 0)
839 return err;
840
841 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
842 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
843
844 pcm->private_data = ice;
845 pcm->info_flags = 0;
846 strcpy(pcm->name, "ICE1724");
847
848 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
849 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
850
851 ice->pcm_pro = pcm;
852
853 return 0;
854 }
855
856
857 /*
858 * SPDIF PCM
859 */
860
861 static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
862 .addr = VT1724_MT_PDMA4_ADDR,
863 .size = VT1724_MT_PDMA4_SIZE,
864 .count = VT1724_MT_PDMA4_COUNT,
865 .start = VT1724_PDMA4_START,
866 };
867
868 static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
869 .addr = VT1724_MT_RDMA1_ADDR,
870 .size = VT1724_MT_RDMA1_SIZE,
871 .count = VT1724_MT_RDMA1_COUNT,
872 .start = VT1724_RDMA1_START,
873 };
874
875 /* update spdif control bits; call with reg_lock */
876 static void update_spdif_bits(ice1712_t *ice, unsigned int val)
877 {
878 unsigned char cbit, disabled;
879
880 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
881 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
882 if (cbit != disabled)
883 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
884 outw(val, ICEMT1724(ice, SPDIF_CTRL));
885 if (cbit != disabled)
886 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
887 outw(val, ICEMT1724(ice, SPDIF_CTRL));
888 }
889
890 /* update SPDIF control bits according to the given rate */
891 static void update_spdif_rate(ice1712_t *ice, unsigned int rate)
892 {
893 unsigned int val, nval;
894 unsigned long flags;
895
896 spin_lock_irqsave(&ice->reg_lock, flags);
897 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
898 nval &= ~(7 << 12);
899 switch (rate) {
900 case 44100: break;
901 case 48000: nval |= 2 << 12; break;
902 case 32000: nval |= 3 << 12; break;
903 }
904 if (val != nval)
905 update_spdif_bits(ice, nval);
906 spin_unlock_irqrestore(&ice->reg_lock, flags);
907 }
908
909 static int snd_vt1724_playback_spdif_prepare(snd_pcm_substream_t * substream)
910 {
911 ice1712_t *ice = snd_pcm_substream_chip(substream);
912 if (! ice->force_pdma4)
913 update_spdif_rate(ice, substream->runtime->rate);
914 return snd_vt1724_pcm_prepare(substream);
915 }
916
917 static int snd_vt1724_playback_spdif_open(snd_pcm_substream_t *substream)
918 {
919 ice1712_t *ice = snd_pcm_substream_chip(substream);
920 snd_pcm_runtime_t *runtime = substream->runtime;
921
922 runtime->private_data = &vt1724_playback_spdif_reg;
923 ice->playback_con_substream = substream;
924 if (ice->force_pdma4) {
925 runtime->hw = snd_vt1724_2ch_stereo;
926 set_rate_constraints(ice, substream);
927 } else
928 runtime->hw = snd_vt1724_spdif;
929 snd_pcm_set_sync(substream);
930 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
931 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
932 VT1724_BUFFER_ALIGN);
933 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
934 VT1724_BUFFER_ALIGN);
935 return 0;
936 }
937
938 static int snd_vt1724_playback_spdif_close(snd_pcm_substream_t * substream)
939 {
940 ice1712_t *ice = snd_pcm_substream_chip(substream);
941
942 if (PRO_RATE_RESET)
943 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
944 ice->playback_con_substream = NULL;
945
946 return 0;
947 }
948
949 static int snd_vt1724_capture_spdif_open(snd_pcm_substream_t *substream)
950 {
951 ice1712_t *ice = snd_pcm_substream_chip(substream);
952 snd_pcm_runtime_t *runtime = substream->runtime;
953
954 runtime->private_data = &vt1724_capture_spdif_reg;
955 ice->capture_con_substream = substream;
956 if (ice->force_rdma1) {
957 runtime->hw = snd_vt1724_2ch_stereo;
958 set_rate_constraints(ice, substream);
959 } else
960 runtime->hw = snd_vt1724_spdif;
961 snd_pcm_set_sync(substream);
962 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
963 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
964 VT1724_BUFFER_ALIGN);
965 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
966 VT1724_BUFFER_ALIGN);
967 return 0;
968 }
969
970 static int snd_vt1724_capture_spdif_close(snd_pcm_substream_t * substream)
971 {
972 ice1712_t *ice = snd_pcm_substream_chip(substream);
973
974 if (PRO_RATE_RESET)
975 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
976 ice->capture_con_substream = NULL;
977
978 return 0;
979 }
980
981 static snd_pcm_ops_t snd_vt1724_playback_spdif_ops = {
982 .open = snd_vt1724_playback_spdif_open,
983 .close = snd_vt1724_playback_spdif_close,
984 .ioctl = snd_pcm_lib_ioctl,
985 .hw_params = snd_vt1724_pcm_hw_params,
986 .hw_free = snd_vt1724_pcm_hw_free,
987 .prepare = snd_vt1724_playback_spdif_prepare,
988 .trigger = snd_vt1724_pcm_trigger,
989 .pointer = snd_vt1724_pcm_pointer,
990 };
991
992 static snd_pcm_ops_t snd_vt1724_capture_spdif_ops = {
993 .open = snd_vt1724_capture_spdif_open,
994 .close = snd_vt1724_capture_spdif_close,
995 .ioctl = snd_pcm_lib_ioctl,
996 .hw_params = snd_vt1724_pcm_hw_params,
997 .hw_free = snd_vt1724_pcm_hw_free,
998 .prepare = snd_vt1724_pcm_prepare,
999 .trigger = snd_vt1724_pcm_trigger,
1000 .pointer = snd_vt1724_pcm_pointer,
1001 };
1002
1003
1004 static int __devinit snd_vt1724_pcm_spdif(ice1712_t * ice, int device)
1005 {
1006 char *name;
1007 snd_pcm_t *pcm;
1008 int play, capt;
1009 int err;
1010
1011 if (ice->force_pdma4 ||
1012 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1013 play = 1;
1014 ice->has_spdif = 1;
1015 } else
1016 play = 0;
1017 if (ice->force_rdma1 ||
1018 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1019 capt = 1;
1020 ice->has_spdif = 1;
1021 } else
1022 capt = 0;
1023 if (! play && ! capt)
1024 return 0; /* no spdif device */
1025
1026 if (ice->force_pdma4 || ice->force_rdma1)
1027 name = "ICE1724 Secondary";
1028 else
1029 name = "IEC1724 IEC958";
1030 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1031 if (err < 0)
1032 return err;
1033
1034 if (play)
1035 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1036 &snd_vt1724_playback_spdif_ops);
1037 if (capt)
1038 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1039 &snd_vt1724_capture_spdif_ops);
1040
1041 pcm->private_data = ice;
1042 pcm->info_flags = 0;
1043 strcpy(pcm->name, name);
1044
1045 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1046 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1047
1048 ice->pcm = pcm;
1049
1050 return 0;
1051 }
1052
1053
1054 /*
1055 * independent surround PCMs
1056 */
1057
1058 static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1059 {
1060 .addr = VT1724_MT_PDMA1_ADDR,
1061 .size = VT1724_MT_PDMA1_SIZE,
1062 .count = VT1724_MT_PDMA1_COUNT,
1063 .start = VT1724_PDMA1_START,
1064 },
1065 {
1066 .addr = VT1724_MT_PDMA2_ADDR,
1067 .size = VT1724_MT_PDMA2_SIZE,
1068 .count = VT1724_MT_PDMA2_COUNT,
1069 .start = VT1724_PDMA2_START,
1070 },
1071 {
1072 .addr = VT1724_MT_PDMA3_ADDR,
1073 .size = VT1724_MT_PDMA3_SIZE,
1074 .count = VT1724_MT_PDMA3_COUNT,
1075 .start = VT1724_PDMA3_START,
1076 },
1077 };
1078
1079 static int snd_vt1724_playback_indep_prepare(snd_pcm_substream_t * substream)
1080 {
1081 ice1712_t *ice = snd_pcm_substream_chip(substream);
1082 unsigned char val;
1083
1084 spin_lock_irq(&ice->reg_lock);
1085 val = 3 - substream->number;
1086 if (inb(ICEMT1724(ice, BURST)) < val)
1087 outb(val, ICEMT1724(ice, BURST));
1088 spin_unlock_irq(&ice->reg_lock);
1089 return snd_vt1724_pcm_prepare(substream);
1090 }
1091
1092 static int snd_vt1724_playback_indep_open(snd_pcm_substream_t *substream)
1093 {
1094 ice1712_t *ice = snd_pcm_substream_chip(substream);
1095 snd_pcm_runtime_t *runtime = substream->runtime;
1096
1097 down(&ice->open_mutex);
1098 /* already used by PDMA0? */
1099 if (ice->pcm_reserved[substream->number]) {
1100 up(&ice->open_mutex);
1101 return -EBUSY; /* FIXME: should handle blocking mode properly */
1102 }
1103 up(&ice->open_mutex);
1104 runtime->private_data = &vt1724_playback_dma_regs[substream->number];
1105 ice->playback_con_substream_ds[substream->number] = substream;
1106 runtime->hw = snd_vt1724_2ch_stereo;
1107 snd_pcm_set_sync(substream);
1108 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1109 set_rate_constraints(ice, substream);
1110 return 0;
1111 }
1112
1113 static int snd_vt1724_playback_indep_close(snd_pcm_substream_t * substream)
1114 {
1115 ice1712_t *ice = snd_pcm_substream_chip(substream);
1116
1117 if (PRO_RATE_RESET)
1118 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1119 ice->playback_con_substream_ds[substream->number] = NULL;
1120 ice->pcm_reserved[substream->number] = NULL;
1121
1122 return 0;
1123 }
1124
1125 static snd_pcm_ops_t snd_vt1724_playback_indep_ops = {
1126 .open = snd_vt1724_playback_indep_open,
1127 .close = snd_vt1724_playback_indep_close,
1128 .ioctl = snd_pcm_lib_ioctl,
1129 .hw_params = snd_vt1724_pcm_hw_params,
1130 .hw_free = snd_vt1724_pcm_hw_free,
1131 .prepare = snd_vt1724_playback_indep_prepare,
1132 .trigger = snd_vt1724_pcm_trigger,
1133 .pointer = snd_vt1724_pcm_pointer,
1134 };
1135
1136
1137 static int __devinit snd_vt1724_pcm_indep(ice1712_t * ice, int device)
1138 {
1139 snd_pcm_t *pcm;
1140 int play;
1141 int err;
1142
1143 play = ice->num_total_dacs / 2 - 1;
1144 if (play <= 0)
1145 return 0;
1146
1147 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1148 if (err < 0)
1149 return err;
1150
1151 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1152 &snd_vt1724_playback_indep_ops);
1153
1154 pcm->private_data = ice;
1155 pcm->info_flags = 0;
1156 strcpy(pcm->name, "ICE1724 Surround PCM");
1157
1158 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1159 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1160
1161 ice->pcm_ds = pcm;
1162
1163 return 0;
1164 }
1165
1166
1167 /*
1168 * Mixer section
1169 */
1170
1171 static int __devinit snd_vt1724_ac97_mixer(ice1712_t * ice)
1172 {
1173 int err;
1174
1175 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1176 ac97_bus_t *pbus;
1177 ac97_template_t ac97;
1178 static ac97_bus_ops_t ops = {
1179 .write = snd_vt1724_ac97_write,
1180 .read = snd_vt1724_ac97_read,
1181 };
1182
1183 /* cold reset */
1184 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1185 mdelay(5); /* FIXME */
1186 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1187
1188 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1189 return err;
1190 memset(&ac97, 0, sizeof(ac97));
1191 ac97.private_data = ice;
1192 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1193 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1194 else
1195 return 0;
1196 }
1197 /* I2S mixer only */
1198 strcat(ice->card->mixername, "ICE1724 - multitrack");
1199 return 0;
1200 }
1201
1202 /*
1203 *
1204 */
1205
1206 static inline unsigned int eeprom_triple(ice1712_t *ice, int idx)
1207 {
1208 return (unsigned int)ice->eeprom.data[idx] | \
1209 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1210 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1211 }
1212
1213 static void snd_vt1724_proc_read(snd_info_entry_t *entry,
1214 snd_info_buffer_t * buffer)
1215 {
1216 ice1712_t *ice = entry->private_data;
1217 unsigned int idx;
1218
1219 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1220 snd_iprintf(buffer, "EEPROM:\n");
1221
1222 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1223 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1224 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1225 snd_iprintf(buffer, " System Config : 0x%x\n", ice->eeprom.data[ICE_EEP2_SYSCONF]);
1226 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP2_ACLINK]);
1227 snd_iprintf(buffer, " I2S : 0x%x\n", ice->eeprom.data[ICE_EEP2_I2S]);
1228 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP2_SPDIF]);
1229 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1230 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1231 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1232 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1233 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1234
1235 snd_iprintf(buffer, "\nRegisters:\n");
1236
1237 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1238 for (idx = 0x0; idx < 0x20 ; idx++)
1239 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", idx, inb(ice->port+idx));
1240 for (idx = 0x0; idx < 0x30 ; idx++)
1241 snd_iprintf(buffer, " MT%02x : 0x%02x\n", idx, inb(ice->profi_port+idx));
1242 }
1243
1244 static void __devinit snd_vt1724_proc_init(ice1712_t * ice)
1245 {
1246 snd_info_entry_t *entry;
1247
1248 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
1249 snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
1250 }
1251
1252 /*
1253 *
1254 */
1255
1256 static int snd_vt1724_eeprom_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1257 {
1258 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1259 uinfo->count = sizeof(ice1712_eeprom_t);
1260 return 0;
1261 }
1262
1263 static int snd_vt1724_eeprom_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1264 {
1265 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1266
1267 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1268 return 0;
1269 }
1270
1271 static snd_kcontrol_new_t snd_vt1724_eeprom __devinitdata = {
1272 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1273 .name = "ICE1724 EEPROM",
1274 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1275 .info = snd_vt1724_eeprom_info,
1276 .get = snd_vt1724_eeprom_get
1277 };
1278
1279 /*
1280 */
1281 static int snd_vt1724_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1282 {
1283 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1284 uinfo->count = 1;
1285 return 0;
1286 }
1287
1288 static unsigned int encode_spdif_bits(snd_aes_iec958_t *diga)
1289 {
1290 unsigned int val;
1291
1292 val = diga->status[0] & 0x03; /* professional, non-audio */
1293 if (val & 0x01) {
1294 /* professional */
1295 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
1296 val |= 1U << 3;
1297 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1298 case IEC958_AES0_PRO_FS_44100:
1299 break;
1300 case IEC958_AES0_PRO_FS_32000:
1301 val |= 3U << 12;
1302 break;
1303 default:
1304 val |= 2U << 12;
1305 break;
1306 }
1307 } else {
1308 /* consumer */
1309 val |= diga->status[1] & 0x04; /* copyright */
1310 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS)== IEC958_AES0_CON_EMPHASIS_5015)
1311 val |= 1U << 3;
1312 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1313 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1314 }
1315 return val;
1316 }
1317
1318 static void decode_spdif_bits(snd_aes_iec958_t *diga, unsigned int val)
1319 {
1320 memset(diga->status, 0, sizeof(diga->status));
1321 diga->status[0] = val & 0x03; /* professional, non-audio */
1322 if (val & 0x01) {
1323 /* professional */
1324 if (val & (1U << 3))
1325 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1326 switch ((val >> 12) & 0x7) {
1327 case 0:
1328 break;
1329 case 2:
1330 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1331 break;
1332 default:
1333 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1334 break;
1335 }
1336 } else {
1337 /* consumer */
1338 diga->status[0] |= val & (1U << 2); /* copyright */
1339 if (val & (1U << 3))
1340 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1341 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1342 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1343 }
1344 }
1345
1346 static int snd_vt1724_spdif_default_get(snd_kcontrol_t * kcontrol,
1347 snd_ctl_elem_value_t * ucontrol)
1348 {
1349 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1350 unsigned int val;
1351 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1352 decode_spdif_bits(&ucontrol->value.iec958, val);
1353 return 0;
1354 }
1355
1356 static int snd_vt1724_spdif_default_put(snd_kcontrol_t * kcontrol,
1357 snd_ctl_elem_value_t * ucontrol)
1358 {
1359 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1360 unsigned int val, old;
1361
1362 val = encode_spdif_bits(&ucontrol->value.iec958);
1363 spin_lock_irq(&ice->reg_lock);
1364 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1365 if (val != old)
1366 update_spdif_bits(ice, val);
1367 spin_unlock_irq(&ice->reg_lock);
1368 return (val != old);
1369 }
1370
1371 static snd_kcontrol_new_t snd_vt1724_spdif_default __devinitdata =
1372 {
1373 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1374 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1375 .info = snd_vt1724_spdif_info,
1376 .get = snd_vt1724_spdif_default_get,
1377 .put = snd_vt1724_spdif_default_put
1378 };
1379
1380 static int snd_vt1724_spdif_maskc_get(snd_kcontrol_t * kcontrol,
1381 snd_ctl_elem_value_t * ucontrol)
1382 {
1383 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1384 IEC958_AES0_PROFESSIONAL |
1385 IEC958_AES0_CON_NOT_COPYRIGHT |
1386 IEC958_AES0_CON_EMPHASIS;
1387 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1388 IEC958_AES1_CON_CATEGORY;
1389 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1390 return 0;
1391 }
1392
1393 static int snd_vt1724_spdif_maskp_get(snd_kcontrol_t * kcontrol,
1394 snd_ctl_elem_value_t * ucontrol)
1395 {
1396 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1397 IEC958_AES0_PROFESSIONAL |
1398 IEC958_AES0_PRO_FS |
1399 IEC958_AES0_PRO_EMPHASIS;
1400 return 0;
1401 }
1402
1403 static snd_kcontrol_new_t snd_vt1724_spdif_maskc __devinitdata =
1404 {
1405 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1407 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1408 .info = snd_vt1724_spdif_info,
1409 .get = snd_vt1724_spdif_maskc_get,
1410 };
1411
1412 static snd_kcontrol_new_t snd_vt1724_spdif_maskp __devinitdata =
1413 {
1414 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1415 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1416 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1417 .info = snd_vt1724_spdif_info,
1418 .get = snd_vt1724_spdif_maskp_get,
1419 };
1420
1421 static int snd_vt1724_spdif_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1422 {
1423 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1424 uinfo->count = 1;
1425 uinfo->value.integer.min = 0;
1426 uinfo->value.integer.max = 1;
1427 return 0;
1428 }
1429
1430 static int snd_vt1724_spdif_sw_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1431 {
1432 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1433 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1434 return 0;
1435 }
1436
1437 static int snd_vt1724_spdif_sw_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1438 {
1439 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1440 unsigned char old, val;
1441
1442 spin_lock_irq(&ice->reg_lock);
1443 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1444 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1445 if (ucontrol->value.integer.value[0])
1446 val |= VT1724_CFG_SPDIF_OUT_EN;
1447 if (old != val)
1448 outb(val, ICEREG1724(ice, SPDIF_CFG));
1449 spin_unlock_irq(&ice->reg_lock);
1450 return old != val;
1451 }
1452
1453 static snd_kcontrol_new_t snd_vt1724_spdif_switch __devinitdata =
1454 {
1455 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1456 /* FIXME: the following conflict with IEC958 Playback Route */
1457 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
1458 .name = "IEC958 Output Switch",
1459 .info = snd_vt1724_spdif_sw_info,
1460 .get = snd_vt1724_spdif_sw_get,
1461 .put = snd_vt1724_spdif_sw_put
1462 };
1463
1464
1465 #if 0 /* NOT USED YET */
1466 /*
1467 * GPIO access from extern
1468 */
1469
1470 int snd_vt1724_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1471 {
1472 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1473 uinfo->count = 1;
1474 uinfo->value.integer.min = 0;
1475 uinfo->value.integer.max = 1;
1476 return 0;
1477 }
1478
1479 int snd_vt1724_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1480 {
1481 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1482 int shift = kcontrol->private_value & 0xff;
1483 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1484
1485 snd_ice1712_save_gpio_status(ice);
1486 ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1487 snd_ice1712_restore_gpio_status(ice);
1488 return 0;
1489 }
1490
1491 int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1492 {
1493 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1494 int shift = kcontrol->private_value & 0xff;
1495 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1496 unsigned int val, nval;
1497
1498 if (kcontrol->private_value & (1 << 31))
1499 return -EPERM;
1500 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1501 snd_ice1712_save_gpio_status(ice);
1502 val = snd_ice1712_gpio_read(ice);
1503 nval |= val & ~(1 << shift);
1504 if (val != nval)
1505 snd_ice1712_gpio_write(ice, nval);
1506 snd_ice1712_restore_gpio_status(ice);
1507 return val != nval;
1508 }
1509 #endif /* NOT USED YET */
1510
1511 /*
1512 * rate
1513 */
1514 static int snd_vt1724_pro_internal_clock_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1515 {
1516 static char *texts_1724[] = {
1517 "8000", /* 0: 6 */
1518 "9600", /* 1: 3 */
1519 "11025", /* 2: 10 */
1520 "12000", /* 3: 2 */
1521 "16000", /* 4: 5 */
1522 "22050", /* 5: 9 */
1523 "24000", /* 6: 1 */
1524 "32000", /* 7: 4 */
1525 "44100", /* 8: 8 */
1526 "48000", /* 9: 0 */
1527 "64000", /* 10: 15 */
1528 "88200", /* 11: 11 */
1529 "96000", /* 12: 7 */
1530 "176400", /* 13: 12 */
1531 "192000", /* 14: 14 */
1532 "IEC958 Input", /* 15: -- */
1533 };
1534 static char *texts_1720[] = {
1535 "8000", /* 0: 6 */
1536 "9600", /* 1: 3 */
1537 "11025", /* 2: 10 */
1538 "12000", /* 3: 2 */
1539 "16000", /* 4: 5 */
1540 "22050", /* 5: 9 */
1541 "24000", /* 6: 1 */
1542 "32000", /* 7: 4 */
1543 "44100", /* 8: 8 */
1544 "48000", /* 9: 0 */
1545 "64000", /* 10: 15 */
1546 "88200", /* 11: 11 */
1547 "96000", /* 12: 7 */
1548 "IEC958 Input", /* 13: -- */
1549 };
1550 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1551
1552 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1553 uinfo->count = 1;
1554 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
1555 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1556 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1557 strcpy(uinfo->value.enumerated.name,
1558 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
1559 texts_1724[uinfo->value.enumerated.item]);
1560 return 0;
1561 }
1562
1563 static int snd_vt1724_pro_internal_clock_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1564 {
1565 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1566 static unsigned char xlate[16] = {
1567 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1568 };
1569 unsigned char val;
1570
1571 spin_lock_irq(&ice->reg_lock);
1572 if (is_spdif_master(ice)) {
1573 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
1574 } else {
1575 val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
1576 if (val == 255) {
1577 snd_BUG();
1578 val = 0;
1579 }
1580 ucontrol->value.enumerated.item[0] = val;
1581 }
1582 spin_unlock_irq(&ice->reg_lock);
1583 return 0;
1584 }
1585
1586 static int snd_vt1724_pro_internal_clock_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1587 {
1588 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1589 unsigned char oval;
1590 int rate;
1591 int change = 0;
1592 int spdif = ice->vt1720 ? 13 : 15;
1593
1594 spin_lock_irq(&ice->reg_lock);
1595 oval = inb(ICEMT1724(ice, RATE));
1596 if (ucontrol->value.enumerated.item[0] == spdif) {
1597 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1598 } else {
1599 rate = rates[ucontrol->value.integer.value[0] % 15];
1600 if (rate <= get_max_rate(ice)) {
1601 PRO_RATE_DEFAULT = rate;
1602 spin_unlock_irq(&ice->reg_lock);
1603 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1604 spin_lock_irq(&ice->reg_lock);
1605 }
1606 }
1607 change = inb(ICEMT1724(ice, RATE)) != oval;
1608 spin_unlock_irq(&ice->reg_lock);
1609
1610 if ((oval & VT1724_SPDIF_MASTER) != (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
1611 /* notify akm chips as well */
1612 if (is_spdif_master(ice)) {
1613 unsigned int i;
1614 for (i = 0; i < ice->akm_codecs; i++) {
1615 if (ice->akm[i].ops.set_rate_val)
1616 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1617 }
1618 }
1619 }
1620 return change;
1621 }
1622
1623 static snd_kcontrol_new_t snd_vt1724_pro_internal_clock __devinitdata = {
1624 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1625 .name = "Multi Track Internal Clock",
1626 .info = snd_vt1724_pro_internal_clock_info,
1627 .get = snd_vt1724_pro_internal_clock_get,
1628 .put = snd_vt1724_pro_internal_clock_put
1629 };
1630
1631 static int snd_vt1724_pro_rate_locking_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1632 {
1633 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1634 uinfo->count = 1;
1635 uinfo->value.integer.min = 0;
1636 uinfo->value.integer.max = 1;
1637 return 0;
1638 }
1639
1640 static int snd_vt1724_pro_rate_locking_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1641 {
1642 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1643 return 0;
1644 }
1645
1646 static int snd_vt1724_pro_rate_locking_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1647 {
1648 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1649 int change = 0, nval;
1650
1651 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1652 spin_lock_irq(&ice->reg_lock);
1653 change = PRO_RATE_LOCKED != nval;
1654 PRO_RATE_LOCKED = nval;
1655 spin_unlock_irq(&ice->reg_lock);
1656 return change;
1657 }
1658
1659 static snd_kcontrol_new_t snd_vt1724_pro_rate_locking __devinitdata = {
1660 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1661 .name = "Multi Track Rate Locking",
1662 .info = snd_vt1724_pro_rate_locking_info,
1663 .get = snd_vt1724_pro_rate_locking_get,
1664 .put = snd_vt1724_pro_rate_locking_put
1665 };
1666
1667 static int snd_vt1724_pro_rate_reset_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1668 {
1669 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1670 uinfo->count = 1;
1671 uinfo->value.integer.min = 0;
1672 uinfo->value.integer.max = 1;
1673 return 0;
1674 }
1675
1676 static int snd_vt1724_pro_rate_reset_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1677 {
1678 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1679 return 0;
1680 }
1681
1682 static int snd_vt1724_pro_rate_reset_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1683 {
1684 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1685 int change = 0, nval;
1686
1687 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1688 spin_lock_irq(&ice->reg_lock);
1689 change = PRO_RATE_RESET != nval;
1690 PRO_RATE_RESET = nval;
1691 spin_unlock_irq(&ice->reg_lock);
1692 return change;
1693 }
1694
1695 static snd_kcontrol_new_t snd_vt1724_pro_rate_reset __devinitdata = {
1696 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1697 .name = "Multi Track Rate Reset",
1698 .info = snd_vt1724_pro_rate_reset_info,
1699 .get = snd_vt1724_pro_rate_reset_get,
1700 .put = snd_vt1724_pro_rate_reset_put
1701 };
1702
1703
1704 /*
1705 * routing
1706 */
1707 static int snd_vt1724_pro_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1708 {
1709 static char *texts[] = {
1710 "PCM Out", /* 0 */
1711 "H/W In 0", "H/W In 1", /* 1-2 */
1712 "IEC958 In L", "IEC958 In R", /* 3-4 */
1713 };
1714
1715 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1716 uinfo->count = 1;
1717 uinfo->value.enumerated.items = 5;
1718 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1719 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1720 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1721 return 0;
1722 }
1723
1724 static inline int analog_route_shift(int idx)
1725 {
1726 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1727 }
1728
1729 static inline int digital_route_shift(int idx)
1730 {
1731 return idx * 3;
1732 }
1733
1734 static int get_route_val(ice1712_t *ice, int shift)
1735 {
1736 unsigned long val;
1737 unsigned char eitem;
1738 static unsigned char xlate[8] = {
1739 0, 255, 1, 2, 255, 255, 3, 4,
1740 };
1741
1742 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1743 val >>= shift;
1744 val &= 7; //we now have 3 bits per output
1745 eitem = xlate[val];
1746 if (eitem == 255) {
1747 snd_BUG();
1748 return 0;
1749 }
1750 return eitem;
1751 }
1752
1753 static int put_route_val(ice1712_t *ice, unsigned int val, int shift)
1754 {
1755 unsigned int old_val, nval;
1756 int change;
1757 static unsigned char xroute[8] = {
1758 0, /* PCM */
1759 2, /* PSDIN0 Left */
1760 3, /* PSDIN0 Right */
1761 6, /* SPDIN Left */
1762 7, /* SPDIN Right */
1763 };
1764
1765 nval = xroute[val % 5];
1766 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1767 val &= ~(0x07 << shift);
1768 val |= nval << shift;
1769 change = val != old_val;
1770 if (change)
1771 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1772 return change;
1773 }
1774
1775 static int snd_vt1724_pro_route_analog_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1776 {
1777 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1778 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1779 ucontrol->value.enumerated.item[0] = get_route_val(ice, analog_route_shift(idx));
1780 return 0;
1781 }
1782
1783 static int snd_vt1724_pro_route_analog_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1784 {
1785 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1786 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1787 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1788 analog_route_shift(idx));
1789 }
1790
1791 static int snd_vt1724_pro_route_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1792 {
1793 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1794 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1795 ucontrol->value.enumerated.item[0] = get_route_val(ice, digital_route_shift(idx));
1796 return 0;
1797 }
1798
1799 static int snd_vt1724_pro_route_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1800 {
1801 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1802 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1803 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1804 digital_route_shift(idx));
1805 }
1806
1807 static snd_kcontrol_new_t snd_vt1724_mixer_pro_analog_route __devinitdata = {
1808 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1809 .name = "H/W Playback Route",
1810 .info = snd_vt1724_pro_route_info,
1811 .get = snd_vt1724_pro_route_analog_get,
1812 .put = snd_vt1724_pro_route_analog_put,
1813 };
1814
1815 static snd_kcontrol_new_t snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1816 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1817 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
1818 .info = snd_vt1724_pro_route_info,
1819 .get = snd_vt1724_pro_route_spdif_get,
1820 .put = snd_vt1724_pro_route_spdif_put,
1821 .count = 2,
1822 };
1823
1824
1825 static int snd_vt1724_pro_peak_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1826 {
1827 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1828 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1829 uinfo->value.integer.min = 0;
1830 uinfo->value.integer.max = 255;
1831 return 0;
1832 }
1833
1834 static int snd_vt1724_pro_peak_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1835 {
1836 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1837 int idx;
1838
1839 spin_lock_irq(&ice->reg_lock);
1840 for (idx = 0; idx < 22; idx++) {
1841 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
1842 ucontrol->value.integer.value[idx] = inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1843 }
1844 spin_unlock_irq(&ice->reg_lock);
1845 return 0;
1846 }
1847
1848 static snd_kcontrol_new_t snd_vt1724_mixer_pro_peak __devinitdata = {
1849 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1850 .name = "Multi Track Peak",
1851 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1852 .info = snd_vt1724_pro_peak_info,
1853 .get = snd_vt1724_pro_peak_get
1854 };
1855
1856 /*
1857 *
1858 */
1859
1860 static struct snd_ice1712_card_info no_matched __devinitdata;
1861
1862 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1863 snd_vt1724_revo_cards,
1864 snd_vt1724_amp_cards,
1865 snd_vt1724_aureon_cards,
1866 snd_vt1720_mobo_cards,
1867 snd_vt1720_pontis_cards,
1868 snd_vt1724_prodigy192_cards,
1869 NULL,
1870 };
1871
1872
1873 /*
1874 */
1875
1876 static void wait_i2c_busy(ice1712_t *ice)
1877 {
1878 int t = 0x10000;
1879 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1880 ;
1881 }
1882
1883 unsigned char snd_vt1724_read_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr)
1884 {
1885 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1886 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1887 wait_i2c_busy(ice);
1888 return inb(ICEREG1724(ice, I2C_DATA));
1889 }
1890
1891 void snd_vt1724_write_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr, unsigned char data)
1892 {
1893 wait_i2c_busy(ice);
1894 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1895 outb(data, ICEREG1724(ice, I2C_DATA));
1896 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1897 wait_i2c_busy(ice);
1898 }
1899
1900 static int __devinit snd_vt1724_read_eeprom(ice1712_t *ice, const char *modelname)
1901 {
1902 const int dev = 0xa0; /* EEPROM device address */
1903 unsigned int i, size;
1904 struct snd_ice1712_card_info **tbl, *c;
1905
1906 if (! modelname || ! *modelname) {
1907 ice->eeprom.subvendor = 0;
1908 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
1909 ice->eeprom.subvendor = (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1910 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
1911 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1912 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
1913 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1914 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
1915 u16 vendor, device;
1916 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
1917 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
1918 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
1919 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1920 printk(KERN_ERR "ice1724: No valid ID is found\n");
1921 return -ENXIO;
1922 }
1923 }
1924 }
1925 for (tbl = card_tables; *tbl; tbl++) {
1926 for (c = *tbl; c->subvendor; c++) {
1927 if (modelname && c->model && ! strcmp(modelname, c->model)) {
1928 printk(KERN_INFO "ice1724: Using board model %s\n", c->name);
1929 ice->eeprom.subvendor = c->subvendor;
1930 } else if (c->subvendor != ice->eeprom.subvendor)
1931 continue;
1932 if (! c->eeprom_size || ! c->eeprom_data)
1933 goto found;
1934 /* if the EEPROM is given by the driver, use it */
1935 snd_printdd("using the defined eeprom..\n");
1936 ice->eeprom.version = 2;
1937 ice->eeprom.size = c->eeprom_size + 6;
1938 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
1939 goto read_skipped;
1940 }
1941 }
1942 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", ice->eeprom.subvendor);
1943
1944 found:
1945 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
1946 if (ice->eeprom.size < 6)
1947 ice->eeprom.size = 32;
1948 else if (ice->eeprom.size > 32) {
1949 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", ice->eeprom.size);
1950 return -EIO;
1951 }
1952 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
1953 if (ice->eeprom.version != 2)
1954 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", ice->eeprom.version);
1955 size = ice->eeprom.size - 6;
1956 for (i = 0; i < size; i++)
1957 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
1958
1959 read_skipped:
1960 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
1961 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
1962 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
1963
1964 return 0;
1965 }
1966
1967
1968
1969 static int __devinit snd_vt1724_chip_init(ice1712_t *ice)
1970 {
1971 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
1972 udelay(200);
1973 outb(0, ICEREG1724(ice, CONTROL));
1974 udelay(200);
1975 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
1976 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
1977 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
1978 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
1979
1980 ice->gpio.write_mask = ice->eeprom.gpiomask;
1981 ice->gpio.direction = ice->eeprom.gpiodir;
1982 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
1983 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
1984 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
1985
1986 outb(0, ICEREG1724(ice, POWERDOWN));
1987
1988 return 0;
1989 }
1990
1991 static int __devinit snd_vt1724_spdif_build_controls(ice1712_t *ice)
1992 {
1993 int err;
1994 snd_kcontrol_t *kctl;
1995
1996 snd_assert(ice->pcm != NULL, return -EIO);
1997
1998 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
1999 if (err < 0)
2000 return err;
2001
2002 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2003 if (err < 0)
2004 return err;
2005
2006 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2007 if (err < 0)
2008 return err;
2009 kctl->id.device = ice->pcm->device;
2010 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2011 if (err < 0)
2012 return err;
2013 kctl->id.device = ice->pcm->device;
2014 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2015 if (err < 0)
2016 return err;
2017 kctl->id.device = ice->pcm->device;
2018 #if 0 /* use default only */
2019 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2020 if (err < 0)
2021 return err;
2022 kctl->id.device = ice->pcm->device;
2023 ice->spdif.stream_ctl = kctl;
2024 #endif
2025 return 0;
2026 }
2027
2028
2029 static int __devinit snd_vt1724_build_controls(ice1712_t *ice)
2030 {
2031 int err;
2032
2033 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2034 if (err < 0)
2035 return err;
2036 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2037 if (err < 0)
2038 return err;
2039
2040 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2041 if (err < 0)
2042 return err;
2043 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2044 if (err < 0)
2045 return err;
2046
2047 if (ice->num_total_dacs > 0) {
2048 snd_kcontrol_new_t tmp = snd_vt1724_mixer_pro_analog_route;
2049 tmp.count = ice->num_total_dacs;
2050 if (ice->vt1720 && tmp.count > 2)
2051 tmp.count = 2;
2052 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2053 if (err < 0)
2054 return err;
2055 }
2056
2057 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2058 if (err < 0)
2059 return err;
2060
2061 return 0;
2062 }
2063
2064 static int snd_vt1724_free(ice1712_t *ice)
2065 {
2066 if (! ice->port)
2067 goto __hw_end;
2068 /* mask all interrupts */
2069 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2070 outb(0xff, ICEREG1724(ice, IRQMASK));
2071 /* --- */
2072 __hw_end:
2073 if (ice->irq >= 0) {
2074 synchronize_irq(ice->irq);
2075 free_irq(ice->irq, (void *) ice);
2076 }
2077 pci_release_regions(ice->pci);
2078 snd_ice1712_akm4xxx_free(ice);
2079 pci_disable_device(ice->pci);
2080 kfree(ice);
2081 return 0;
2082 }
2083
2084 static int snd_vt1724_dev_free(snd_device_t *device)
2085 {
2086 ice1712_t *ice = device->device_data;
2087 return snd_vt1724_free(ice);
2088 }
2089
2090 static int __devinit snd_vt1724_create(snd_card_t * card,
2091 struct pci_dev *pci,
2092 const char *modelname,
2093 ice1712_t ** r_ice1712)
2094 {
2095 ice1712_t *ice;
2096 int err;
2097 unsigned char mask;
2098 static snd_device_ops_t ops = {
2099 .dev_free = snd_vt1724_dev_free,
2100 };
2101
2102 *r_ice1712 = NULL;
2103
2104 /* enable PCI device */
2105 if ((err = pci_enable_device(pci)) < 0)
2106 return err;
2107
2108 ice = kcalloc(1, sizeof(*ice), GFP_KERNEL);
2109 if (ice == NULL) {
2110 pci_disable_device(pci);
2111 return -ENOMEM;
2112 }
2113 ice->vt1724 = 1;
2114 spin_lock_init(&ice->reg_lock);
2115 init_MUTEX(&ice->gpio_mutex);
2116 init_MUTEX(&ice->open_mutex);
2117 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2118 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2119 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2120 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2121 ice->card = card;
2122 ice->pci = pci;
2123 ice->irq = -1;
2124 pci_set_master(pci);
2125 snd_vt1724_proc_init(ice);
2126 synchronize_irq(pci->irq);
2127
2128 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2129 kfree(ice);
2130 pci_disable_device(pci);
2131 return err;
2132 }
2133 ice->port = pci_resource_start(pci, 0);
2134 ice->profi_port = pci_resource_start(pci, 1);
2135
2136 if (request_irq(pci->irq, snd_vt1724_interrupt, SA_INTERRUPT|SA_SHIRQ, "ICE1724", (void *) ice)) {
2137 snd_printk("unable to grab IRQ %d\n", pci->irq);
2138 snd_vt1724_free(ice);
2139 return -EIO;
2140 }
2141
2142 ice->irq = pci->irq;
2143
2144 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2145 snd_vt1724_free(ice);
2146 return -EIO;
2147 }
2148 if (snd_vt1724_chip_init(ice) < 0) {
2149 snd_vt1724_free(ice);
2150 return -EIO;
2151 }
2152
2153 /* unmask used interrupts */
2154 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2155 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2156 else
2157 mask = 0;
2158 outb(mask, ICEREG1724(ice, IRQMASK));
2159 /* don't handle FIFO overrun/underruns (just yet), since they cause machine lockups */
2160 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2161
2162 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2163 snd_vt1724_free(ice);
2164 return err;
2165 }
2166
2167 snd_card_set_dev(card, &pci->dev);
2168
2169 *r_ice1712 = ice;
2170 return 0;
2171 }
2172
2173
2174 /*
2175 *
2176 * Registration
2177 *
2178 */
2179
2180 static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2181 const struct pci_device_id *pci_id)
2182 {
2183 static int dev;
2184 snd_card_t *card;
2185 ice1712_t *ice;
2186 int pcm_dev = 0, err;
2187 struct snd_ice1712_card_info **tbl, *c;
2188
2189 if (dev >= SNDRV_CARDS)
2190 return -ENODEV;
2191 if (!enable[dev]) {
2192 dev++;
2193 return -ENOENT;
2194 }
2195
2196 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2197 if (card == NULL)
2198 return -ENOMEM;
2199
2200 strcpy(card->driver, "ICE1724");
2201 strcpy(card->shortname, "ICEnsemble ICE1724");
2202
2203 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2204 snd_card_free(card);
2205 return err;
2206 }
2207
2208 for (tbl = card_tables; *tbl; tbl++) {
2209 for (c = *tbl; c->subvendor; c++) {
2210 if (c->subvendor == ice->eeprom.subvendor) {
2211 strcpy(card->shortname, c->name);
2212 if (c->driver) /* specific driver? */
2213 strcpy(card->driver, c->driver);
2214 if (c->chip_init) {
2215 if ((err = c->chip_init(ice)) < 0) {
2216 snd_card_free(card);
2217 return err;
2218 }
2219 }
2220 goto __found;
2221 }
2222 }
2223 }
2224 c = &no_matched;
2225 __found:
2226
2227 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2228 snd_card_free(card);
2229 return err;
2230 }
2231
2232 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2233 snd_card_free(card);
2234 return err;
2235 }
2236
2237 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2238 snd_card_free(card);
2239 return err;
2240 }
2241
2242 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2243 snd_card_free(card);
2244 return err;
2245 }
2246
2247 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2248 snd_card_free(card);
2249 return err;
2250 }
2251
2252 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2253 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2254 snd_card_free(card);
2255 return err;
2256 }
2257 }
2258
2259 if (c->build_controls) {
2260 if ((err = c->build_controls(ice)) < 0) {
2261 snd_card_free(card);
2262 return err;
2263 }
2264 }
2265
2266 if (! c->no_mpu401) {
2267 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2268 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2269 ICEREG1724(ice, MPU_CTRL), 1,
2270 ice->irq, 0,
2271 &ice->rmidi[0])) < 0) {
2272 snd_card_free(card);
2273 return err;
2274 }
2275 }
2276 }
2277
2278 sprintf(card->longname, "%s at 0x%lx, irq %i",
2279 card->shortname, ice->port, ice->irq);
2280
2281 if ((err = snd_card_register(card)) < 0) {
2282 snd_card_free(card);
2283 return err;
2284 }
2285 pci_set_drvdata(pci, card);
2286 dev++;
2287 return 0;
2288 }
2289
2290 static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2291 {
2292 snd_card_free(pci_get_drvdata(pci));
2293 pci_set_drvdata(pci, NULL);
2294 }
2295
2296 static struct pci_driver driver = {
2297 .name = "ICE1724",
2298 .id_table = snd_vt1724_ids,
2299 .probe = snd_vt1724_probe,
2300 .remove = __devexit_p(snd_vt1724_remove),
2301 };
2302
2303 static int __init alsa_card_ice1724_init(void)
2304 {
2305 return pci_module_init(&driver);
2306 }
2307
2308 static void __exit alsa_card_ice1724_exit(void)
2309 {
2310 pci_unregister_driver(&driver);
2311 }
2312
2313 module_init(alsa_card_ice1724_init)
2314 module_exit(alsa_card_ice1724_exit)
2315
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