1 /*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP AC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
41
42 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
46 static char *ac97_quirk[SNDRV_CARDS];
47 static int spdif_aclink[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
48
49 module_param_array(index, int, NULL, 0444);
50 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51 module_param_array(id, charp, NULL, 0444);
52 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
53 module_param_array(enable, bool, NULL, 0444);
54 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
55 module_param_array(ac97_clock, int, NULL, 0444);
56 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
57 module_param_array(ac97_quirk, charp, NULL, 0444);
58 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
59 module_param_array(spdif_aclink, bool, NULL, 0444);
60 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
62
63 /*
64 */
65
66 #define ATI_REG_ISR 0x00 /* interrupt source */
67 #define ATI_REG_ISR_IN_XRUN (1U<<0)
68 #define ATI_REG_ISR_IN_STATUS (1U<<1)
69 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
70 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
71 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
72 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
73 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
74 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
75 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
76 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
77 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
78 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
79
80 #define ATI_REG_IER 0x04 /* interrupt enable */
81 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
82 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
83 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
84 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
85 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
86 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
87 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
88 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
89 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
90 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
91 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
92 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
93 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
94
95 #define ATI_REG_CMD 0x08 /* command */
96 #define ATI_REG_CMD_POWERDOWN (1U<<0)
97 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
98 #define ATI_REG_CMD_SEND_EN (1U<<2)
99 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
100 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
101 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
102 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
103 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
104 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
105 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
106 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
107 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
108 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
109 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
110 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
111 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
112 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
113 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
114 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
115 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
116 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
117 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
118 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
119 #define ATI_REG_CMD_BURST_EN (1U<<25)
120 #define ATI_REG_CMD_PANIC_EN (1U<<26)
121 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
122 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
123 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
124 #define ATI_REG_CMD_AC_SYNC (1U<<30)
125 #define ATI_REG_CMD_AC_RESET (1U<<31)
126
127 #define ATI_REG_PHYS_OUT_ADDR 0x0c
128 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
129 #define ATI_REG_PHYS_OUT_RW (1U<<2)
130 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
131 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
132 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
133
134 #define ATI_REG_PHYS_IN_ADDR 0x10
135 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
136 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
137 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
138
139 #define ATI_REG_SLOTREQ 0x14
140
141 #define ATI_REG_COUNTER 0x18
142 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
143 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
144
145 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
146
147 #define ATI_REG_IN_DMA_LINKPTR 0x20
148 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
149 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
150 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
151 #define ATI_REG_IN_DMA_DT_SIZE 0x30
152
153 #define ATI_REG_OUT_DMA_SLOT 0x34
154 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
155 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
156 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
157 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
158
159 #define ATI_REG_OUT_DMA_LINKPTR 0x38
160 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
161 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
162 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
163 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
164
165 #define ATI_REG_SPDF_CMD 0x4c
166 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
167 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
168 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
169
170 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
171 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
172 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
173 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
174 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
175
176 #define ATI_REG_MODEM_MIRROR 0x7c
177 #define ATI_REG_AUDIO_MIRROR 0x80
178
179 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
180 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
181
182 #define ATI_REG_FIFO_FLUSH 0x88
183 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
184 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
185
186 /* LINKPTR */
187 #define ATI_REG_LINKPTR_EN (1U<<0)
188
189 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
190 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
191 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
192 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
193 #define ATI_REG_DMA_STATE (7U<<26)
194
195
196 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
197
198
199 /*
200 */
201
202 typedef struct snd_atiixp atiixp_t;
203 typedef struct snd_atiixp_dma atiixp_dma_t;
204 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
205
206
207 /*
208 * DMA packate descriptor
209 */
210
211 typedef struct atiixp_dma_desc {
212 u32 addr; /* DMA buffer address */
213 u16 status; /* status bits */
214 u16 size; /* size of the packet in dwords */
215 u32 next; /* address of the next packet descriptor */
216 } atiixp_dma_desc_t;
217
218 /*
219 * stream enum
220 */
221 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
222 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
223 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
224
225 #define NUM_ATI_CODECS 3
226
227
228 /*
229 * constants and callbacks for each DMA type
230 */
231 struct snd_atiixp_dma_ops {
232 int type; /* ATI_DMA_XXX */
233 unsigned int llp_offset; /* LINKPTR offset */
234 unsigned int dt_cur; /* DT_CUR offset */
235 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
236 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
237 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
238 };
239
240 /*
241 * DMA stream
242 */
243 struct snd_atiixp_dma {
244 const atiixp_dma_ops_t *ops;
245 struct snd_dma_buffer desc_buf;
246 snd_pcm_substream_t *substream; /* assigned PCM substream */
247 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
248 unsigned int period_bytes, periods;
249 int opened;
250 int running;
251 int pcm_open_flag;
252 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
253 };
254
255 /*
256 * ATI IXP chip
257 */
258 struct snd_atiixp {
259 snd_card_t *card;
260 struct pci_dev *pci;
261
262 unsigned long addr;
263 void __iomem *remap_addr;
264 int irq;
265
266 ac97_bus_t *ac97_bus;
267 ac97_t *ac97[NUM_ATI_CODECS];
268
269 spinlock_t reg_lock;
270
271 atiixp_dma_t dmas[NUM_ATI_DMAS];
272 struct ac97_pcm *pcms[NUM_ATI_PCMS];
273 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
274
275 int max_channels; /* max. channels for PCM out */
276
277 unsigned int codec_not_ready_bits; /* for codec detection */
278
279 int spdif_over_aclink; /* passed from the module option */
280 struct semaphore open_mutex; /* playback open mutex */
281 };
282
283
284 /*
285 */
286 static struct pci_device_id snd_atiixp_ids[] = {
287 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
288 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
289 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
290 { 0, }
291 };
292
293 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
294
295
296 /*
297 * lowlevel functions
298 */
299
300 /*
301 * update the bits of the given register.
302 * return 1 if the bits changed.
303 */
304 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
305 unsigned int mask, unsigned int value)
306 {
307 void __iomem *addr = chip->remap_addr + reg;
308 unsigned int data, old_data;
309 old_data = data = readl(addr);
310 data &= ~mask;
311 data |= value;
312 if (old_data == data)
313 return 0;
314 writel(data, addr);
315 return 1;
316 }
317
318 /*
319 * macros for easy use
320 */
321 #define atiixp_write(chip,reg,value) \
322 writel(value, chip->remap_addr + ATI_REG_##reg)
323 #define atiixp_read(chip,reg) \
324 readl(chip->remap_addr + ATI_REG_##reg)
325 #define atiixp_update(chip,reg,mask,val) \
326 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
327
328 /* delay for one tick */
329 #define do_delay() do { \
330 set_current_state(TASK_UNINTERRUPTIBLE); \
331 schedule_timeout(1); \
332 } while (0)
333
334
335 /*
336 * handling DMA packets
337 *
338 * we allocate a linear buffer for the DMA, and split it to each packet.
339 * in a future version, a scatter-gather buffer should be implemented.
340 */
341
342 #define ATI_DESC_LIST_SIZE \
343 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
344
345 /*
346 * build packets ring for the given buffer size.
347 *
348 * IXP handles the buffer descriptors, which are connected as a linked
349 * list. although we can change the list dynamically, in this version,
350 * a static RING of buffer descriptors is used.
351 *
352 * the ring is built in this function, and is set up to the hardware.
353 */
354 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
355 snd_pcm_substream_t *substream,
356 unsigned int periods,
357 unsigned int period_bytes)
358 {
359 unsigned int i;
360 u32 addr, desc_addr;
361 unsigned long flags;
362
363 if (periods > ATI_MAX_DESCRIPTORS)
364 return -ENOMEM;
365
366 if (dma->desc_buf.area == NULL) {
367 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
368 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
369 return -ENOMEM;
370 dma->period_bytes = dma->periods = 0; /* clear */
371 }
372
373 if (dma->periods == periods && dma->period_bytes == period_bytes)
374 return 0;
375
376 /* reset DMA before changing the descriptor table */
377 spin_lock_irqsave(&chip->reg_lock, flags);
378 writel(0, chip->remap_addr + dma->ops->llp_offset);
379 dma->ops->enable_dma(chip, 0);
380 dma->ops->enable_dma(chip, 1);
381 spin_unlock_irqrestore(&chip->reg_lock, flags);
382
383 /* fill the entries */
384 addr = (u32)substream->runtime->dma_addr;
385 desc_addr = (u32)dma->desc_buf.addr;
386 for (i = 0; i < periods; i++) {
387 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
388 desc->addr = cpu_to_le32(addr);
389 desc->status = 0;
390 desc->size = period_bytes >> 2; /* in dwords */
391 desc_addr += sizeof(atiixp_dma_desc_t);
392 if (i == periods - 1)
393 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
394 else
395 desc->next = cpu_to_le32(desc_addr);
396 addr += period_bytes;
397 }
398
399 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
400 chip->remap_addr + dma->ops->llp_offset);
401
402 dma->period_bytes = period_bytes;
403 dma->periods = periods;
404
405 return 0;
406 }
407
408 /*
409 * remove the ring buffer and release it if assigned
410 */
411 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
412 {
413 if (dma->desc_buf.area) {
414 writel(0, chip->remap_addr + dma->ops->llp_offset);
415 snd_dma_free_pages(&dma->desc_buf);
416 dma->desc_buf.area = NULL;
417 }
418 }
419
420 /*
421 * AC97 interface
422 */
423 static int snd_atiixp_acquire_codec(atiixp_t *chip)
424 {
425 int timeout = 1000;
426
427 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
428 if (! timeout--) {
429 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
430 return -EBUSY;
431 }
432 udelay(1);
433 }
434 return 0;
435 }
436
437 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
438 {
439 unsigned int data;
440 int timeout;
441
442 if (snd_atiixp_acquire_codec(chip) < 0)
443 return 0xffff;
444 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
445 ATI_REG_PHYS_OUT_ADDR_EN |
446 ATI_REG_PHYS_OUT_RW |
447 codec;
448 atiixp_write(chip, PHYS_OUT_ADDR, data);
449 if (snd_atiixp_acquire_codec(chip) < 0)
450 return 0xffff;
451 timeout = 1000;
452 do {
453 data = atiixp_read(chip, PHYS_IN_ADDR);
454 if (data & ATI_REG_PHYS_IN_READ_FLAG)
455 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
456 udelay(1);
457 } while (--timeout);
458 /* time out may happen during reset */
459 if (reg < 0x7c)
460 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
461 return 0xffff;
462 }
463
464
465 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
466 {
467 unsigned int data;
468
469 if (snd_atiixp_acquire_codec(chip) < 0)
470 return;
471 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
472 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
473 ATI_REG_PHYS_OUT_ADDR_EN | codec;
474 atiixp_write(chip, PHYS_OUT_ADDR, data);
475 }
476
477
478 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
479 {
480 atiixp_t *chip = ac97->private_data;
481 return snd_atiixp_codec_read(chip, ac97->num, reg);
482
483 }
484
485 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
486 {
487 atiixp_t *chip = ac97->private_data;
488 snd_atiixp_codec_write(chip, ac97->num, reg, val);
489 }
490
491 /*
492 * reset AC link
493 */
494 static int snd_atiixp_aclink_reset(atiixp_t *chip)
495 {
496 int timeout;
497
498 /* reset powerdoewn */
499 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
500 udelay(10);
501
502 /* perform a software reset */
503 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
504 atiixp_read(chip, CMD);
505 udelay(10);
506 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
507
508 timeout = 10;
509 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
510 /* do a hard reset */
511 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
512 ATI_REG_CMD_AC_SYNC);
513 atiixp_read(chip, CMD);
514 do_delay();
515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
516 if (--timeout) {
517 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
518 break;
519 }
520 }
521
522 /* deassert RESET and assert SYNC to make sure */
523 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
524 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
525
526 return 0;
527 }
528
529 #ifdef CONFIG_PM
530 static int snd_atiixp_aclink_down(atiixp_t *chip)
531 {
532 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
533 // return -EBUSY;
534 atiixp_update(chip, CMD,
535 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
536 ATI_REG_CMD_POWERDOWN);
537 return 0;
538 }
539 #endif
540
541 /*
542 * auto-detection of codecs
543 *
544 * the IXP chip can generate interrupts for the non-existing codecs.
545 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
546 * even if all three codecs are connected.
547 */
548
549 #define ALL_CODEC_NOT_READY \
550 (ATI_REG_ISR_CODEC0_NOT_READY |\
551 ATI_REG_ISR_CODEC1_NOT_READY |\
552 ATI_REG_ISR_CODEC2_NOT_READY)
553 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
554
555 static int snd_atiixp_codec_detect(atiixp_t *chip)
556 {
557 int timeout;
558
559 chip->codec_not_ready_bits = 0;
560 atiixp_write(chip, IER, CODEC_CHECK_BITS);
561 /* wait for the interrupts */
562 timeout = HZ / 10;
563 while (timeout-- > 0) {
564 do_delay();
565 if (chip->codec_not_ready_bits)
566 break;
567 }
568 atiixp_write(chip, IER, 0); /* disable irqs */
569
570 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
571 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
572 return -ENXIO;
573 }
574 return 0;
575 }
576
577
578 /*
579 * enable DMA and irqs
580 */
581 static int snd_atiixp_chip_start(atiixp_t *chip)
582 {
583 unsigned int reg;
584
585 /* set up spdif, enable burst mode */
586 reg = atiixp_read(chip, CMD);
587 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
588 reg |= ATI_REG_CMD_BURST_EN;
589 atiixp_write(chip, CMD, reg);
590
591 reg = atiixp_read(chip, SPDF_CMD);
592 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
593 atiixp_write(chip, SPDF_CMD, reg);
594
595 /* clear all interrupt source */
596 atiixp_write(chip, ISR, 0xffffffff);
597 /* enable irqs */
598 atiixp_write(chip, IER,
599 ATI_REG_IER_IO_STATUS_EN |
600 ATI_REG_IER_IN_XRUN_EN |
601 ATI_REG_IER_OUT_XRUN_EN |
602 ATI_REG_IER_SPDF_XRUN_EN |
603 ATI_REG_IER_SPDF_STATUS_EN);
604 return 0;
605 }
606
607
608 /*
609 * disable DMA and IRQs
610 */
611 static int snd_atiixp_chip_stop(atiixp_t *chip)
612 {
613 /* clear interrupt source */
614 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
615 /* disable irqs */
616 atiixp_write(chip, IER, 0);
617 return 0;
618 }
619
620
621 /*
622 * PCM section
623 */
624
625 /*
626 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
627 * position. when SG-buffer is implemented, the offset must be calculated
628 * correctly...
629 */
630 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
631 {
632 atiixp_t *chip = snd_pcm_substream_chip(substream);
633 snd_pcm_runtime_t *runtime = substream->runtime;
634 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
635 unsigned int curptr;
636 int timeout = 1000;
637
638 while (timeout--) {
639 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
640 if (curptr < dma->buf_addr)
641 continue;
642 curptr -= dma->buf_addr;
643 if (curptr >= dma->buf_bytes)
644 continue;
645 return bytes_to_frames(runtime, curptr);
646 }
647 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
648 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
649 return 0;
650 }
651
652 /*
653 * XRUN detected, and stop the PCM substream
654 */
655 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
656 {
657 if (! dma->substream || ! dma->running)
658 return;
659 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
660 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
661 }
662
663 /*
664 * the period ack. update the substream.
665 */
666 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
667 {
668 if (! dma->substream || ! dma->running)
669 return;
670 snd_pcm_period_elapsed(dma->substream);
671 }
672
673 /* set BUS_BUSY interrupt bit if any DMA is running */
674 /* call with spinlock held */
675 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
676 {
677 unsigned int bus_busy;
678 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
679 ATI_REG_CMD_RECEIVE_EN |
680 ATI_REG_CMD_SPDF_OUT_EN))
681 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
682 else
683 bus_busy = 0;
684 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
685 }
686
687 /* common trigger callback
688 * calling the lowlevel callbacks in it
689 */
690 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
691 {
692 atiixp_t *chip = snd_pcm_substream_chip(substream);
693 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
694 int err = 0;
695
696 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
697
698 spin_lock(&chip->reg_lock);
699 switch (cmd) {
700 case SNDRV_PCM_TRIGGER_START:
701 dma->ops->enable_transfer(chip, 1);
702 dma->running = 1;
703 break;
704 case SNDRV_PCM_TRIGGER_STOP:
705 dma->ops->enable_transfer(chip, 0);
706 dma->running = 0;
707 break;
708 default:
709 err = -EINVAL;
710 break;
711 }
712 if (! err) {
713 snd_atiixp_check_bus_busy(chip);
714 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
715 dma->ops->flush_dma(chip);
716 snd_atiixp_check_bus_busy(chip);
717 }
718 }
719 spin_unlock(&chip->reg_lock);
720 return err;
721 }
722
723
724 /*
725 * lowlevel callbacks for each DMA type
726 *
727 * every callback is supposed to be called in chip->reg_lock spinlock
728 */
729
730 /* flush FIFO of analog OUT DMA */
731 static void atiixp_out_flush_dma(atiixp_t *chip)
732 {
733 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
734 }
735
736 /* enable/disable analog OUT DMA */
737 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
738 {
739 unsigned int data;
740 data = atiixp_read(chip, CMD);
741 if (on) {
742 if (data & ATI_REG_CMD_OUT_DMA_EN)
743 return;
744 atiixp_out_flush_dma(chip);
745 data |= ATI_REG_CMD_OUT_DMA_EN;
746 } else
747 data &= ~ATI_REG_CMD_OUT_DMA_EN;
748 atiixp_write(chip, CMD, data);
749 }
750
751 /* start/stop transfer over OUT DMA */
752 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
753 {
754 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
755 on ? ATI_REG_CMD_SEND_EN : 0);
756 }
757
758 /* enable/disable analog IN DMA */
759 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
760 {
761 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
762 on ? ATI_REG_CMD_IN_DMA_EN : 0);
763 }
764
765 /* start/stop analog IN DMA */
766 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
767 {
768 if (on) {
769 unsigned int data = atiixp_read(chip, CMD);
770 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
771 data |= ATI_REG_CMD_RECEIVE_EN;
772 #if 0 /* FIXME: this causes the endless loop */
773 /* wait until slot 3/4 are finished */
774 while ((atiixp_read(chip, COUNTER) &
775 ATI_REG_COUNTER_SLOT) != 5)
776 ;
777 #endif
778 atiixp_write(chip, CMD, data);
779 }
780 } else
781 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
782 }
783
784 /* flush FIFO of analog IN DMA */
785 static void atiixp_in_flush_dma(atiixp_t *chip)
786 {
787 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
788 }
789
790 /* enable/disable SPDIF OUT DMA */
791 static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
792 {
793 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
794 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
795 }
796
797 /* start/stop SPDIF OUT DMA */
798 static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
799 {
800 unsigned int data;
801 data = atiixp_read(chip, CMD);
802 if (on)
803 data |= ATI_REG_CMD_SPDF_OUT_EN;
804 else
805 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
806 atiixp_write(chip, CMD, data);
807 }
808
809 /* flush FIFO of SPDIF OUT DMA */
810 static void atiixp_spdif_flush_dma(atiixp_t *chip)
811 {
812 int timeout;
813
814 /* DMA off, transfer on */
815 atiixp_spdif_enable_dma(chip, 0);
816 atiixp_spdif_enable_transfer(chip, 1);
817
818 timeout = 100;
819 do {
820 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
821 break;
822 udelay(1);
823 } while (timeout-- > 0);
824
825 atiixp_spdif_enable_transfer(chip, 0);
826 }
827
828 /* set up slots and formats for SPDIF OUT */
829 static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
830 {
831 atiixp_t *chip = snd_pcm_substream_chip(substream);
832
833 spin_lock_irq(&chip->reg_lock);
834 if (chip->spdif_over_aclink) {
835 unsigned int data;
836 /* enable slots 10/11 */
837 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
838 ATI_REG_CMD_SPDF_CONFIG_01);
839 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
840 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
841 ATI_REG_OUT_DMA_SLOT_BIT(11);
842 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
843 atiixp_write(chip, OUT_DMA_SLOT, data);
844 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
845 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
846 ATI_REG_CMD_INTERLEAVE_OUT : 0);
847 } else {
848 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
849 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
850 }
851 spin_unlock_irq(&chip->reg_lock);
852 return 0;
853 }
854
855 /* set up slots and formats for analog OUT */
856 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
857 {
858 atiixp_t *chip = snd_pcm_substream_chip(substream);
859 unsigned int data;
860
861 spin_lock_irq(&chip->reg_lock);
862 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
863 switch (substream->runtime->channels) {
864 case 8:
865 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
866 ATI_REG_OUT_DMA_SLOT_BIT(11);
867 /* fallthru */
868 case 6:
869 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
870 ATI_REG_OUT_DMA_SLOT_BIT(8);
871 /* fallthru */
872 case 4:
873 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
874 ATI_REG_OUT_DMA_SLOT_BIT(9);
875 /* fallthru */
876 default:
877 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
878 ATI_REG_OUT_DMA_SLOT_BIT(4);
879 break;
880 }
881
882 /* set output threshold */
883 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
884 atiixp_write(chip, OUT_DMA_SLOT, data);
885
886 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
887 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
888 ATI_REG_CMD_INTERLEAVE_OUT : 0);
889
890 /*
891 * enable 6 channel re-ordering bit if needed
892 */
893 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
894 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
895
896 spin_unlock_irq(&chip->reg_lock);
897 return 0;
898 }
899
900 /* set up slots and formats for analog IN */
901 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
902 {
903 atiixp_t *chip = snd_pcm_substream_chip(substream);
904
905 spin_lock_irq(&chip->reg_lock);
906 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
907 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
908 ATI_REG_CMD_INTERLEAVE_IN : 0);
909 spin_unlock_irq(&chip->reg_lock);
910 return 0;
911 }
912
913 /*
914 * hw_params - allocate the buffer and set up buffer descriptors
915 */
916 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
917 snd_pcm_hw_params_t *hw_params)
918 {
919 atiixp_t *chip = snd_pcm_substream_chip(substream);
920 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
921 int err;
922
923 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
924 if (err < 0)
925 return err;
926 dma->buf_addr = substream->runtime->dma_addr;
927 dma->buf_bytes = params_buffer_bytes(hw_params);
928
929 err = atiixp_build_dma_packets(chip, dma, substream,
930 params_periods(hw_params),
931 params_period_bytes(hw_params));
932 if (err < 0)
933 return err;
934
935 if (dma->ac97_pcm_type >= 0) {
936 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
937 /* PCM is bound to AC97 codec(s)
938 * set up the AC97 codecs
939 */
940 if (dma->pcm_open_flag) {
941 snd_ac97_pcm_close(pcm);
942 dma->pcm_open_flag = 0;
943 }
944 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
945 params_channels(hw_params),
946 pcm->r[0].slots);
947 if (err >= 0)
948 dma->pcm_open_flag = 1;
949 }
950
951 return err;
952 }
953
954 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
955 {
956 atiixp_t *chip = snd_pcm_substream_chip(substream);
957 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
958
959 if (dma->pcm_open_flag) {
960 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
961 snd_ac97_pcm_close(pcm);
962 dma->pcm_open_flag = 0;
963 }
964 atiixp_clear_dma_packets(chip, dma, substream);
965 snd_pcm_lib_free_pages(substream);
966 return 0;
967 }
968
969
970 /*
971 * pcm hardware definition, identical for all DMA types
972 */
973 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
974 {
975 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
976 SNDRV_PCM_INFO_BLOCK_TRANSFER |
977 SNDRV_PCM_INFO_RESUME |
978 SNDRV_PCM_INFO_MMAP_VALID),
979 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
980 .rates = SNDRV_PCM_RATE_48000,
981 .rate_min = 48000,
982 .rate_max = 48000,
983 .channels_min = 2,
984 .channels_max = 2,
985 .buffer_bytes_max = 256 * 1024,
986 .period_bytes_min = 32,
987 .period_bytes_max = 128 * 1024,
988 .periods_min = 2,
989 .periods_max = ATI_MAX_DESCRIPTORS,
990 };
991
992 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
993 {
994 atiixp_t *chip = snd_pcm_substream_chip(substream);
995 snd_pcm_runtime_t *runtime = substream->runtime;
996 int err;
997
998 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
999
1000 if (dma->opened)
1001 return -EBUSY;
1002 dma->substream = substream;
1003 runtime->hw = snd_atiixp_pcm_hw;
1004 dma->ac97_pcm_type = pcm_type;
1005 if (pcm_type >= 0) {
1006 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1007 snd_pcm_limit_hw_rates(runtime);
1008 } else {
1009 /* direct SPDIF */
1010 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1011 }
1012 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1013 return err;
1014 runtime->private_data = dma;
1015
1016 /* enable DMA bits */
1017 spin_lock_irq(&chip->reg_lock);
1018 dma->ops->enable_dma(chip, 1);
1019 spin_unlock_irq(&chip->reg_lock);
1020 dma->opened = 1;
1021
1022 return 0;
1023 }
1024
1025 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
1026 {
1027 atiixp_t *chip = snd_pcm_substream_chip(substream);
1028 /* disable DMA bits */
1029 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1030 spin_lock_irq(&chip->reg_lock);
1031 dma->ops->enable_dma(chip, 0);
1032 spin_unlock_irq(&chip->reg_lock);
1033 dma->substream = NULL;
1034 dma->opened = 0;
1035 return 0;
1036 }
1037
1038 /*
1039 */
1040 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
1041 {
1042 atiixp_t *chip = snd_pcm_substream_chip(substream);
1043 int err;
1044
1045 down(&chip->open_mutex);
1046 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1047 up(&chip->open_mutex);
1048 if (err < 0)
1049 return err;
1050 substream->runtime->hw.channels_max = chip->max_channels;
1051 if (chip->max_channels > 2)
1052 /* channels must be even */
1053 snd_pcm_hw_constraint_step(substream->runtime, 0,
1054 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1055 return 0;
1056 }
1057
1058 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
1059 {
1060 atiixp_t *chip = snd_pcm_substream_chip(substream);
1061 int err;
1062 down(&chip->open_mutex);
1063 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1064 up(&chip->open_mutex);
1065 return err;
1066 }
1067
1068 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
1069 {
1070 atiixp_t *chip = snd_pcm_substream_chip(substream);
1071 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1072 }
1073
1074 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
1075 {
1076 atiixp_t *chip = snd_pcm_substream_chip(substream);
1077 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1078 }
1079
1080 static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
1081 {
1082 atiixp_t *chip = snd_pcm_substream_chip(substream);
1083 int err;
1084 down(&chip->open_mutex);
1085 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1086 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1087 else
1088 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1089 up(&chip->open_mutex);
1090 return err;
1091 }
1092
1093 static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
1094 {
1095 atiixp_t *chip = snd_pcm_substream_chip(substream);
1096 int err;
1097 down(&chip->open_mutex);
1098 if (chip->spdif_over_aclink)
1099 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1100 else
1101 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1102 up(&chip->open_mutex);
1103 return err;
1104 }
1105
1106 /* AC97 playback */
1107 static snd_pcm_ops_t snd_atiixp_playback_ops = {
1108 .open = snd_atiixp_playback_open,
1109 .close = snd_atiixp_playback_close,
1110 .ioctl = snd_pcm_lib_ioctl,
1111 .hw_params = snd_atiixp_pcm_hw_params,
1112 .hw_free = snd_atiixp_pcm_hw_free,
1113 .prepare = snd_atiixp_playback_prepare,
1114 .trigger = snd_atiixp_pcm_trigger,
1115 .pointer = snd_atiixp_pcm_pointer,
1116 };
1117
1118 /* AC97 capture */
1119 static snd_pcm_ops_t snd_atiixp_capture_ops = {
1120 .open = snd_atiixp_capture_open,
1121 .close = snd_atiixp_capture_close,
1122 .ioctl = snd_pcm_lib_ioctl,
1123 .hw_params = snd_atiixp_pcm_hw_params,
1124 .hw_free = snd_atiixp_pcm_hw_free,
1125 .prepare = snd_atiixp_capture_prepare,
1126 .trigger = snd_atiixp_pcm_trigger,
1127 .pointer = snd_atiixp_pcm_pointer,
1128 };
1129
1130 /* SPDIF playback */
1131 static snd_pcm_ops_t snd_atiixp_spdif_ops = {
1132 .open = snd_atiixp_spdif_open,
1133 .close = snd_atiixp_spdif_close,
1134 .ioctl = snd_pcm_lib_ioctl,
1135 .hw_params = snd_atiixp_pcm_hw_params,
1136 .hw_free = snd_atiixp_pcm_hw_free,
1137 .prepare = snd_atiixp_spdif_prepare,
1138 .trigger = snd_atiixp_pcm_trigger,
1139 .pointer = snd_atiixp_pcm_pointer,
1140 };
1141
1142 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1143 /* front PCM */
1144 {
1145 .exclusive = 1,
1146 .r = { {
1147 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1148 (1 << AC97_SLOT_PCM_RIGHT) |
1149 (1 << AC97_SLOT_PCM_CENTER) |
1150 (1 << AC97_SLOT_PCM_SLEFT) |
1151 (1 << AC97_SLOT_PCM_SRIGHT) |
1152 (1 << AC97_SLOT_LFE)
1153 }
1154 }
1155 },
1156 /* PCM IN #1 */
1157 {
1158 .stream = 1,
1159 .exclusive = 1,
1160 .r = { {
1161 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1162 (1 << AC97_SLOT_PCM_RIGHT)
1163 }
1164 }
1165 },
1166 /* S/PDIF OUT (optional) */
1167 {
1168 .exclusive = 1,
1169 .spdif = 1,
1170 .r = { {
1171 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1172 (1 << AC97_SLOT_SPDIF_RIGHT2)
1173 }
1174 }
1175 },
1176 };
1177
1178 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
1179 .type = ATI_DMA_PLAYBACK,
1180 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1181 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1182 .enable_dma = atiixp_out_enable_dma,
1183 .enable_transfer = atiixp_out_enable_transfer,
1184 .flush_dma = atiixp_out_flush_dma,
1185 };
1186
1187 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
1188 .type = ATI_DMA_CAPTURE,
1189 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1190 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1191 .enable_dma = atiixp_in_enable_dma,
1192 .enable_transfer = atiixp_in_enable_transfer,
1193 .flush_dma = atiixp_in_flush_dma,
1194 };
1195
1196 static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
1197 .type = ATI_DMA_SPDIF,
1198 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1199 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1200 .enable_dma = atiixp_spdif_enable_dma,
1201 .enable_transfer = atiixp_spdif_enable_transfer,
1202 .flush_dma = atiixp_spdif_flush_dma,
1203 };
1204
1205
1206 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
1207 {
1208 snd_pcm_t *pcm;
1209 ac97_bus_t *pbus = chip->ac97_bus;
1210 int err, i, num_pcms;
1211
1212 /* initialize constants */
1213 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1214 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1215 if (! chip->spdif_over_aclink)
1216 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1217
1218 /* assign AC97 pcm */
1219 if (chip->spdif_over_aclink)
1220 num_pcms = 3;
1221 else
1222 num_pcms = 2;
1223 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1224 if (err < 0)
1225 return err;
1226 for (i = 0; i < num_pcms; i++)
1227 chip->pcms[i] = &pbus->pcms[i];
1228
1229 chip->max_channels = 2;
1230 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1231 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1232 chip->max_channels = 6;
1233 else
1234 chip->max_channels = 4;
1235 }
1236
1237 /* PCM #0: analog I/O */
1238 err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1239 if (err < 0)
1240 return err;
1241 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1242 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1243 pcm->private_data = chip;
1244 strcpy(pcm->name, "ATI IXP AC97");
1245 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1246
1247 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1248 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1249
1250 /* no SPDIF support on codec? */
1251 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1252 return 0;
1253
1254 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1255 if (chip->pcms[ATI_PCM_SPDIF])
1256 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1257
1258 /* PCM #1: spdif playback */
1259 err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1260 if (err < 0)
1261 return err;
1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1263 pcm->private_data = chip;
1264 if (chip->spdif_over_aclink)
1265 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1266 else
1267 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1268 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1269
1270 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1271 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
1272
1273 /* pre-select AC97 SPDIF slots 10/11 */
1274 for (i = 0; i < NUM_ATI_CODECS; i++) {
1275 if (chip->ac97[i])
1276 snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
1277 }
1278
1279 return 0;
1280 }
1281
1282
1283
1284 /*
1285 * interrupt handler
1286 */
1287 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1288 {
1289 atiixp_t *chip = dev_id;
1290 unsigned int status;
1291
1292 status = atiixp_read(chip, ISR);
1293
1294 if (! status)
1295 return IRQ_NONE;
1296
1297 /* process audio DMA */
1298 if (status & ATI_REG_ISR_OUT_XRUN)
1299 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1300 else if (status & ATI_REG_ISR_OUT_STATUS)
1301 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1302 if (status & ATI_REG_ISR_IN_XRUN)
1303 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1304 else if (status & ATI_REG_ISR_IN_STATUS)
1305 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1306 if (! chip->spdif_over_aclink) {
1307 if (status & ATI_REG_ISR_SPDF_XRUN)
1308 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1309 else if (status & ATI_REG_ISR_SPDF_STATUS)
1310 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1311 }
1312
1313 /* for codec detection */
1314 if (status & CODEC_CHECK_BITS) {
1315 unsigned int detected;
1316 detected = status & CODEC_CHECK_BITS;
1317 spin_lock(&chip->reg_lock);
1318 chip->codec_not_ready_bits |= detected;
1319 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1320 spin_unlock(&chip->reg_lock);
1321 }
1322
1323 /* ack */
1324 atiixp_write(chip, ISR, status);
1325
1326 return IRQ_HANDLED;
1327 }
1328
1329
1330 /*
1331 * ac97 mixer section
1332 */
1333
1334 static struct ac97_quirk ac97_quirks[] __devinitdata = {
1335 {
1336 .vendor = 0x103c,
1337 .device = 0x006b,
1338 .name = "HP Pavilion ZV5030US",
1339 .type = AC97_TUNE_MUTE_LED
1340 },
1341 { } /* terminator */
1342 };
1343
1344 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock, const char *quirk_override)
1345 {
1346 ac97_bus_t *pbus;
1347 ac97_template_t ac97;
1348 int i, err;
1349 int codec_count;
1350 static ac97_bus_ops_t ops = {
1351 .write = snd_atiixp_ac97_write,
1352 .read = snd_atiixp_ac97_read,
1353 };
1354 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1355 ATI_REG_ISR_CODEC0_NOT_READY,
1356 ATI_REG_ISR_CODEC1_NOT_READY,
1357 ATI_REG_ISR_CODEC2_NOT_READY,
1358 };
1359
1360 if (snd_atiixp_codec_detect(chip) < 0)
1361 return -ENXIO;
1362
1363 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1364 return err;
1365 pbus->clock = clock;
1366 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with modem driver */
1367 chip->ac97_bus = pbus;
1368
1369 codec_count = 0;
1370 for (i = 0; i < NUM_ATI_CODECS; i++) {
1371 if (chip->codec_not_ready_bits & codec_skip[i])
1372 continue;
1373 memset(&ac97, 0, sizeof(ac97));
1374 ac97.private_data = chip;
1375 ac97.pci = chip->pci;
1376 ac97.num = i;
1377 ac97.scaps = AC97_SCAP_SKIP_MODEM;
1378 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1379 chip->ac97[i] = NULL; /* to be sure */
1380 snd_printdd("atiixp: codec %d not available for audio\n", i);
1381 continue;
1382 }
1383 codec_count++;
1384 }
1385
1386 if (! codec_count) {
1387 snd_printk(KERN_ERR "atiixp: no codec available\n");
1388 return -ENODEV;
1389 }
1390
1391 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1392
1393 return 0;
1394 }
1395
1396
1397 #ifdef CONFIG_PM
1398 /*
1399 * power management
1400 */
1401 static int snd_atiixp_suspend(snd_card_t *card, unsigned int state)
1402 {
1403 atiixp_t *chip = card->pm_private_data;
1404 int i;
1405
1406 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1407 if (chip->pcmdevs[i])
1408 snd_pcm_suspend_all(chip->pcmdevs[i]);
1409 for (i = 0; i < NUM_ATI_CODECS; i++)
1410 if (chip->ac97[i])
1411 snd_ac97_suspend(chip->ac97[i]);
1412 snd_atiixp_aclink_down(chip);
1413 snd_atiixp_chip_stop(chip);
1414
1415 pci_set_power_state(chip->pci, 3);
1416 pci_disable_device(chip->pci);
1417 return 0;
1418 }
1419
1420 static int snd_atiixp_resume(snd_card_t *card, unsigned int state)
1421 {
1422 atiixp_t *chip = card->pm_private_data;
1423 int i;
1424
1425 pci_enable_device(chip->pci);
1426 pci_set_power_state(chip->pci, 0);
1427 pci_set_master(chip->pci);
1428
1429 snd_atiixp_aclink_reset(chip);
1430 snd_atiixp_chip_start(chip);
1431
1432 for (i = 0; i < NUM_ATI_CODECS; i++)
1433 if (chip->ac97[i])
1434 snd_ac97_resume(chip->ac97[i]);
1435
1436 return 0;
1437 }
1438 #endif /* CONFIG_PM */
1439
1440
1441 /*
1442 * proc interface for register dump
1443 */
1444
1445 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1446 {
1447 atiixp_t *chip = entry->private_data;
1448 int i;
1449
1450 for (i = 0; i < 256; i += 4)
1451 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1452 }
1453
1454 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1455 {
1456 snd_info_entry_t *entry;
1457
1458 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1459 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1460 }
1461
1462
1463
1464 /*
1465 * destructor
1466 */
1467
1468 static int snd_atiixp_free(atiixp_t *chip)
1469 {
1470 if (chip->irq < 0)
1471 goto __hw_end;
1472 snd_atiixp_chip_stop(chip);
1473 synchronize_irq(chip->irq);
1474 __hw_end:
1475 if (chip->irq >= 0)
1476 free_irq(chip->irq, (void *)chip);
1477 if (chip->remap_addr)
1478 iounmap(chip->remap_addr);
1479 pci_release_regions(chip->pci);
1480 pci_disable_device(chip->pci);
1481 kfree(chip);
1482 return 0;
1483 }
1484
1485 static int snd_atiixp_dev_free(snd_device_t *device)
1486 {
1487 atiixp_t *chip = device->device_data;
1488 return snd_atiixp_free(chip);
1489 }
1490
1491 /*
1492 * constructor for chip instance
1493 */
1494 static int __devinit snd_atiixp_create(snd_card_t *card,
1495 struct pci_dev *pci,
1496 atiixp_t **r_chip)
1497 {
1498 static snd_device_ops_t ops = {
1499 .dev_free = snd_atiixp_dev_free,
1500 };
1501 atiixp_t *chip;
1502 int err;
1503
1504 if ((err = pci_enable_device(pci)) < 0)
1505 return err;
1506
1507 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1508 if (chip == NULL) {
1509 pci_disable_device(pci);
1510 return -ENOMEM;
1511 }
1512
1513 spin_lock_init(&chip->reg_lock);
1514 init_MUTEX(&chip->open_mutex);
1515 chip->card = card;
1516 chip->pci = pci;
1517 chip->irq = -1;
1518 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1519 pci_disable_device(pci);
1520 kfree(chip);
1521 return err;
1522 }
1523 chip->addr = pci_resource_start(pci, 0);
1524 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1525 if (chip->remap_addr == NULL) {
1526 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1527 snd_atiixp_free(chip);
1528 return -EIO;
1529 }
1530
1531 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1532 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1533 snd_atiixp_free(chip);
1534 return -EBUSY;
1535 }
1536 chip->irq = pci->irq;
1537 pci_set_master(pci);
1538 synchronize_irq(chip->irq);
1539
1540 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1541 snd_atiixp_free(chip);
1542 return err;
1543 }
1544
1545 snd_card_set_dev(card, &pci->dev);
1546
1547 *r_chip = chip;
1548 return 0;
1549 }
1550
1551
1552 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1553 const struct pci_device_id *pci_id)
1554 {
1555 static int dev;
1556 snd_card_t *card;
1557 atiixp_t *chip;
1558 unsigned char revision;
1559 int err;
1560
1561 if (dev >= SNDRV_CARDS)
1562 return -ENODEV;
1563 if (!enable[dev]) {
1564 dev++;
1565 return -ENOENT;
1566 }
1567
1568 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1569 if (card == NULL)
1570 return -ENOMEM;
1571
1572 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1573
1574 strcpy(card->driver, spdif_aclink[dev] ? "ATIIXP" : "ATIIXP-SPDMA");
1575 strcpy(card->shortname, "ATI IXP");
1576 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1577 goto __error;
1578
1579 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1580 goto __error;
1581
1582 chip->spdif_over_aclink = spdif_aclink[dev];
1583
1584 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev], ac97_quirk[dev])) < 0)
1585 goto __error;
1586
1587 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1588 goto __error;
1589
1590 snd_atiixp_proc_init(chip);
1591
1592 snd_atiixp_chip_start(chip);
1593
1594 snprintf(card->longname, sizeof(card->longname),
1595 "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
1596 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1597 chip->addr, chip->irq);
1598
1599 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1600
1601 if ((err = snd_card_register(card)) < 0)
1602 goto __error;
1603
1604 pci_set_drvdata(pci, card);
1605 dev++;
1606 return 0;
1607
1608 __error:
1609 snd_card_free(card);
1610 return err;
1611 }
1612
1613 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1614 {
1615 snd_card_free(pci_get_drvdata(pci));
1616 pci_set_drvdata(pci, NULL);
1617 }
1618
1619 static struct pci_driver driver = {
1620 .name = "ATI IXP AC97 controller",
1621 .id_table = snd_atiixp_ids,
1622 .probe = snd_atiixp_probe,
1623 .remove = __devexit_p(snd_atiixp_remove),
1624 SND_PCI_PM_CALLBACKS
1625 };
1626
1627
1628 static int __init alsa_card_atiixp_init(void)
1629 {
1630 return pci_module_init(&driver);
1631 }
1632
1633 static void __exit alsa_card_atiixp_exit(void)
1634 {
1635 pci_unregister_driver(&driver);
1636 }
1637
1638 module_init(alsa_card_atiixp_init)
1639 module_exit(alsa_card_atiixp_exit)
1640
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