1 /*
2 * Header file for AT91/AT32 LCD Controller
3 *
4 * Data structure and register user interface
5 *
6 * Copyright (C) 2007 Atmel Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22 #ifndef __ATMEL_LCDC_H__
23 #define __ATMEL_LCDC_H__
24
25 /* LCD Controller info data structure, stored in device platform_data */
26 struct atmel_lcdfb_info {
27 spinlock_t lock;
28 struct fb_info *info;
29 void __iomem *mmio;
30 unsigned long irq_base;
31
32 unsigned int guard_time;
33 struct platform_device *pdev;
34 struct clk *bus_clk;
35 struct clk *lcdc_clk;
36
37 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
38 struct backlight_device *backlight;
39 u8 bl_power;
40 #endif
41 bool lcdcon_is_backlight;
42
43 u8 default_bpp;
44 unsigned int default_lcdcon2;
45 unsigned int default_dmacon;
46 void (*atmel_lcdfb_power_control)(int on);
47 struct fb_monspecs *default_monspecs;
48 u32 pseudo_palette[16];
49 };
50
51 #define ATMEL_LCDC_DMABADDR1 0x00
52 #define ATMEL_LCDC_DMABADDR2 0x04
53 #define ATMEL_LCDC_DMAFRMPT1 0x08
54 #define ATMEL_LCDC_DMAFRMPT2 0x0c
55 #define ATMEL_LCDC_DMAFRMADD1 0x10
56 #define ATMEL_LCDC_DMAFRMADD2 0x14
57
58 #define ATMEL_LCDC_DMAFRMCFG 0x18
59 #define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
60 #define ATMEL_LCDC_BLENGTH_OFFSET 24
61 #define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
62
63 #define ATMEL_LCDC_DMACON 0x1c
64 #define ATMEL_LCDC_DMAEN (0x1 << 0)
65 #define ATMEL_LCDC_DMARST (0x1 << 1)
66 #define ATMEL_LCDC_DMABUSY (0x1 << 2)
67 #define ATMEL_LCDC_DMAUPDT (0x1 << 3)
68 #define ATMEL_LCDC_DMA2DEN (0x1 << 4)
69
70 #define ATMEL_LCDC_DMA2DCFG 0x20
71 #define ATMEL_LCDC_ADDRINC_OFFSET 0
72 #define ATMEL_LCDC_ADDRINC (0xffff)
73 #define ATMEL_LCDC_PIXELOFF_OFFSET 24
74 #define ATMEL_LCDC_PIXELOFF (0x1f << 24)
75
76 #define ATMEL_LCDC_LCDCON1 0x0800
77 #define ATMEL_LCDC_BYPASS (1 << 0)
78 #define ATMEL_LCDC_CLKVAL_OFFSET 12
79 #define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
80 #define ATMEL_LCDC_LINCNT (0x7ff << 21)
81
82 #define ATMEL_LCDC_LCDCON2 0x0804
83 #define ATMEL_LCDC_DISTYPE (3 << 0)
84 #define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
85 #define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
86 #define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
87 #define ATMEL_LCDC_SCANMOD (1 << 2)
88 #define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
89 #define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
90 #define ATMEL_LCDC_IFWIDTH (3 << 3)
91 #define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
92 #define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
93 #define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
94 #define ATMEL_LCDC_PIXELSIZE (7 << 5)
95 #define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
96 #define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
97 #define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
98 #define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
99 #define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
100 #define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
101 #define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
102 #define ATMEL_LCDC_INVVD (1 << 8)
103 #define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
104 #define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
105 #define ATMEL_LCDC_INVFRAME (1 << 9 )
106 #define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
107 #define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
108 #define ATMEL_LCDC_INVLINE (1 << 10)
109 #define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
110 #define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
111 #define ATMEL_LCDC_INVCLK (1 << 11)
112 #define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
113 #define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
114 #define ATMEL_LCDC_INVDVAL (1 << 12)
115 #define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
116 #define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
117 #define ATMEL_LCDC_CLKMOD (1 << 15)
118 #define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
119 #define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
120 #define ATMEL_LCDC_MEMOR (1 << 31)
121 #define ATMEL_LCDC_MEMOR_BIG (0 << 31)
122 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
123
124 #define ATMEL_LCDC_TIM1 0x0808
125 #define ATMEL_LCDC_VFP (0xffU << 0)
126 #define ATMEL_LCDC_VBP_OFFSET 8
127 #define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
128 #define ATMEL_LCDC_VPW_OFFSET 16
129 #define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
130 #define ATMEL_LCDC_VHDLY_OFFSET 24
131 #define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
132
133 #define ATMEL_LCDC_TIM2 0x080c
134 #define ATMEL_LCDC_HBP (0xffU << 0)
135 #define ATMEL_LCDC_HPW_OFFSET 8
136 #define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
137 #define ATMEL_LCDC_HFP_OFFSET 21
138 #define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
139
140 #define ATMEL_LCDC_LCDFRMCFG 0x0810
141 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
142 #define ATMEL_LCDC_HOZVAL_OFFSET 21
143 #define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
144
145 #define ATMEL_LCDC_FIFO 0x0814
146 #define ATMEL_LCDC_FIFOTH (0xffff)
147
148 #define ATMEL_LCDC_MVAL 0x0818
149
150 #define ATMEL_LCDC_DP1_2 0x081c
151 #define ATMEL_LCDC_DP4_7 0x0820
152 #define ATMEL_LCDC_DP3_5 0x0824
153 #define ATMEL_LCDC_DP2_3 0x0828
154 #define ATMEL_LCDC_DP5_7 0x082c
155 #define ATMEL_LCDC_DP3_4 0x0830
156 #define ATMEL_LCDC_DP4_5 0x0834
157 #define ATMEL_LCDC_DP6_7 0x0838
158 #define ATMEL_LCDC_DP1_2_VAL (0xff)
159 #define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
160 #define ATMEL_LCDC_DP3_5_VAL (0xfffff)
161 #define ATMEL_LCDC_DP2_3_VAL (0xfff)
162 #define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
163 #define ATMEL_LCDC_DP3_4_VAL (0xffff)
164 #define ATMEL_LCDC_DP4_5_VAL (0xfffff)
165 #define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
166
167 #define ATMEL_LCDC_PWRCON 0x083c
168 #define ATMEL_LCDC_PWR (1 << 0)
169 #define ATMEL_LCDC_GUARDT_OFFSET 1
170 #define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
171 #define ATMEL_LCDC_BUSY (1 << 31)
172
173 #define ATMEL_LCDC_CONTRAST_CTR 0x0840
174 #define ATMEL_LCDC_PS (3 << 0)
175 #define ATMEL_LCDC_PS_DIV1 (0 << 0)
176 #define ATMEL_LCDC_PS_DIV2 (1 << 0)
177 #define ATMEL_LCDC_PS_DIV4 (2 << 0)
178 #define ATMEL_LCDC_PS_DIV8 (3 << 0)
179 #define ATMEL_LCDC_POL (1 << 2)
180 #define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
181 #define ATMEL_LCDC_POL_POSITIVE (1 << 2)
182 #define ATMEL_LCDC_ENA (1 << 3)
183 #define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
184 #define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
185
186 #define ATMEL_LCDC_CONTRAST_VAL 0x0844
187 #define ATMEL_LCDC_CVAL (0xff)
188
189 #define ATMEL_LCDC_IER 0x0848
190 #define ATMEL_LCDC_IDR 0x084c
191 #define ATMEL_LCDC_IMR 0x0850
192 #define ATMEL_LCDC_ISR 0x0854
193 #define ATMEL_LCDC_ICR 0x0858
194 #define ATMEL_LCDC_LNI (1 << 0)
195 #define ATMEL_LCDC_LSTLNI (1 << 1)
196 #define ATMEL_LCDC_EOFI (1 << 2)
197 #define ATMEL_LCDC_UFLWI (1 << 4)
198 #define ATMEL_LCDC_OWRI (1 << 5)
199 #define ATMEL_LCDC_MERI (1 << 6)
200
201 #define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
202
203 #endif /* __ATMEL_LCDC_H__ */
204
|
This page was automatically generated by the
LXR engine.
|