1 /*
2 * pci.h
3 *
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 *
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
10 *
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
15 */
16
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
19
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
22
23 /*
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
27 *
28 * 7:3 = slot
29 * 2:0 = function
30 */
31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
41
42 #ifdef __KERNEL__
43
44 #include <linux/mod_devicetable.h>
45
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
53
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
56
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
58 enum pci_mmap_state {
59 pci_mmap_io,
60 pci_mmap_mem
61 };
62
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
68
69 #define DEVICE_COUNT_RESOURCE 12
70
71 typedef int __bitwise pci_power_t;
72
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
80
81 /** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
84 */
85 typedef unsigned int __bitwise pci_channel_state_t;
86
87 enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
90
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
93
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
96 };
97
98 typedef unsigned int __bitwise pcie_reset_state_t;
99
100 enum pcie_reset_state {
101 /* Reset is NOT asserted (Use to deassert reset) */
102 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
103
104 /* Use #PERST to reset PCI-E device */
105 pcie_warm_reset = (__force pcie_reset_state_t) 2,
106
107 /* Use PCI-E Hot Reset to reset device */
108 pcie_hot_reset = (__force pcie_reset_state_t) 3
109 };
110
111 typedef unsigned short __bitwise pci_dev_flags_t;
112 enum pci_dev_flags {
113 /* INTX_DISABLE in PCI_COMMAND register disables MSI
114 * generation too.
115 */
116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
117 };
118
119 typedef unsigned short __bitwise pci_bus_flags_t;
120 enum pci_bus_flags {
121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
123 };
124
125 struct pci_cap_saved_state {
126 struct hlist_node next;
127 char cap_nr;
128 u32 data[0];
129 };
130
131 /*
132 * The pci_dev structure is used to describe PCI devices.
133 */
134 struct pci_dev {
135 struct list_head global_list; /* node in list of all PCI devices */
136 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */
139
140 void *sysdata; /* hook for sys-specific extension */
141 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
142
143 unsigned int devfn; /* encoded device & function index */
144 unsigned short vendor;
145 unsigned short device;
146 unsigned short subsystem_vendor;
147 unsigned short subsystem_device;
148 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
149 u8 revision; /* PCI revision, low byte of class word */
150 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
151 u8 pcie_type; /* PCI-E device/port type */
152 u8 rom_base_reg; /* which config register controls the ROM */
153 u8 pin; /* which interrupt pin this device uses */
154
155 struct pci_driver *driver; /* which driver has allocated this device */
156 u64 dma_mask; /* Mask of the bits of bus address this
157 device implements. Normally this is
158 0xffffffff. You only need to change
159 this if your device has broken DMA
160 or supports 64-bit transfers. */
161
162 struct device_dma_parameters dma_parms;
163
164 pci_power_t current_state; /* Current operating state. In ACPI-speak,
165 this is D0-D3, D0 being fully functional,
166 and D3 being off. */
167
168 pci_channel_state_t error_state; /* current connectivity state */
169 struct device dev; /* Generic device interface */
170
171 int cfg_size; /* Size of configuration space */
172
173 /*
174 * Instead of touching interrupt line and base address registers
175 * directly, use the values stored here. They might be different!
176 */
177 unsigned int irq;
178 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
179
180 /* These fields are used by common fixups */
181 unsigned int transparent:1; /* Transparent PCI bridge */
182 unsigned int multifunction:1;/* Part of multi-function device */
183 /* keep track of device state */
184 unsigned int is_busmaster:1; /* device is busmaster */
185 unsigned int no_msi:1; /* device may not use msi */
186 unsigned int no_d1d2:1; /* only allow d0 or d3 */
187 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
188 unsigned int broken_parity_status:1; /* Device generates false positive parity */
189 unsigned int msi_enabled:1;
190 unsigned int msix_enabled:1;
191 unsigned int is_managed:1;
192 unsigned int is_pcie:1;
193 int cached_capabilities[PCI_CAP_LIST_NR_ENTRIES]; /* See pci_find_capability_cached */
194 pci_dev_flags_t dev_flags;
195 atomic_t enable_cnt; /* pci_enable_device has been called */
196
197 u32 saved_config_space[16]; /* config space saved at suspend time */
198 struct hlist_head saved_cap_space;
199 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
200 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
201 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
202 #ifdef CONFIG_PCI_MSI
203 struct list_head msi_list;
204 #endif
205 };
206
207 extern struct pci_dev *alloc_pci_dev(void);
208
209 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
210 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
211 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
212 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
213
214 static inline int pci_channel_offline(struct pci_dev *pdev)
215 {
216 return (pdev->error_state != pci_channel_io_normal);
217 }
218
219 static inline struct pci_cap_saved_state *pci_find_saved_cap(
220 struct pci_dev *pci_dev, char cap)
221 {
222 struct pci_cap_saved_state *tmp;
223 struct hlist_node *pos;
224
225 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
226 if (tmp->cap_nr == cap)
227 return tmp;
228 }
229 return NULL;
230 }
231
232 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
233 struct pci_cap_saved_state *new_cap)
234 {
235 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
236 }
237
238 /*
239 * For PCI devices, the region numbers are assigned this way:
240 *
241 * 0-5 standard PCI regions
242 * 6 expansion ROM
243 * 7-10 bridges: address space assigned to buses behind the bridge
244 */
245
246 #define PCI_ROM_RESOURCE 6
247 #define PCI_BRIDGE_RESOURCES 7
248 #define PCI_NUM_RESOURCES 11
249
250 #ifndef PCI_BUS_NUM_RESOURCES
251 #define PCI_BUS_NUM_RESOURCES 8
252 #endif
253
254 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
255
256 struct pci_bus {
257 struct list_head node; /* node in list of buses */
258 struct pci_bus *parent; /* parent bus this bridge is on */
259 struct list_head children; /* list of child buses */
260 struct list_head devices; /* list of devices on this bus */
261 struct pci_dev *self; /* bridge device as seen by parent */
262 struct resource *resource[PCI_BUS_NUM_RESOURCES];
263 /* address space routed to this bus */
264
265 struct pci_ops *ops; /* configuration access functions */
266 void *sysdata; /* hook for sys-specific extension */
267 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
268
269 unsigned char number; /* bus number */
270 unsigned char primary; /* number of primary bridge */
271 unsigned char secondary; /* number of secondary bridge */
272 unsigned char subordinate; /* max number of subordinate buses */
273
274 char name[48];
275
276 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
277 pci_bus_flags_t bus_flags; /* Inherited by child busses */
278 struct device *bridge;
279 struct device dev;
280 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
281 struct bin_attribute *legacy_mem; /* legacy mem */
282 unsigned int is_added:1;
283 };
284
285 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
286 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
287
288 /*
289 * Error values that may be returned by PCI functions.
290 */
291 #define PCIBIOS_SUCCESSFUL 0x00
292 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
293 #define PCIBIOS_BAD_VENDOR_ID 0x83
294 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
295 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
296 #define PCIBIOS_SET_FAILED 0x88
297 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
298
299 /* Low-level architecture-dependent routines */
300
301 struct pci_ops {
302 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
303 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
304 };
305
306 /*
307 * ACPI needs to be able to access PCI config space before we've done a
308 * PCI bus scan and created pci_bus structures.
309 */
310 extern int raw_pci_read(unsigned int domain, unsigned int bus,
311 unsigned int devfn, int reg, int len, u32 *val);
312 extern int raw_pci_write(unsigned int domain, unsigned int bus,
313 unsigned int devfn, int reg, int len, u32 val);
314
315 struct pci_bus_region {
316 resource_size_t start;
317 resource_size_t end;
318 };
319
320 struct pci_dynids {
321 spinlock_t lock; /* protects list, index */
322 struct list_head list; /* for IDs added at runtime */
323 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
324 };
325
326 /* ---------------------------------------------------------------- */
327 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
328 * a set of callbacks in struct pci_error_handlers, then that device driver
329 * will be notified of PCI bus errors, and will be driven to recovery
330 * when an error occurs.
331 */
332
333 typedef unsigned int __bitwise pci_ers_result_t;
334
335 enum pci_ers_result {
336 /* no result/none/not supported in device driver */
337 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
338
339 /* Device driver can recover without slot reset */
340 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
341
342 /* Device driver wants slot to be reset. */
343 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
344
345 /* Device has completely failed, is unrecoverable */
346 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
347
348 /* Device driver is fully recovered and operational */
349 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
350 };
351
352 /* PCI bus error event callbacks */
353 struct pci_error_handlers {
354 /* PCI bus error detected on this device */
355 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
356 enum pci_channel_state error);
357
358 /* MMIO has been re-enabled, but not DMA */
359 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
360
361 /* PCI Express link has been reset */
362 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
363
364 /* PCI slot has been reset */
365 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
366
367 /* Device driver may resume normal operations */
368 void (*resume)(struct pci_dev *dev);
369 };
370
371 /* ---------------------------------------------------------------- */
372
373 struct module;
374 struct pci_driver {
375 struct list_head node;
376 char *name;
377 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
378 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
379 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
380 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
381 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
382 int (*resume_early) (struct pci_dev *dev);
383 int (*resume) (struct pci_dev *dev); /* Device woken up */
384 void (*shutdown) (struct pci_dev *dev);
385
386 struct pci_error_handlers *err_handler;
387 struct device_driver driver;
388 struct pci_dynids dynids;
389 };
390
391 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
392
393 /**
394 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
395 * @_table: device table name
396 *
397 * This macro is used to create a struct pci_device_id array (a device table)
398 * in a generic manner.
399 */
400 #define DEFINE_PCI_DEVICE_TABLE(_table) \
401 const struct pci_device_id _table[] __devinitconst
402
403 /**
404 * PCI_DEVICE - macro used to describe a specific pci device
405 * @vend: the 16 bit PCI Vendor ID
406 * @dev: the 16 bit PCI Device ID
407 *
408 * This macro is used to create a struct pci_device_id that matches a
409 * specific device. The subvendor and subdevice fields will be set to
410 * PCI_ANY_ID.
411 */
412 #define PCI_DEVICE(vend,dev) \
413 .vendor = (vend), .device = (dev), \
414 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
415
416 /**
417 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
418 * @dev_class: the class, subclass, prog-if triple for this device
419 * @dev_class_mask: the class mask for this device
420 *
421 * This macro is used to create a struct pci_device_id that matches a
422 * specific PCI class. The vendor, device, subvendor, and subdevice
423 * fields will be set to PCI_ANY_ID.
424 */
425 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
426 .class = (dev_class), .class_mask = (dev_class_mask), \
427 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
428 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
429
430 /**
431 * PCI_VDEVICE - macro used to describe a specific pci device in short form
432 * @vend: the vendor name
433 * @dev: the 16 bit PCI Device ID
434 *
435 * This macro is used to create a struct pci_device_id that matches a
436 * specific PCI device. The subvendor, and subdevice fields will be set
437 * to PCI_ANY_ID. The macro allows the next field to follow as the device
438 * private data.
439 */
440
441 #define PCI_VDEVICE(vendor, device) \
442 PCI_VENDOR_ID_##vendor, (device), \
443 PCI_ANY_ID, PCI_ANY_ID, 0, 0
444
445 /* these external functions are only available when PCI support is enabled */
446 #ifdef CONFIG_PCI
447
448 extern struct bus_type pci_bus_type;
449
450 /* Do NOT directly access these two variables, unless you are arch specific pci
451 * code, or pci core code. */
452 extern struct list_head pci_root_buses; /* list of all known PCI buses */
453 extern struct list_head pci_devices; /* list of all devices */
454 /* Some device drivers need know if pci is initiated */
455 extern int no_pci_devices(void);
456
457 void pcibios_fixup_bus(struct pci_bus *);
458 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
459 char *pcibios_setup(char *str);
460
461 /* Used only when drivers/pci/setup.c is used */
462 void pcibios_align_resource(void *, struct resource *, resource_size_t,
463 resource_size_t);
464 void pcibios_update_irq(struct pci_dev *, int irq);
465
466 /* Generic PCI functions used internally */
467
468 extern struct pci_bus *pci_find_bus(int domain, int busnr);
469 void pci_bus_add_devices(struct pci_bus *bus);
470 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
471 struct pci_ops *ops, void *sysdata);
472 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
473 void *sysdata)
474 {
475 struct pci_bus *root_bus;
476 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
477 if (root_bus)
478 pci_bus_add_devices(root_bus);
479 return root_bus;
480 }
481 struct pci_bus *pci_create_bus(struct device *parent, int bus,
482 struct pci_ops *ops, void *sysdata);
483 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
484 int busnr);
485 int pci_scan_slot(struct pci_bus *bus, int devfn);
486 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
487 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
488 unsigned int pci_scan_child_bus(struct pci_bus *bus);
489 int __must_check pci_bus_add_device(struct pci_dev *dev);
490 void pci_read_bridge_bases(struct pci_bus *child);
491 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
492 struct resource *res);
493 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
494 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
495 extern void pci_dev_put(struct pci_dev *dev);
496 extern void pci_remove_bus(struct pci_bus *b);
497 extern void pci_remove_bus_device(struct pci_dev *dev);
498 extern void pci_stop_bus_device(struct pci_dev *dev);
499 void pci_setup_cardbus(struct pci_bus *bus);
500 extern void pci_sort_breadthfirst(void);
501
502 /* Generic PCI functions exported to card drivers */
503
504 #ifdef CONFIG_PCI_LEGACY
505 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
506 unsigned int device,
507 const struct pci_dev *from);
508 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
509 unsigned int devfn);
510 #endif /* CONFIG_PCI_LEGACY */
511
512 int pci_find_capability(struct pci_dev *dev, int cap);
513 int pci_find_capability_cached(struct pci_dev *dev, int cap);
514 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
515 int pci_find_ext_capability(struct pci_dev *dev, int cap);
516 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
517 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
518 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
519
520 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
521 struct pci_dev *from);
522 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
523 struct pci_dev *from);
524
525 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
526 unsigned int ss_vendor, unsigned int ss_device,
527 struct pci_dev *from);
528 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
529 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
530 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
531 int pci_dev_present(const struct pci_device_id *ids);
532 const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
533
534 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
535 int where, u8 *val);
536 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
537 int where, u16 *val);
538 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
539 int where, u32 *val);
540 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
541 int where, u8 val);
542 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
543 int where, u16 val);
544 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
545 int where, u32 val);
546
547 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
548 {
549 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
550 }
551 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
552 {
553 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
554 }
555 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
556 u32 *val)
557 {
558 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
559 }
560 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
561 {
562 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
563 }
564 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
565 {
566 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
567 }
568 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
569 u32 val)
570 {
571 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
572 }
573
574 int __must_check pci_enable_device(struct pci_dev *dev);
575 int __must_check pci_enable_device_io(struct pci_dev *dev);
576 int __must_check pci_enable_device_mem(struct pci_dev *dev);
577 int __must_check pci_reenable_device(struct pci_dev *);
578 int __must_check pcim_enable_device(struct pci_dev *pdev);
579 void pcim_pin_device(struct pci_dev *pdev);
580
581 static inline int pci_is_managed(struct pci_dev *pdev)
582 {
583 return pdev->is_managed;
584 }
585
586 void pci_disable_device(struct pci_dev *dev);
587 void pci_set_master(struct pci_dev *dev);
588 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
589 #define HAVE_PCI_SET_MWI
590 int __must_check pci_set_mwi(struct pci_dev *dev);
591 int pci_try_set_mwi(struct pci_dev *dev);
592 void pci_clear_mwi(struct pci_dev *dev);
593 void pci_intx(struct pci_dev *dev, int enable);
594 void pci_msi_off(struct pci_dev *dev);
595 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
596 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
597 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
598 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
599 int pcix_get_max_mmrbc(struct pci_dev *dev);
600 int pcix_get_mmrbc(struct pci_dev *dev);
601 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
602 int pcie_get_readrq(struct pci_dev *dev);
603 int pcie_set_readrq(struct pci_dev *dev, int rq);
604 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
605 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
606 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
607 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
608
609 /* ROM control related routines */
610 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
611 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
612 size_t pci_get_rom_size(void __iomem *rom, size_t size);
613
614 /* Power management related routines */
615 int pci_save_state(struct pci_dev *dev);
616 int pci_restore_state(struct pci_dev *dev);
617 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
618 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
619 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
620
621 /* Functions for PCI Hotplug drivers to use */
622 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
623
624 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
625 void pci_bus_assign_resources(struct pci_bus *bus);
626 void pci_bus_size_bridges(struct pci_bus *bus);
627 int pci_claim_resource(struct pci_dev *, int);
628 void pci_assign_unassigned_resources(void);
629 void pdev_enable_device(struct pci_dev *);
630 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
631 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
632 int (*)(struct pci_dev *, u8, u8));
633 #define HAVE_PCI_REQ_REGIONS 2
634 int __must_check pci_request_regions(struct pci_dev *, const char *);
635 void pci_release_regions(struct pci_dev *);
636 int __must_check pci_request_region(struct pci_dev *, int, const char *);
637 void pci_release_region(struct pci_dev *, int);
638 int pci_request_selected_regions(struct pci_dev *, int, const char *);
639 void pci_release_selected_regions(struct pci_dev *, int);
640
641 /* drivers/pci/bus.c */
642 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
643 struct resource *res, resource_size_t size,
644 resource_size_t align, resource_size_t min,
645 unsigned int type_mask,
646 void (*alignf)(void *, struct resource *,
647 resource_size_t, resource_size_t),
648 void *alignf_data);
649 void pci_enable_bridges(struct pci_bus *bus);
650
651 /* Proper probing supporting hot-pluggable devices */
652 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
653 const char *mod_name);
654 static inline int __must_check pci_register_driver(struct pci_driver *driver)
655 {
656 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
657 }
658
659 void pci_unregister_driver(struct pci_driver *dev);
660 void pci_remove_behind_bridge(struct pci_dev *dev);
661 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
662 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
663 struct pci_dev *dev);
664 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
665 int pass);
666
667 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
668 void *userdata);
669 int pci_cfg_space_size(struct pci_dev *dev);
670 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
671
672 /* kmem_cache style wrapper around pci_alloc_consistent() */
673
674 #include <linux/dmapool.h>
675
676 #define pci_pool dma_pool
677 #define pci_pool_create(name, pdev, size, align, allocation) \
678 dma_pool_create(name, &pdev->dev, size, align, allocation)
679 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
680 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
681 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
682
683 enum pci_dma_burst_strategy {
684 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
685 strategy_parameter is N/A */
686 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
687 byte boundaries */
688 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
689 strategy_parameter byte boundaries */
690 };
691
692 struct msix_entry {
693 u16 vector; /* kernel uses to write allocated vector */
694 u16 entry; /* driver uses to specify entry, OS writes */
695 };
696
697
698 #ifndef CONFIG_PCI_MSI
699 static inline int pci_enable_msi(struct pci_dev *dev)
700 {
701 return -1;
702 }
703
704 static inline void pci_disable_msi(struct pci_dev *dev)
705 { }
706
707 static inline int pci_enable_msix(struct pci_dev *dev,
708 struct msix_entry *entries, int nvec)
709 {
710 return -1;
711 }
712
713 static inline void pci_disable_msix(struct pci_dev *dev)
714 { }
715
716 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
717 { }
718
719 static inline void pci_restore_msi_state(struct pci_dev *dev)
720 { }
721 #else
722 extern int pci_enable_msi(struct pci_dev *dev);
723 extern void pci_disable_msi(struct pci_dev *dev);
724 extern int pci_enable_msix(struct pci_dev *dev,
725 struct msix_entry *entries, int nvec);
726 extern void pci_disable_msix(struct pci_dev *dev);
727 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
728 extern void pci_restore_msi_state(struct pci_dev *dev);
729 #endif
730
731 #ifdef CONFIG_HT_IRQ
732 /* The functions a driver should call */
733 int ht_create_irq(struct pci_dev *dev, int idx);
734 void ht_destroy_irq(unsigned int irq);
735 #endif /* CONFIG_HT_IRQ */
736
737 extern void pci_block_user_cfg_access(struct pci_dev *dev);
738 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
739
740 /*
741 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
742 * a PCI domain is defined to be a set of PCI busses which share
743 * configuration space.
744 */
745 #ifdef CONFIG_PCI_DOMAINS
746 extern int pci_domains_supported;
747 #else
748 enum { pci_domains_supported = 0 };
749 static inline int pci_domain_nr(struct pci_bus *bus)
750 {
751 return 0;
752 }
753
754 static inline int pci_proc_domain(struct pci_bus *bus)
755 {
756 return 0;
757 }
758 #endif /* CONFIG_PCI_DOMAINS */
759
760 #else /* CONFIG_PCI is not enabled */
761
762 /*
763 * If the system does not have PCI, clearly these return errors. Define
764 * these as simple inline functions to avoid hair in drivers.
765 */
766
767 #define _PCI_NOP(o, s, t) \
768 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
769 int where, t val) \
770 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
771
772 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
773 _PCI_NOP(o, word, u16 x) \
774 _PCI_NOP(o, dword, u32 x)
775 _PCI_NOP_ALL(read, *)
776 _PCI_NOP_ALL(write,)
777
778 static inline struct pci_dev *pci_find_device(unsigned int vendor,
779 unsigned int device,
780 const struct pci_dev *from)
781 {
782 return NULL;
783 }
784
785 static inline struct pci_dev *pci_find_slot(unsigned int bus,
786 unsigned int devfn)
787 {
788 return NULL;
789 }
790
791 static inline struct pci_dev *pci_get_device(unsigned int vendor,
792 unsigned int device,
793 struct pci_dev *from)
794 {
795 return NULL;
796 }
797
798 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
799 unsigned int device,
800 struct pci_dev *from)
801 {
802 return NULL;
803 }
804
805 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
806 unsigned int device,
807 unsigned int ss_vendor,
808 unsigned int ss_device,
809 struct pci_dev *from)
810 {
811 return NULL;
812 }
813
814 static inline struct pci_dev *pci_get_class(unsigned int class,
815 struct pci_dev *from)
816 {
817 return NULL;
818 }
819
820 #define pci_dev_present(ids) (0)
821 #define no_pci_devices() (1)
822 #define pci_find_present(ids) (NULL)
823 #define pci_dev_put(dev) do { } while (0)
824
825 static inline void pci_set_master(struct pci_dev *dev)
826 { }
827
828 static inline int pci_enable_device(struct pci_dev *dev)
829 {
830 return -EIO;
831 }
832
833 static inline void pci_disable_device(struct pci_dev *dev)
834 { }
835
836 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
837 {
838 return -EIO;
839 }
840
841 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
842 unsigned int size)
843 {
844 return -EIO;
845 }
846
847 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
848 unsigned long mask)
849 {
850 return -EIO;
851 }
852
853 static inline int pci_assign_resource(struct pci_dev *dev, int i)
854 {
855 return -EBUSY;
856 }
857
858 static inline int __pci_register_driver(struct pci_driver *drv,
859 struct module *owner)
860 {
861 return 0;
862 }
863
864 static inline int pci_register_driver(struct pci_driver *drv)
865 {
866 return 0;
867 }
868
869 static inline void pci_unregister_driver(struct pci_driver *drv)
870 { }
871
872 static inline int pci_find_capability(struct pci_dev *dev, int cap)
873 {
874 return 0;
875 }
876
877 static inline int pci_find_capability_cached(struct pci_dev *dev, int cap) {
878 return 0;
879 }
880
881 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
882 int cap)
883 {
884 return 0;
885 }
886
887 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
888 {
889 return 0;
890 }
891
892 /* Power management related routines */
893 static inline int pci_save_state(struct pci_dev *dev)
894 {
895 return 0;
896 }
897
898 static inline int pci_restore_state(struct pci_dev *dev)
899 {
900 return 0;
901 }
902
903 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
904 {
905 return 0;
906 }
907
908 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
909 pm_message_t state)
910 {
911 return PCI_D0;
912 }
913
914 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
915 int enable)
916 {
917 return 0;
918 }
919
920 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
921 {
922 return -EIO;
923 }
924
925 static inline void pci_release_regions(struct pci_dev *dev)
926 { }
927
928 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
929
930 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
931 { }
932
933 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
934 { }
935
936 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
937 { return NULL; }
938
939 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
940 unsigned int devfn)
941 { return NULL; }
942
943 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
944 unsigned int devfn)
945 { return NULL; }
946
947 #endif /* CONFIG_PCI */
948
949 /* Include architecture-dependent settings and functions */
950
951 #include <asm/pci.h>
952
953 /* these helpers provide future and backwards compatibility
954 * for accessing popular PCI BAR info */
955 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
956 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
957 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
958 #define pci_resource_len(dev,bar) \
959 ((pci_resource_start((dev), (bar)) == 0 && \
960 pci_resource_end((dev), (bar)) == \
961 pci_resource_start((dev), (bar))) ? 0 : \
962 \
963 (pci_resource_end((dev), (bar)) - \
964 pci_resource_start((dev), (bar)) + 1))
965
966 /* Similar to the helpers above, these manipulate per-pci_dev
967 * driver-specific data. They are really just a wrapper around
968 * the generic device structure functions of these calls.
969 */
970 static inline void *pci_get_drvdata(struct pci_dev *pdev)
971 {
972 return dev_get_drvdata(&pdev->dev);
973 }
974
975 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
976 {
977 dev_set_drvdata(&pdev->dev, data);
978 }
979
980 /* If you want to know what to call your pci_dev, ask this function.
981 * Again, it's a wrapper around the generic device.
982 */
983 static inline char *pci_name(struct pci_dev *pdev)
984 {
985 return pdev->dev.bus_id;
986 }
987
988
989 /* Some archs don't want to expose struct resource to userland as-is
990 * in sysfs and /proc
991 */
992 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
993 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
994 const struct resource *rsrc, resource_size_t *start,
995 resource_size_t *end)
996 {
997 *start = rsrc->start;
998 *end = rsrc->end;
999 }
1000 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1001
1002
1003 /*
1004 * The world is not perfect and supplies us with broken PCI devices.
1005 * For at least a part of these bugs we need a work-around, so both
1006 * generic (drivers/pci/quirks.c) and per-architecture code can define
1007 * fixup hooks to be called for particular buggy devices.
1008 */
1009
1010 struct pci_fixup {
1011 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1012 void (*hook)(struct pci_dev *dev);
1013 };
1014
1015 enum pci_fixup_pass {
1016 pci_fixup_early, /* Before probing BARs */
1017 pci_fixup_header, /* After reading configuration header */
1018 pci_fixup_final, /* Final phase of device fixups */
1019 pci_fixup_enable, /* pci_enable_device() time */
1020 pci_fixup_resume, /* pci_enable_device() time */
1021 };
1022
1023 /* Anonymous variables would be nice... */
1024 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1025 static const struct pci_fixup __pci_fixup_##name __used \
1026 __attribute__((__section__(#section))) = { vendor, device, hook };
1027 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1028 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1029 vendor##device##hook, vendor, device, hook)
1030 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1031 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1032 vendor##device##hook, vendor, device, hook)
1033 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1034 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1035 vendor##device##hook, vendor, device, hook)
1036 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1037 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1038 vendor##device##hook, vendor, device, hook)
1039 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1040 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1041 resume##vendor##device##hook, vendor, device, hook)
1042
1043
1044 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1045
1046 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1047 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1048 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1049 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1050 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1051 const char *name);
1052 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1053
1054 extern int pci_pci_problems;
1055 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1056 #define PCIPCI_TRITON 2
1057 #define PCIPCI_NATOMA 4
1058 #define PCIPCI_VIAETBF 8
1059 #define PCIPCI_VSFX 16
1060 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1061 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1062
1063 extern unsigned long pci_cardbus_io_size;
1064 extern unsigned long pci_cardbus_mem_size;
1065
1066 extern int pcibios_add_platform_entries(struct pci_dev *dev);
1067
1068 #endif /* __KERNEL__ */
1069 #endif /* LINUX_PCI_H */
1070
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