Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  *      pci.h
  3  *
  4  *      PCI defines and function prototypes
  5  *      Copyright 1994, Drew Eckhardt
  6  *      Copyright 1997--1999 Martin Mares <mj@ucw.cz>
  7  *
  8  *      For more information, please consult the following manuals (look at
  9  *      http://www.pcisig.com/ for how to get them):
 10  *
 11  *      PCI BIOS Specification
 12  *      PCI Local Bus Specification
 13  *      PCI to PCI Bridge Specification
 14  *      PCI System Design Guide
 15  */
 16 
 17 #ifndef LINUX_PCI_H
 18 #define LINUX_PCI_H
 19 
 20 #include <linux/pci_regs.h>     /* The pci register defines */
 21 
 22 /*
 23  * The PCI interface treats multi-function devices as independent
 24  * devices.  The slot/function address of each device is encoded
 25  * in a single byte as follows:
 26  *
 27  *      7:3 = slot
 28  *      2:0 = function
 29  */
 30 #define PCI_DEVFN(slot, func)   ((((slot) & 0x1f) << 3) | ((func) & 0x07))
 31 #define PCI_SLOT(devfn)         (((devfn) >> 3) & 0x1f)
 32 #define PCI_FUNC(devfn)         ((devfn) & 0x07)
 33 
 34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
 35 #define PCIIOC_BASE             ('P' << 24 | 'C' << 16 | 'I' << 8)
 36 #define PCIIOC_CONTROLLER       (PCIIOC_BASE | 0x00)    /* Get controller for PCI device. */
 37 #define PCIIOC_MMAP_IS_IO       (PCIIOC_BASE | 0x01)    /* Set mmap state to I/O space. */
 38 #define PCIIOC_MMAP_IS_MEM      (PCIIOC_BASE | 0x02)    /* Set mmap state to MEM space. */
 39 #define PCIIOC_WRITE_COMBINE    (PCIIOC_BASE | 0x03)    /* Enable/disable write-combining. */
 40 
 41 #ifdef __KERNEL__
 42 
 43 #include <linux/mod_devicetable.h>
 44 
 45 #include <linux/types.h>
 46 #include <linux/init.h>
 47 #include <linux/ioport.h>
 48 #include <linux/list.h>
 49 #include <linux/compiler.h>
 50 #include <linux/errno.h>
 51 #include <linux/kobject.h>
 52 #include <asm/atomic.h>
 53 #include <linux/device.h>
 54 #include <linux/io.h>
 55 #include <linux/irqreturn.h>
 56 
 57 /* Include the ID list */
 58 #include <linux/pci_ids.h>
 59 
 60 /* pci_slot represents a physical slot */
 61 struct pci_slot {
 62         struct pci_bus *bus;            /* The bus this slot is on */
 63         struct list_head list;          /* node in list of slots on this bus */
 64         struct hotplug_slot *hotplug;   /* Hotplug info (migrate over time) */
 65         unsigned char number;           /* PCI_SLOT(pci_dev->devfn) */
 66         struct kobject kobj;
 67 };
 68 
 69 static inline const char *pci_slot_name(const struct pci_slot *slot)
 70 {
 71         return kobject_name(&slot->kobj);
 72 }
 73 
 74 /* File state for mmap()s on /proc/bus/pci/X/Y */
 75 enum pci_mmap_state {
 76         pci_mmap_io,
 77         pci_mmap_mem
 78 };
 79 
 80 /* This defines the direction arg to the DMA mapping routines. */
 81 #define PCI_DMA_BIDIRECTIONAL   0
 82 #define PCI_DMA_TODEVICE        1
 83 #define PCI_DMA_FROMDEVICE      2
 84 #define PCI_DMA_NONE            3
 85 
 86 /*
 87  *  For PCI devices, the region numbers are assigned this way:
 88  */
 89 enum {
 90         /* #0-5: standard PCI resources */
 91         PCI_STD_RESOURCES,
 92         PCI_STD_RESOURCE_END = 5,
 93 
 94         /* #6: expansion ROM resource */
 95         PCI_ROM_RESOURCE,
 96 
 97         /* device specific resources */
 98 #ifdef CONFIG_PCI_IOV
 99         PCI_IOV_RESOURCES,
100         PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
101 #endif
102 
103         /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
105 
106         PCI_BRIDGE_RESOURCES,
107         PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108                                   PCI_BRIDGE_RESOURCE_NUM - 1,
109 
110         /* total resources associated with a PCI device */
111         PCI_NUM_RESOURCES,
112 
113         /* preserve this for compatibility */
114         DEVICE_COUNT_RESOURCE
115 };
116 
117 typedef int __bitwise pci_power_t;
118 
119 #define PCI_D0          ((pci_power_t __force) 0)
120 #define PCI_D1          ((pci_power_t __force) 1)
121 #define PCI_D2          ((pci_power_t __force) 2)
122 #define PCI_D3hot       ((pci_power_t __force) 3)
123 #define PCI_D3cold      ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN     ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
126 
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
129 
130 static inline const char *pci_power_name(pci_power_t state)
131 {
132         return pci_power_names[1 + (int) state];
133 }
134 
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT  10
137 #define PCI_PM_BUS_WAIT 50
138 
139 /** The pci_channel state describes connectivity between the CPU and
140  *  the pci device.  If some PCI bus between here and the pci device
141  *  has crashed or locked up, this info is reflected here.
142  */
143 typedef unsigned int __bitwise pci_channel_state_t;
144 
145 enum pci_channel_state {
146         /* I/O channel is in normal state */
147         pci_channel_io_normal = (__force pci_channel_state_t) 1,
148 
149         /* I/O to channel is blocked */
150         pci_channel_io_frozen = (__force pci_channel_state_t) 2,
151 
152         /* PCI card is dead */
153         pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
154 };
155 
156 typedef unsigned int __bitwise pcie_reset_state_t;
157 
158 enum pcie_reset_state {
159         /* Reset is NOT asserted (Use to deassert reset) */
160         pcie_deassert_reset = (__force pcie_reset_state_t) 1,
161 
162         /* Use #PERST to reset PCI-E device */
163         pcie_warm_reset = (__force pcie_reset_state_t) 2,
164 
165         /* Use PCI-E Hot Reset to reset device */
166         pcie_hot_reset = (__force pcie_reset_state_t) 3
167 };
168 
169 typedef unsigned short __bitwise pci_dev_flags_t;
170 enum pci_dev_flags {
171         /* INTX_DISABLE in PCI_COMMAND register disables MSI
172          * generation too.
173          */
174         PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175         /* Device configuration is irrevocably lost if disabled into D3 */
176         PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
177 };
178 
179 enum pci_irq_reroute_variant {
180         INTEL_IRQ_REROUTE_VARIANT = 1,
181         MAX_IRQ_REROUTE_VARIANTS = 3
182 };
183 
184 typedef unsigned short __bitwise pci_bus_flags_t;
185 enum pci_bus_flags {
186         PCI_BUS_FLAGS_NO_MSI   = (__force pci_bus_flags_t) 1,
187         PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
188 };
189 
190 struct pci_cap_saved_state {
191         struct hlist_node next;
192         char cap_nr;
193         u32 data[0];
194 };
195 
196 struct pcie_link_state;
197 struct pci_vpd;
198 struct pci_sriov;
199 struct pci_ats;
200 
201 /*
202  * The pci_dev structure is used to describe PCI devices.
203  */
204 struct pci_dev {
205         struct list_head bus_list;      /* node in per-bus list */
206         struct pci_bus  *bus;           /* bus this device is on */
207         struct pci_bus  *subordinate;   /* bus this device bridges to */
208 
209         void            *sysdata;       /* hook for sys-specific extension */
210         struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
211         struct pci_slot *slot;          /* Physical slot this device is in */
212 
213         unsigned int    devfn;          /* encoded device & function index */
214         unsigned short  vendor;
215         unsigned short  device;
216         unsigned short  subsystem_vendor;
217         unsigned short  subsystem_device;
218         unsigned int    class;          /* 3 bytes: (base,sub,prog-if) */
219         u8              revision;       /* PCI revision, low byte of class word */
220         u8              hdr_type;       /* PCI header type (`multi' flag masked out) */
221         u8              pcie_type;      /* PCI-E device/port type */
222         u8              rom_base_reg;   /* which config register controls the ROM */
223         u8              pin;            /* which interrupt pin this device uses */
224 
225         struct pci_driver *driver;      /* which driver has allocated this device */
226         u64             dma_mask;       /* Mask of the bits of bus address this
227                                            device implements.  Normally this is
228                                            0xffffffff.  You only need to change
229                                            this if your device has broken DMA
230                                            or supports 64-bit transfers.  */
231 
232         struct device_dma_parameters dma_parms;
233 
234         pci_power_t     current_state;  /* Current operating state. In ACPI-speak,
235                                            this is D0-D3, D0 being fully functional,
236                                            and D3 being off. */
237         int             pm_cap;         /* PM capability offset in the
238                                            configuration space */
239         unsigned int    pme_support:5;  /* Bitmask of states from which PME#
240                                            can be generated */
241         unsigned int    d1_support:1;   /* Low power state D1 is supported */
242         unsigned int    d2_support:1;   /* Low power state D2 is supported */
243         unsigned int    no_d1d2:1;      /* Only allow D0 and D3 */
244 
245 #ifdef CONFIG_PCIEASPM
246         struct pcie_link_state  *link_state;    /* ASPM link state. */
247 #endif
248 
249         pci_channel_state_t error_state;        /* current connectivity state */
250         struct  device  dev;            /* Generic device interface */
251 
252         int             cfg_size;       /* Size of configuration space */
253 
254         /*
255          * Instead of touching interrupt line and base address registers
256          * directly, use the values stored here. They might be different!
257          */
258         unsigned int    irq;
259         struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
260 
261         /* These fields are used by common fixups */
262         unsigned int    transparent:1;  /* Transparent PCI bridge */
263         unsigned int    multifunction:1;/* Part of multi-function device */
264         /* keep track of device state */
265         unsigned int    is_added:1;
266         unsigned int    is_busmaster:1; /* device is busmaster */
267         unsigned int    no_msi:1;       /* device may not use msi */
268         unsigned int    block_ucfg_access:1;    /* userspace config space access is blocked */
269         unsigned int    broken_parity_status:1; /* Device generates false positive parity */
270         unsigned int    irq_reroute_variant:2;  /* device needs IRQ rerouting variant */
271         unsigned int    msi_enabled:1;
272         unsigned int    msix_enabled:1;
273         unsigned int    ari_enabled:1;  /* ARI forwarding */
274         unsigned int    is_managed:1;
275         unsigned int    is_pcie:1;
276         unsigned int    state_saved:1;
277         unsigned int    is_physfn:1;
278         unsigned int    is_virtfn:1;
279         pci_dev_flags_t dev_flags;
280         atomic_t        enable_cnt;     /* pci_enable_device has been called */
281 
282         u32             saved_config_space[16]; /* config space saved at suspend time */
283         struct hlist_head saved_cap_space;
284         struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
285         int rom_attr_enabled;           /* has display of the rom attribute been enabled? */
286         struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
287         struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
288 #ifdef CONFIG_PCI_MSI
289         struct list_head msi_list;
290 #endif
291         struct pci_vpd *vpd;
292 #ifdef CONFIG_PCI_IOV
293         union {
294                 struct pci_sriov *sriov;        /* SR-IOV capability related */
295                 struct pci_dev *physfn; /* the PF this VF is associated with */
296         };
297         struct pci_ats  *ats;   /* Address Translation Service */
298 #endif
299 };
300 
301 extern struct pci_dev *alloc_pci_dev(void);
302 
303 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
304 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
305 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
306 
307 static inline int pci_channel_offline(struct pci_dev *pdev)
308 {
309         return (pdev->error_state != pci_channel_io_normal);
310 }
311 
312 static inline struct pci_cap_saved_state *pci_find_saved_cap(
313         struct pci_dev *pci_dev, char cap)
314 {
315         struct pci_cap_saved_state *tmp;
316         struct hlist_node *pos;
317 
318         hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
319                 if (tmp->cap_nr == cap)
320                         return tmp;
321         }
322         return NULL;
323 }
324 
325 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
326         struct pci_cap_saved_state *new_cap)
327 {
328         hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
329 }
330 
331 #ifndef PCI_BUS_NUM_RESOURCES
332 #define PCI_BUS_NUM_RESOURCES   16
333 #endif
334 
335 #define PCI_REGION_FLAG_MASK    0x0fU   /* These bits of resource flags tell us the PCI region flags */
336 
337 struct pci_bus {
338         struct list_head node;          /* node in list of buses */
339         struct pci_bus  *parent;        /* parent bus this bridge is on */
340         struct list_head children;      /* list of child buses */
341         struct list_head devices;       /* list of devices on this bus */
342         struct pci_dev  *self;          /* bridge device as seen by parent */
343         struct list_head slots;         /* list of slots on this bus */
344         struct resource *resource[PCI_BUS_NUM_RESOURCES];
345                                         /* address space routed to this bus */
346 
347         struct pci_ops  *ops;           /* configuration access functions */
348         void            *sysdata;       /* hook for sys-specific extension */
349         struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
350 
351         unsigned char   number;         /* bus number */
352         unsigned char   primary;        /* number of primary bridge */
353         unsigned char   secondary;      /* number of secondary bridge */
354         unsigned char   subordinate;    /* max number of subordinate buses */
355 
356         char            name[48];
357 
358         unsigned short  bridge_ctl;     /* manage NO_ISA/FBB/et al behaviors */
359         pci_bus_flags_t bus_flags;      /* Inherited by child busses */
360         struct device           *bridge;
361         struct device           dev;
362         struct bin_attribute    *legacy_io; /* legacy I/O for this bus */
363         struct bin_attribute    *legacy_mem; /* legacy mem */
364         unsigned int            is_added:1;
365 };
366 
367 #define pci_bus_b(n)    list_entry(n, struct pci_bus, node)
368 #define to_pci_bus(n)   container_of(n, struct pci_bus, dev)
369 
370 /*
371  * Returns true if the pci bus is root (behind host-pci bridge),
372  * false otherwise
373  */
374 static inline bool pci_is_root_bus(struct pci_bus *pbus)
375 {
376         return !(pbus->parent);
377 }
378 
379 #ifdef CONFIG_PCI_MSI
380 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
381 {
382         return pci_dev->msi_enabled || pci_dev->msix_enabled;
383 }
384 #else
385 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
386 #endif
387 
388 /*
389  * Error values that may be returned by PCI functions.
390  */
391 #define PCIBIOS_SUCCESSFUL              0x00
392 #define PCIBIOS_FUNC_NOT_SUPPORTED      0x81
393 #define PCIBIOS_BAD_VENDOR_ID           0x83
394 #define PCIBIOS_DEVICE_NOT_FOUND        0x86
395 #define PCIBIOS_BAD_REGISTER_NUMBER     0x87
396 #define PCIBIOS_SET_FAILED              0x88
397 #define PCIBIOS_BUFFER_TOO_SMALL        0x89
398 
399 /* Low-level architecture-dependent routines */
400 
401 struct pci_ops {
402         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
403         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
404 };
405 
406 /*
407  * ACPI needs to be able to access PCI config space before we've done a
408  * PCI bus scan and created pci_bus structures.
409  */
410 extern int raw_pci_read(unsigned int domain, unsigned int bus,
411                         unsigned int devfn, int reg, int len, u32 *val);
412 extern int raw_pci_write(unsigned int domain, unsigned int bus,
413                         unsigned int devfn, int reg, int len, u32 val);
414 
415 struct pci_bus_region {
416         resource_size_t start;
417         resource_size_t end;
418 };
419 
420 struct pci_dynids {
421         spinlock_t lock;            /* protects list, index */
422         struct list_head list;      /* for IDs added at runtime */
423 };
424 
425 /* ---------------------------------------------------------------- */
426 /** PCI Error Recovery System (PCI-ERS).  If a PCI device driver provides
427  *  a set of callbacks in struct pci_error_handlers, then that device driver
428  *  will be notified of PCI bus errors, and will be driven to recovery
429  *  when an error occurs.
430  */
431 
432 typedef unsigned int __bitwise pci_ers_result_t;
433 
434 enum pci_ers_result {
435         /* no result/none/not supported in device driver */
436         PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
437 
438         /* Device driver can recover without slot reset */
439         PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
440 
441         /* Device driver wants slot to be reset. */
442         PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
443 
444         /* Device has completely failed, is unrecoverable */
445         PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
446 
447         /* Device driver is fully recovered and operational */
448         PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
449 };
450 
451 /* PCI bus error event callbacks */
452 struct pci_error_handlers {
453         /* PCI bus error detected on this device */
454         pci_ers_result_t (*error_detected)(struct pci_dev *dev,
455                                            enum pci_channel_state error);
456 
457         /* MMIO has been re-enabled, but not DMA */
458         pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
459 
460         /* PCI Express link has been reset */
461         pci_ers_result_t (*link_reset)(struct pci_dev *dev);
462 
463         /* PCI slot has been reset */
464         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
465 
466         /* Device driver may resume normal operations */
467         void (*resume)(struct pci_dev *dev);
468 };
469 
470 /* ---------------------------------------------------------------- */
471 
472 struct module;
473 struct pci_driver {
474         struct list_head node;
475         char *name;
476         const struct pci_device_id *id_table;   /* must be non-NULL for probe to be called */
477         int  (*probe)  (struct pci_dev *dev, const struct pci_device_id *id);   /* New device inserted */
478         void (*remove) (struct pci_dev *dev);   /* Device removed (NULL if not a hot-plug capable driver) */
479         int  (*suspend) (struct pci_dev *dev, pm_message_t state);      /* Device suspended */
480         int  (*suspend_late) (struct pci_dev *dev, pm_message_t state);
481         int  (*resume_early) (struct pci_dev *dev);
482         int  (*resume) (struct pci_dev *dev);                   /* Device woken up */
483         void (*shutdown) (struct pci_dev *dev);
484         struct pci_error_handlers *err_handler;
485         struct device_driver    driver;
486         struct pci_dynids dynids;
487 };
488 
489 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
490 
491 /**
492  * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
493  * @_table: device table name
494  *
495  * This macro is used to create a struct pci_device_id array (a device table)
496  * in a generic manner.
497  */
498 #define DEFINE_PCI_DEVICE_TABLE(_table) \
499         const struct pci_device_id _table[] __devinitconst
500 
501 /**
502  * PCI_DEVICE - macro used to describe a specific pci device
503  * @vend: the 16 bit PCI Vendor ID
504  * @dev: the 16 bit PCI Device ID
505  *
506  * This macro is used to create a struct pci_device_id that matches a
507  * specific device.  The subvendor and subdevice fields will be set to
508  * PCI_ANY_ID.
509  */
510 #define PCI_DEVICE(vend,dev) \
511         .vendor = (vend), .device = (dev), \
512         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
513 
514 /**
515  * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
516  * @dev_class: the class, subclass, prog-if triple for this device
517  * @dev_class_mask: the class mask for this device
518  *
519  * This macro is used to create a struct pci_device_id that matches a
520  * specific PCI class.  The vendor, device, subvendor, and subdevice
521  * fields will be set to PCI_ANY_ID.
522  */
523 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
524         .class = (dev_class), .class_mask = (dev_class_mask), \
525         .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
526         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
527 
528 /**
529  * PCI_VDEVICE - macro used to describe a specific pci device in short form
530  * @vendor: the vendor name
531  * @device: the 16 bit PCI Device ID
532  *
533  * This macro is used to create a struct pci_device_id that matches a
534  * specific PCI device.  The subvendor, and subdevice fields will be set
535  * to PCI_ANY_ID. The macro allows the next field to follow as the device
536  * private data.
537  */
538 
539 #define PCI_VDEVICE(vendor, device)             \
540         PCI_VENDOR_ID_##vendor, (device),       \
541         PCI_ANY_ID, PCI_ANY_ID, 0, 0
542 
543 /* these external functions are only available when PCI support is enabled */
544 #ifdef CONFIG_PCI
545 
546 extern struct bus_type pci_bus_type;
547 
548 /* Do NOT directly access these two variables, unless you are arch specific pci
549  * code, or pci core code. */
550 extern struct list_head pci_root_buses; /* list of all known PCI buses */
551 /* Some device drivers need know if pci is initiated */
552 extern int no_pci_devices(void);
553 
554 void pcibios_fixup_bus(struct pci_bus *);
555 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
556 char *pcibios_setup(char *str);
557 
558 /* Used only when drivers/pci/setup.c is used */
559 void pcibios_align_resource(void *, struct resource *, resource_size_t,
560                                 resource_size_t);
561 void pcibios_update_irq(struct pci_dev *, int irq);
562 
563 /* Generic PCI functions used internally */
564 
565 extern struct pci_bus *pci_find_bus(int domain, int busnr);
566 void pci_bus_add_devices(const struct pci_bus *bus);
567 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
568                                       struct pci_ops *ops, void *sysdata);
569 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
570                                            void *sysdata)
571 {
572         struct pci_bus *root_bus;
573         root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
574         if (root_bus)
575                 pci_bus_add_devices(root_bus);
576         return root_bus;
577 }
578 struct pci_bus *pci_create_bus(struct device *parent, int bus,
579                                struct pci_ops *ops, void *sysdata);
580 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
581                                 int busnr);
582 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
583                                  const char *name,
584                                  struct hotplug_slot *hotplug);
585 void pci_destroy_slot(struct pci_slot *slot);
586 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
587 int pci_scan_slot(struct pci_bus *bus, int devfn);
588 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
589 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
590 unsigned int pci_scan_child_bus(struct pci_bus *bus);
591 int __must_check pci_bus_add_device(struct pci_dev *dev);
592 void pci_read_bridge_bases(struct pci_bus *child);
593 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
594                                           struct resource *res);
595 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
596 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
597 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
598 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
599 extern void pci_dev_put(struct pci_dev *dev);
600 extern void pci_remove_bus(struct pci_bus *b);
601 extern void pci_remove_bus_device(struct pci_dev *dev);
602 extern void pci_stop_bus_device(struct pci_dev *dev);
603 void pci_setup_cardbus(struct pci_bus *bus);
604 extern void pci_sort_breadthfirst(void);
605 
606 /* Generic PCI functions exported to card drivers */
607 
608 #ifdef CONFIG_PCI_LEGACY
609 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
610                                              unsigned int device,
611                                              struct pci_dev *from);
612 #endif /* CONFIG_PCI_LEGACY */
613 
614 enum pci_lost_interrupt_reason {
615         PCI_LOST_IRQ_NO_INFORMATION = 0,
616         PCI_LOST_IRQ_DISABLE_MSI,
617         PCI_LOST_IRQ_DISABLE_MSIX,
618         PCI_LOST_IRQ_DISABLE_ACPI,
619 };
620 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
621 int pci_find_capability(struct pci_dev *dev, int cap);
622 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
623 int pci_find_ext_capability(struct pci_dev *dev, int cap);
624 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
625 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
626 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
627 
628 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
629                                 struct pci_dev *from);
630 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
631                                 unsigned int ss_vendor, unsigned int ss_device,
632                                 struct pci_dev *from);
633 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
634 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
635 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
636 int pci_dev_present(const struct pci_device_id *ids);
637 
638 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
639                              int where, u8 *val);
640 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
641                              int where, u16 *val);
642 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
643                               int where, u32 *val);
644 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
645                               int where, u8 val);
646 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
647                               int where, u16 val);
648 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
649                                int where, u32 val);
650 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
651 
652 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
653 {
654         return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
655 }
656 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
657 {
658         return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
659 }
660 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
661                                         u32 *val)
662 {
663         return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
664 }
665 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
666 {
667         return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
668 }
669 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
670 {
671         return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
672 }
673 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
674                                          u32 val)
675 {
676         return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
677 }
678 
679 int __must_check pci_enable_device(struct pci_dev *dev);
680 int __must_check pci_enable_device_io(struct pci_dev *dev);
681 int __must_check pci_enable_device_mem(struct pci_dev *dev);
682 int __must_check pci_reenable_device(struct pci_dev *);
683 int __must_check pcim_enable_device(struct pci_dev *pdev);
684 void pcim_pin_device(struct pci_dev *pdev);
685 
686 static inline int pci_is_enabled(struct pci_dev *pdev)
687 {
688         return (atomic_read(&pdev->enable_cnt) > 0);
689 }
690 
691 static inline int pci_is_managed(struct pci_dev *pdev)
692 {
693         return pdev->is_managed;
694 }
695 
696 void pci_disable_device(struct pci_dev *dev);
697 void pci_set_master(struct pci_dev *dev);
698 void pci_clear_master(struct pci_dev *dev);
699 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
700 #define HAVE_PCI_SET_MWI
701 int __must_check pci_set_mwi(struct pci_dev *dev);
702 int pci_try_set_mwi(struct pci_dev *dev);
703 void pci_clear_mwi(struct pci_dev *dev);
704 void pci_intx(struct pci_dev *dev, int enable);
705 void pci_msi_off(struct pci_dev *dev);
706 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
707 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
708 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
709 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
710 int pcix_get_max_mmrbc(struct pci_dev *dev);
711 int pcix_get_mmrbc(struct pci_dev *dev);
712 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
713 int pcie_get_readrq(struct pci_dev *dev);
714 int pcie_set_readrq(struct pci_dev *dev, int rq);
715 int __pci_reset_function(struct pci_dev *dev);
716 int pci_reset_function(struct pci_dev *dev);
717 void pci_update_resource(struct pci_dev *dev, int resno);
718 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
719 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
720 
721 /* ROM control related routines */
722 int pci_enable_rom(struct pci_dev *pdev);
723 void pci_disable_rom(struct pci_dev *pdev);
724 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
725 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
726 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
727 
728 /* Power management related routines */
729 int pci_save_state(struct pci_dev *dev);
730 int pci_restore_state(struct pci_dev *dev);
731 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
732 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
733 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
734 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
735 void pci_pme_active(struct pci_dev *dev, bool enable);
736 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
737 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
738 pci_power_t pci_target_state(struct pci_dev *dev);
739 int pci_prepare_to_sleep(struct pci_dev *dev);
740 int pci_back_from_sleep(struct pci_dev *dev);
741 
742 /* Functions for PCI Hotplug drivers to use */
743 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
744 #ifdef CONFIG_HOTPLUG
745 unsigned int pci_rescan_bus(struct pci_bus *bus);
746 #endif
747 
748 /* Vital product data routines */
749 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
750 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
751 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
752 
753 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
754 void pci_bus_assign_resources(const struct pci_bus *bus);
755 void pci_bus_size_bridges(struct pci_bus *bus);
756 int pci_claim_resource(struct pci_dev *, int);
757 void pci_assign_unassigned_resources(void);
758 void pdev_enable_device(struct pci_dev *);
759 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
760 int pci_enable_resources(struct pci_dev *, int mask);
761 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
762                     int (*)(struct pci_dev *, u8, u8));
763 #define HAVE_PCI_REQ_REGIONS    2
764 int __must_check pci_request_regions(struct pci_dev *, const char *);
765 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
766 void pci_release_regions(struct pci_dev *);
767 int __must_check pci_request_region(struct pci_dev *, int, const char *);
768 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
769 void pci_release_region(struct pci_dev *, int);
770 int pci_request_selected_regions(struct pci_dev *, int, const char *);
771 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
772 void pci_release_selected_regions(struct pci_dev *, int);
773 
774 /* drivers/pci/bus.c */
775 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
776                         struct resource *res, resource_size_t size,
777                         resource_size_t align, resource_size_t min,
778                         unsigned int type_mask,
779                         void (*alignf)(void *, struct resource *,
780                                 resource_size_t, resource_size_t),
781                         void *alignf_data);
782 void pci_enable_bridges(struct pci_bus *bus);
783 
784 /* Proper probing supporting hot-pluggable devices */
785 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
786                                        const char *mod_name);
787 
788 /*
789  * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
790  */
791 #define pci_register_driver(driver)             \
792         __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
793 
794 void pci_unregister_driver(struct pci_driver *dev);
795 void pci_remove_behind_bridge(struct pci_dev *dev);
796 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
797 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
798                                          struct pci_dev *dev);
799 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
800                     int pass);
801 
802 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
803                   void *userdata);
804 int pci_cfg_space_size_ext(struct pci_dev *dev);
805 int pci_cfg_space_size(struct pci_dev *dev);
806 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
807 
808 /* kmem_cache style wrapper around pci_alloc_consistent() */
809 
810 #include <linux/dmapool.h>
811 
812 #define pci_pool dma_pool
813 #define pci_pool_create(name, pdev, size, align, allocation) \
814                 dma_pool_create(name, &pdev->dev, size, align, allocation)
815 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
816 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
817 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
818 
819 enum pci_dma_burst_strategy {
820         PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
821                                    strategy_parameter is N/A */
822         PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
823                                    byte boundaries */
824         PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
825                                    strategy_parameter byte boundaries */
826 };
827 
828 struct msix_entry {
829         u32     vector; /* kernel uses to write allocated vector */
830         u16     entry;  /* driver uses to specify entry, OS writes */
831 };
832 
833 
834 #ifndef CONFIG_PCI_MSI
835 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
836 {
837         return -1;
838 }
839 
840 static inline void pci_msi_shutdown(struct pci_dev *dev)
841 { }
842 static inline void pci_disable_msi(struct pci_dev *dev)
843 { }
844 
845 static inline int pci_msix_table_size(struct pci_dev *dev)
846 {
847         return 0;
848 }
849 static inline int pci_enable_msix(struct pci_dev *dev,
850                                   struct msix_entry *entries, int nvec)
851 {
852         return -1;
853 }
854 
855 static inline void pci_msix_shutdown(struct pci_dev *dev)
856 { }
857 static inline void pci_disable_msix(struct pci_dev *dev)
858 { }
859 
860 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
861 { }
862 
863 static inline void pci_restore_msi_state(struct pci_dev *dev)
864 { }
865 static inline int pci_msi_enabled(void)
866 {
867         return 0;
868 }
869 #else
870 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
871 extern void pci_msi_shutdown(struct pci_dev *dev);
872 extern void pci_disable_msi(struct pci_dev *dev);
873 extern int pci_msix_table_size(struct pci_dev *dev);
874 extern int pci_enable_msix(struct pci_dev *dev,
875         struct msix_entry *entries, int nvec);
876 extern void pci_msix_shutdown(struct pci_dev *dev);
877 extern void pci_disable_msix(struct pci_dev *dev);
878 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
879 extern void pci_restore_msi_state(struct pci_dev *dev);
880 extern int pci_msi_enabled(void);
881 #endif
882 
883 #ifndef CONFIG_PCIEASPM
884 static inline int pcie_aspm_enabled(void)
885 {
886         return 0;
887 }
888 #else
889 extern int pcie_aspm_enabled(void);
890 #endif
891 
892 #ifndef CONFIG_PCIE_ECRC
893 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
894 {
895         return;
896 }
897 static inline void pcie_ecrc_get_policy(char *str) {};
898 #else
899 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
900 extern void pcie_ecrc_get_policy(char *str);
901 #endif
902 
903 #define pci_enable_msi(pdev)    pci_enable_msi_block(pdev, 1)
904 
905 #ifdef CONFIG_HT_IRQ
906 /* The functions a driver should call */
907 int  ht_create_irq(struct pci_dev *dev, int idx);
908 void ht_destroy_irq(unsigned int irq);
909 #endif /* CONFIG_HT_IRQ */
910 
911 extern void pci_block_user_cfg_access(struct pci_dev *dev);
912 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
913 
914 /*
915  * PCI domain support.  Sometimes called PCI segment (eg by ACPI),
916  * a PCI domain is defined to be a set of PCI busses which share
917  * configuration space.
918  */
919 #ifdef CONFIG_PCI_DOMAINS
920 extern int pci_domains_supported;
921 #else
922 enum { pci_domains_supported = 0 };
923 static inline int pci_domain_nr(struct pci_bus *bus)
924 {
925         return 0;
926 }
927 
928 static inline int pci_proc_domain(struct pci_bus *bus)
929 {
930         return 0;
931 }
932 #endif /* CONFIG_PCI_DOMAINS */
933 
934 #else /* CONFIG_PCI is not enabled */
935 
936 /*
937  *  If the system does not have PCI, clearly these return errors.  Define
938  *  these as simple inline functions to avoid hair in drivers.
939  */
940 
941 #define _PCI_NOP(o, s, t) \
942         static inline int pci_##o##_config_##s(struct pci_dev *dev, \
943                                                 int where, t val) \
944                 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
945 
946 #define _PCI_NOP_ALL(o, x)      _PCI_NOP(o, byte, u8 x) \
947                                 _PCI_NOP(o, word, u16 x) \
948                                 _PCI_NOP(o, dword, u32 x)
949 _PCI_NOP_ALL(read, *)
950 _PCI_NOP_ALL(write,)
951 
952 static inline struct pci_dev *pci_find_device(unsigned int vendor,
953                                               unsigned int device,
954                                               struct pci_dev *from)
955 {
956         return NULL;
957 }
958 
959 static inline struct pci_dev *pci_get_device(unsigned int vendor,
960                                              unsigned int device,
961                                              struct pci_dev *from)
962 {
963         return NULL;
964 }
965 
966 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
967                                              unsigned int device,
968                                              unsigned int ss_vendor,
969                                              unsigned int ss_device,
970                                              struct pci_dev *from)
971 {
972         return NULL;
973 }
974 
975 static inline struct pci_dev *pci_get_class(unsigned int class,
976                                             struct pci_dev *from)
977 {
978         return NULL;
979 }
980 
981 #define pci_dev_present(ids)    (0)
982 #define no_pci_devices()        (1)
983 #define pci_dev_put(dev)        do { } while (0)
984 
985 static inline void pci_set_master(struct pci_dev *dev)
986 { }
987 
988 static inline int pci_enable_device(struct pci_dev *dev)
989 {
990         return -EIO;
991 }
992 
993 static inline void pci_disable_device(struct pci_dev *dev)
994 { }
995 
996 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
997 {
998         return -EIO;
999 }
1000 
1001 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1002 {
1003         return -EIO;
1004 }
1005 
1006 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1007                                         unsigned int size)
1008 {
1009         return -EIO;
1010 }
1011 
1012 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1013                                         unsigned long mask)
1014 {
1015         return -EIO;
1016 }
1017 
1018 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1019 {
1020         return -EBUSY;
1021 }
1022 
1023 static inline int __pci_register_driver(struct pci_driver *drv,
1024                                         struct module *owner)
1025 {
1026         return 0;
1027 }
1028 
1029 static inline int pci_register_driver(struct pci_driver *drv)
1030 {
1031         return 0;
1032 }
1033 
1034 static inline void pci_unregister_driver(struct pci_driver *drv)
1035 { }
1036 
1037 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1038 {
1039         return 0;
1040 }
1041 
1042 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1043                                            int cap)
1044 {
1045         return 0;
1046 }
1047 
1048 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1049 {
1050         return 0;
1051 }
1052 
1053 /* Power management related routines */
1054 static inline int pci_save_state(struct pci_dev *dev)
1055 {
1056         return 0;
1057 }
1058 
1059 static inline int pci_restore_state(struct pci_dev *dev)
1060 {
1061         return 0;
1062 }
1063 
1064 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1065 {
1066         return 0;
1067 }
1068 
1069 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1070                                            pm_message_t state)
1071 {
1072         return PCI_D0;
1073 }
1074 
1075 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1076                                   int enable)
1077 {
1078         return 0;
1079 }
1080 
1081 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1082 {
1083         return -EIO;
1084 }
1085 
1086 static inline void pci_release_regions(struct pci_dev *dev)
1087 { }
1088 
1089 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1090 
1091 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1092 { }
1093 
1094 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1095 { }
1096 
1097 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1098 { return NULL; }
1099 
1100 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1101                                                 unsigned int devfn)
1102 { return NULL; }
1103 
1104 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1105                                                 unsigned int devfn)
1106 { return NULL; }
1107 
1108 #endif /* CONFIG_PCI */
1109 
1110 /* Include architecture-dependent settings and functions */
1111 
1112 #include <asm/pci.h>
1113 
1114 #ifndef PCIBIOS_MAX_MEM_32
1115 #define PCIBIOS_MAX_MEM_32 (-1)
1116 #endif
1117 
1118 /* these helpers provide future and backwards compatibility
1119  * for accessing popular PCI BAR info */
1120 #define pci_resource_start(dev, bar)    ((dev)->resource[(bar)].start)
1121 #define pci_resource_end(dev, bar)      ((dev)->resource[(bar)].end)
1122 #define pci_resource_flags(dev, bar)    ((dev)->resource[(bar)].flags)
1123 #define pci_resource_len(dev,bar) \
1124         ((pci_resource_start((dev), (bar)) == 0 &&      \
1125           pci_resource_end((dev), (bar)) ==             \
1126           pci_resource_start((dev), (bar))) ? 0 :       \
1127                                                         \
1128          (pci_resource_end((dev), (bar)) -              \
1129           pci_resource_start((dev), (bar)) + 1))
1130 
1131 /* Similar to the helpers above, these manipulate per-pci_dev
1132  * driver-specific data.  They are really just a wrapper around
1133  * the generic device structure functions of these calls.
1134  */
1135 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1136 {
1137         return dev_get_drvdata(&pdev->dev);
1138 }
1139 
1140 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1141 {
1142         dev_set_drvdata(&pdev->dev, data);
1143 }
1144 
1145 /* If you want to know what to call your pci_dev, ask this function.
1146  * Again, it's a wrapper around the generic device.
1147  */
1148 static inline const char *pci_name(const struct pci_dev *pdev)
1149 {
1150         return dev_name(&pdev->dev);
1151 }
1152 
1153 
1154 /* Some archs don't want to expose struct resource to userland as-is
1155  * in sysfs and /proc
1156  */
1157 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1158 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1159                 const struct resource *rsrc, resource_size_t *start,
1160                 resource_size_t *end)
1161 {
1162         *start = rsrc->start;
1163         *end = rsrc->end;
1164 }
1165 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1166 
1167 
1168 /*
1169  *  The world is not perfect and supplies us with broken PCI devices.
1170  *  For at least a part of these bugs we need a work-around, so both
1171  *  generic (drivers/pci/quirks.c) and per-architecture code can define
1172  *  fixup hooks to be called for particular buggy devices.
1173  */
1174 
1175 struct pci_fixup {
1176         u16 vendor, device;     /* You can use PCI_ANY_ID here of course */
1177         void (*hook)(struct pci_dev *dev);
1178 };
1179 
1180 enum pci_fixup_pass {
1181         pci_fixup_early,        /* Before probing BARs */
1182         pci_fixup_header,       /* After reading configuration header */
1183         pci_fixup_final,        /* Final phase of device fixups */
1184         pci_fixup_enable,       /* pci_enable_device() time */
1185         pci_fixup_resume,       /* pci_device_resume() */
1186         pci_fixup_suspend,      /* pci_device_suspend */
1187         pci_fixup_resume_early, /* pci_device_resume_early() */
1188 };
1189 
1190 /* Anonymous variables would be nice... */
1191 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook)  \
1192         static const struct pci_fixup __pci_fixup_##name __used         \
1193         __attribute__((__section__(#section))) = { vendor, device, hook };
1194 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook)                   \
1195         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early,                     \
1196                         vendor##device##hook, vendor, device, hook)
1197 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook)                  \
1198         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header,                    \
1199                         vendor##device##hook, vendor, device, hook)
1200 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook)                   \
1201         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final,                     \
1202                         vendor##device##hook, vendor, device, hook)
1203 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook)                  \
1204         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable,                    \
1205                         vendor##device##hook, vendor, device, hook)
1206 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook)                  \
1207         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume,                    \
1208                         resume##vendor##device##hook, vendor, device, hook)
1209 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook)            \
1210         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early,              \
1211                         resume_early##vendor##device##hook, vendor, device, hook)
1212 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook)                 \
1213         DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend,                   \
1214                         suspend##vendor##device##hook, vendor, device, hook)
1215 
1216 
1217 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1218 
1219 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1220 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1221 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1222 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1223 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1224                                    const char *name);
1225 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1226 
1227 extern int pci_pci_problems;
1228 #define PCIPCI_FAIL             1       /* No PCI PCI DMA */
1229 #define PCIPCI_TRITON           2
1230 #define PCIPCI_NATOMA           4
1231 #define PCIPCI_VIAETBF          8
1232 #define PCIPCI_VSFX             16
1233 #define PCIPCI_ALIMAGIK         32      /* Need low latency setting */
1234 #define PCIAGP_FAIL             64      /* No PCI to AGP DMA */
1235 
1236 extern unsigned long pci_cardbus_io_size;
1237 extern unsigned long pci_cardbus_mem_size;
1238 
1239 int pcibios_add_platform_entries(struct pci_dev *dev);
1240 void pcibios_disable_device(struct pci_dev *dev);
1241 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1242                                  enum pcie_reset_state state);
1243 
1244 #ifdef CONFIG_PCI_MMCONFIG
1245 extern void __init pci_mmcfg_early_init(void);
1246 extern void __init pci_mmcfg_late_init(void);
1247 #else
1248 static inline void pci_mmcfg_early_init(void) { }
1249 static inline void pci_mmcfg_late_init(void) { }
1250 #endif
1251 
1252 int pci_ext_cfg_avail(struct pci_dev *dev);
1253 
1254 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1255 
1256 #ifdef CONFIG_PCI_IOV
1257 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1258 extern void pci_disable_sriov(struct pci_dev *dev);
1259 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1260 #else
1261 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1262 {
1263         return -ENODEV;
1264 }
1265 static inline void pci_disable_sriov(struct pci_dev *dev)
1266 {
1267 }
1268 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1269 {
1270         return IRQ_NONE;
1271 }
1272 #endif
1273 
1274 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1275 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1276 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1277 #endif
1278 
1279 #endif /* __KERNEL__ */
1280 #endif /* LINUX_PCI_H */
1281 
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