1 /*
2 * Copyright (c) 2006 Cisco Systems, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef MLX4_CMD_H
34 #define MLX4_CMD_H
35
36 #include <linux/dma-mapping.h>
37
38 enum {
39 /* initialization and general commands */
40 MLX4_CMD_SYS_EN = 0x1,
41 MLX4_CMD_SYS_DIS = 0x2,
42 MLX4_CMD_MAP_FA = 0xfff,
43 MLX4_CMD_UNMAP_FA = 0xffe,
44 MLX4_CMD_RUN_FW = 0xff6,
45 MLX4_CMD_MOD_STAT_CFG = 0x34,
46 MLX4_CMD_QUERY_DEV_CAP = 0x3,
47 MLX4_CMD_QUERY_FW = 0x4,
48 MLX4_CMD_ENABLE_LAM = 0xff8,
49 MLX4_CMD_DISABLE_LAM = 0xff7,
50 MLX4_CMD_QUERY_DDR = 0x5,
51 MLX4_CMD_QUERY_ADAPTER = 0x6,
52 MLX4_CMD_INIT_HCA = 0x7,
53 MLX4_CMD_CLOSE_HCA = 0x8,
54 MLX4_CMD_INIT_PORT = 0x9,
55 MLX4_CMD_CLOSE_PORT = 0xa,
56 MLX4_CMD_QUERY_HCA = 0xb,
57 MLX4_CMD_QUERY_PORT = 0x43,
58 MLX4_CMD_SET_PORT = 0xc,
59 MLX4_CMD_ACCESS_DDR = 0x2e,
60 MLX4_CMD_MAP_ICM = 0xffa,
61 MLX4_CMD_UNMAP_ICM = 0xff9,
62 MLX4_CMD_MAP_ICM_AUX = 0xffc,
63 MLX4_CMD_UNMAP_ICM_AUX = 0xffb,
64 MLX4_CMD_SET_ICM_SIZE = 0xffd,
65
66 /* TPT commands */
67 MLX4_CMD_SW2HW_MPT = 0xd,
68 MLX4_CMD_QUERY_MPT = 0xe,
69 MLX4_CMD_HW2SW_MPT = 0xf,
70 MLX4_CMD_READ_MTT = 0x10,
71 MLX4_CMD_WRITE_MTT = 0x11,
72 MLX4_CMD_SYNC_TPT = 0x2f,
73
74 /* EQ commands */
75 MLX4_CMD_MAP_EQ = 0x12,
76 MLX4_CMD_SW2HW_EQ = 0x13,
77 MLX4_CMD_HW2SW_EQ = 0x14,
78 MLX4_CMD_QUERY_EQ = 0x15,
79
80 /* CQ commands */
81 MLX4_CMD_SW2HW_CQ = 0x16,
82 MLX4_CMD_HW2SW_CQ = 0x17,
83 MLX4_CMD_QUERY_CQ = 0x18,
84 MLX4_CMD_RESIZE_CQ = 0x2c,
85
86 /* SRQ commands */
87 MLX4_CMD_SW2HW_SRQ = 0x35,
88 MLX4_CMD_HW2SW_SRQ = 0x36,
89 MLX4_CMD_QUERY_SRQ = 0x37,
90 MLX4_CMD_ARM_SRQ = 0x40,
91
92 /* QP/EE commands */
93 MLX4_CMD_RST2INIT_QP = 0x19,
94 MLX4_CMD_INIT2RTR_QP = 0x1a,
95 MLX4_CMD_RTR2RTS_QP = 0x1b,
96 MLX4_CMD_RTS2RTS_QP = 0x1c,
97 MLX4_CMD_SQERR2RTS_QP = 0x1d,
98 MLX4_CMD_2ERR_QP = 0x1e,
99 MLX4_CMD_RTS2SQD_QP = 0x1f,
100 MLX4_CMD_SQD2SQD_QP = 0x38,
101 MLX4_CMD_SQD2RTS_QP = 0x20,
102 MLX4_CMD_2RST_QP = 0x21,
103 MLX4_CMD_QUERY_QP = 0x22,
104 MLX4_CMD_INIT2INIT_QP = 0x2d,
105 MLX4_CMD_SUSPEND_QP = 0x32,
106 MLX4_CMD_UNSUSPEND_QP = 0x33,
107 /* special QP and management commands */
108 MLX4_CMD_CONF_SPECIAL_QP = 0x23,
109 MLX4_CMD_MAD_IFC = 0x24,
110
111 /* multicast commands */
112 MLX4_CMD_READ_MCG = 0x25,
113 MLX4_CMD_WRITE_MCG = 0x26,
114 MLX4_CMD_MGID_HASH = 0x27,
115
116 /* miscellaneous commands */
117 MLX4_CMD_DIAG_RPRT = 0x30,
118 MLX4_CMD_NOP = 0x31,
119
120 /* debug commands */
121 MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
122 MLX4_CMD_SET_DEBUG_MSG = 0x2b,
123 };
124
125 enum {
126 MLX4_CMD_TIME_CLASS_A = 10000,
127 MLX4_CMD_TIME_CLASS_B = 10000,
128 MLX4_CMD_TIME_CLASS_C = 10000,
129 };
130
131 enum {
132 MLX4_MAILBOX_SIZE = 4096
133 };
134
135 struct mlx4_dev;
136
137 struct mlx4_cmd_mailbox {
138 void *buf;
139 dma_addr_t dma;
140 };
141
142 int __mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
143 int out_is_imm, u32 in_modifier, u8 op_modifier,
144 u16 op, unsigned long timeout);
145
146 /* Invoke a command with no output parameter */
147 static inline int mlx4_cmd(struct mlx4_dev *dev, u64 in_param, u32 in_modifier,
148 u8 op_modifier, u16 op, unsigned long timeout)
149 {
150 return __mlx4_cmd(dev, in_param, NULL, 0, in_modifier,
151 op_modifier, op, timeout);
152 }
153
154 /* Invoke a command with an output mailbox */
155 static inline int mlx4_cmd_box(struct mlx4_dev *dev, u64 in_param, u64 out_param,
156 u32 in_modifier, u8 op_modifier, u16 op,
157 unsigned long timeout)
158 {
159 return __mlx4_cmd(dev, in_param, &out_param, 0, in_modifier,
160 op_modifier, op, timeout);
161 }
162
163 /*
164 * Invoke a command with an immediate output parameter (and copy the
165 * output into the caller's out_param pointer after the command
166 * executes).
167 */
168 static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u64 in_param, u64 *out_param,
169 u32 in_modifier, u8 op_modifier, u16 op,
170 unsigned long timeout)
171 {
172 return __mlx4_cmd(dev, in_param, out_param, 1, in_modifier,
173 op_modifier, op, timeout);
174 }
175
176 struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
177 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
178
179 #endif /* MLX4_CMD_H */
180
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