1 #ifndef __ASM_MPSPEC_DEF_H
2 #define __ASM_MPSPEC_DEF_H
3
4 /*
5 * Structure definitions for SMP machines following the
6 * Intel Multiprocessing Specification 1.1 and 1.4.
7 */
8
9 /*
10 * This tag identifies where the SMP configuration
11 * information is.
12 */
13
14 #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
15
16 #ifdef CONFIG_X86_32
17 # define MAX_MPC_ENTRY 1024
18 # define MAX_APICS 256
19 #else
20 /*
21 * A maximum of 255 APICs with the current APIC ID architecture.
22 */
23 # define MAX_APICS 255
24 #endif
25
26 struct intel_mp_floating
27 {
28 char mpf_signature[4]; /* "_MP_" */
29 unsigned int mpf_physptr; /* Configuration table address */
30 unsigned char mpf_length; /* Our length (paragraphs) */
31 unsigned char mpf_specification;/* Specification version */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
33 unsigned char mpf_feature1; /* Standard or configuration ? */
34 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
35 unsigned char mpf_feature3; /* Unused (0) */
36 unsigned char mpf_feature4; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */
38 };
39
40 #define MPC_SIGNATURE "PCMP"
41
42 struct mp_config_table
43 {
44 char mpc_signature[4];
45 unsigned short mpc_length; /* Size of table */
46 char mpc_spec; /* 0x01 */
47 char mpc_checksum;
48 char mpc_oem[8];
49 char mpc_productid[12];
50 unsigned int mpc_oemptr; /* 0 if not present */
51 unsigned short mpc_oemsize; /* 0 if not present */
52 unsigned short mpc_oemcount;
53 unsigned int mpc_lapic; /* APIC address */
54 unsigned int reserved;
55 };
56
57 /* Followed by entries */
58
59 #define MP_PROCESSOR 0
60 #define MP_BUS 1
61 #define MP_IOAPIC 2
62 #define MP_INTSRC 3
63 #define MP_LINTSRC 4
64 /* Used by IBM NUMA-Q to describe node locality */
65 #define MP_TRANSLATION 192
66
67 #define CPU_ENABLED 1 /* Processor is available */
68 #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
69
70 #define CPU_STEPPING_MASK 0x000F
71 #define CPU_MODEL_MASK 0x00F0
72 #define CPU_FAMILY_MASK 0x0F00
73
74 struct mpc_config_processor
75 {
76 unsigned char mpc_type;
77 unsigned char mpc_apicid; /* Local APIC number */
78 unsigned char mpc_apicver; /* Its versions */
79 unsigned char mpc_cpuflag;
80 unsigned int mpc_cpufeature;
81 unsigned int mpc_featureflag; /* CPUID feature value */
82 unsigned int mpc_reserved[2];
83 };
84
85 struct mpc_config_bus
86 {
87 unsigned char mpc_type;
88 unsigned char mpc_busid;
89 unsigned char mpc_bustype[6];
90 };
91
92 /* List of Bus Type string values, Intel MP Spec. */
93 #define BUSTYPE_EISA "EISA"
94 #define BUSTYPE_ISA "ISA"
95 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
96 #define BUSTYPE_MCA "MCA"
97 #define BUSTYPE_VL "VL" /* Local bus */
98 #define BUSTYPE_PCI "PCI"
99 #define BUSTYPE_PCMCIA "PCMCIA"
100 #define BUSTYPE_CBUS "CBUS"
101 #define BUSTYPE_CBUSII "CBUSII"
102 #define BUSTYPE_FUTURE "FUTURE"
103 #define BUSTYPE_MBI "MBI"
104 #define BUSTYPE_MBII "MBII"
105 #define BUSTYPE_MPI "MPI"
106 #define BUSTYPE_MPSA "MPSA"
107 #define BUSTYPE_NUBUS "NUBUS"
108 #define BUSTYPE_TC "TC"
109 #define BUSTYPE_VME "VME"
110 #define BUSTYPE_XPRESS "XPRESS"
111
112 #define MPC_APIC_USABLE 0x01
113
114 struct mpc_config_ioapic
115 {
116 unsigned char mpc_type;
117 unsigned char mpc_apicid;
118 unsigned char mpc_apicver;
119 unsigned char mpc_flags;
120 unsigned int mpc_apicaddr;
121 };
122
123 struct mpc_config_intsrc
124 {
125 unsigned char mpc_type;
126 unsigned char mpc_irqtype;
127 unsigned short mpc_irqflag;
128 unsigned char mpc_srcbus;
129 unsigned char mpc_srcbusirq;
130 unsigned char mpc_dstapic;
131 unsigned char mpc_dstirq;
132 };
133
134 enum mp_irq_source_types {
135 mp_INT = 0,
136 mp_NMI = 1,
137 mp_SMI = 2,
138 mp_ExtINT = 3
139 };
140
141 #define MP_IRQDIR_DEFAULT 0
142 #define MP_IRQDIR_HIGH 1
143 #define MP_IRQDIR_LOW 3
144
145 #define MP_APIC_ALL 0xFF
146
147 struct mpc_config_lintsrc
148 {
149 unsigned char mpc_type;
150 unsigned char mpc_irqtype;
151 unsigned short mpc_irqflag;
152 unsigned char mpc_srcbusid;
153 unsigned char mpc_srcbusirq;
154 unsigned char mpc_destapic;
155 unsigned char mpc_destapiclint;
156 };
157
158 #define MPC_OEM_SIGNATURE "_OEM"
159
160 struct mp_config_oemtable
161 {
162 char oem_signature[4];
163 unsigned short oem_length; /* Size of table */
164 char oem_rev; /* 0x01 */
165 char oem_checksum;
166 char mpc_oem[8];
167 };
168
169 struct mpc_config_translation
170 {
171 unsigned char mpc_type;
172 unsigned char trans_len;
173 unsigned char trans_type;
174 unsigned char trans_quad;
175 unsigned char trans_global;
176 unsigned char trans_local;
177 unsigned short trans_reserved;
178 };
179
180 /*
181 * Default configurations
182 *
183 * 1 2 CPU ISA 82489DX
184 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
185 * 3 2 CPU EISA 82489DX
186 * 4 2 CPU MCA 82489DX
187 * 5 2 CPU ISA+PCI
188 * 6 2 CPU EISA+PCI
189 * 7 2 CPU MCA+PCI
190 */
191
192 enum mp_bustype {
193 MP_BUS_ISA = 1,
194 MP_BUS_EISA,
195 MP_BUS_PCI,
196 MP_BUS_MCA,
197 };
198 #endif
199
200
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