1 #ifndef _ASM_X86_ACPI_H
2 #define _ASM_X86_ACPI_H
3
4 /*
5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
7 *
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 */
26 #include <acpi/pdc_intel.h>
27
28 #include <asm/numa.h>
29 #include <asm/processor.h>
30 #include <asm/mmu.h>
31
32 #define COMPILER_DEPENDENT_INT64 long long
33 #define COMPILER_DEPENDENT_UINT64 unsigned long long
34
35 /*
36 * Calling conventions:
37 *
38 * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
39 * ACPI_EXTERNAL_XFACE - External ACPI interfaces
40 * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
41 * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
42 */
43 #define ACPI_SYSTEM_XFACE
44 #define ACPI_EXTERNAL_XFACE
45 #define ACPI_INTERNAL_XFACE
46 #define ACPI_INTERNAL_VAR_XFACE
47
48 /* Asm macros */
49
50 #define ACPI_ASM_MACROS
51 #define BREAKPOINT3
52 #define ACPI_DISABLE_IRQS() local_irq_disable_nort()
53 #define ACPI_ENABLE_IRQS() local_irq_enable_nort()
54 #define ACPI_FLUSH_CPU_CACHE() wbinvd()
55
56 int __acpi_acquire_global_lock(unsigned int *lock);
57 int __acpi_release_global_lock(unsigned int *lock);
58
59 #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
60 ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
61
62 #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
63 ((Acq) = __acpi_release_global_lock(&facs->global_lock))
64
65 /*
66 * Math helper asm macros
67 */
68 #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
69 asm("divl %2;" \
70 :"=a"(q32), "=d"(r32) \
71 :"r"(d32), \
72 ""(n_lo), "1"(n_hi))
73
74
75 #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
76 asm("shrl $1,%2 ;" \
77 "rcrl $1,%3;" \
78 :"=r"(n_hi), "=r"(n_lo) \
79 :""(n_hi), "1"(n_lo))
80
81 #ifdef CONFIG_ACPI
82 extern int acpi_lapic;
83 extern int acpi_ioapic;
84 extern int acpi_noirq;
85 extern int acpi_strict;
86 extern int acpi_disabled;
87 extern int acpi_ht;
88 extern int acpi_pci_disabled;
89 extern int acpi_skip_timer_override;
90 extern int acpi_use_timer_override;
91
92 extern u8 acpi_sci_flags;
93 extern int acpi_sci_override_gsi;
94 void acpi_pic_sci_set_trigger(unsigned int, u16);
95
96 static inline void disable_acpi(void)
97 {
98 acpi_disabled = 1;
99 acpi_ht = 0;
100 acpi_pci_disabled = 1;
101 acpi_noirq = 1;
102 }
103
104 /* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
105 #define FIX_ACPI_PAGES 4
106
107 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
108
109 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
110 static inline void acpi_disable_pci(void)
111 {
112 acpi_pci_disabled = 1;
113 acpi_noirq_set();
114 }
115 extern int acpi_irq_balance_set(char *str);
116
117 /* routines for saving/restoring kernel state */
118 extern int acpi_save_state_mem(void);
119 extern void acpi_restore_state_mem(void);
120
121 extern unsigned long acpi_wakeup_address;
122
123 /* early initialization routine */
124 extern void acpi_reserve_bootmem(void);
125
126 /*
127 * Check if the CPU can handle C2 and deeper
128 */
129 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
130 {
131 /*
132 * Early models (<=5) of AMD Opterons are not supposed to go into
133 * C2 state.
134 *
135 * Steppings 0x0A and later are good
136 */
137 if (boot_cpu_data.x86 == 0x0F &&
138 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
139 boot_cpu_data.x86_model <= 0x05 &&
140 boot_cpu_data.x86_mask < 0x0A)
141 return 1;
142 else
143 return max_cstate;
144 }
145
146 #else /* !CONFIG_ACPI */
147
148 #define acpi_lapic 0
149 #define acpi_ioapic 0
150 static inline void acpi_noirq_set(void) { }
151 static inline void acpi_disable_pci(void) { }
152 static inline void disable_acpi(void) { }
153
154 #endif /* !CONFIG_ACPI */
155
156 #define ARCH_HAS_POWER_INIT 1
157
158 struct bootnode;
159
160 #ifdef CONFIG_ACPI_NUMA
161 extern int acpi_numa;
162 extern int acpi_scan_nodes(unsigned long start, unsigned long end);
163 #ifdef CONFIG_X86_64
164 # define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
165 #endif
166 extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
167 int num_nodes);
168 #else
169 static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
170 int num_nodes)
171 {
172 }
173 #endif
174
175 #define acpi_unlazy_tlb(x) leave_mm(x)
176
177 #endif /*__X86_ASM_ACPI_H*/
178
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