1 #ifndef __ASM_MACH_APIC_H
2 #define __ASM_MACH_APIC_H
3
4 extern u8 bios_cpu_apicid[];
5
6 #define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
7 #define esr_disable (1)
8
9 static inline int apic_id_registered(void)
10 {
11 return (1);
12 }
13
14 static inline cpumask_t target_cpus(void)
15 {
16 #if defined CONFIG_ES7000_CLUSTERED_APIC
17 return CPU_MASK_ALL;
18 #else
19 return cpumask_of_cpu(smp_processor_id());
20 #endif
21 }
22 #define TARGET_CPUS (target_cpus())
23
24 #if defined CONFIG_ES7000_CLUSTERED_APIC
25 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
26 #define INT_DELIVERY_MODE (dest_LowestPrio)
27 #define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
28 #define NO_BALANCE_IRQ (1)
29 #undef WAKE_SECONDARY_VIA_INIT
30 #define WAKE_SECONDARY_VIA_MIP
31 #else
32 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
33 #define INT_DELIVERY_MODE (dest_Fixed)
34 #define INT_DEST_MODE (0) /* phys delivery to target procs */
35 #define NO_BALANCE_IRQ (0)
36 #undef APIC_DEST_LOGICAL
37 #define APIC_DEST_LOGICAL 0x0
38 #define WAKE_SECONDARY_VIA_INIT
39 #endif
40
41 #define NO_IOAPIC_CHECK (1)
42
43 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
44 {
45 return 0;
46 }
47 static inline unsigned long check_apicid_present(int bit)
48 {
49 return physid_isset(bit, phys_cpu_present_map);
50 }
51
52 #define apicid_cluster(apicid) (apicid & 0xF0)
53
54 static inline unsigned long calculate_ldr(int cpu)
55 {
56 unsigned long id;
57 id = xapic_phys_to_log_apicid(cpu);
58 return (SET_APIC_LOGICAL_ID(id));
59 }
60
61 /*
62 * Set up the logical destination ID.
63 *
64 * Intel recommends to set DFR, LdR and TPR before enabling
65 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
66 * document number 292116). So here it goes...
67 */
68 static inline void init_apic_ldr(void)
69 {
70 unsigned long val;
71 int cpu = smp_processor_id();
72
73 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
74 val = calculate_ldr(cpu);
75 apic_write_around(APIC_LDR, val);
76 }
77
78 extern void es7000_sw_apic(void);
79 static inline void enable_apic_mode(void)
80 {
81 es7000_sw_apic();
82 return;
83 }
84
85 extern int apic_version [MAX_APICS];
86 static inline void clustered_apic_check(void)
87 {
88 int apic = bios_cpu_apicid[smp_processor_id()];
89 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
90 (apic_version[apic] == 0x14) ?
91 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
92 }
93
94 static inline int multi_timer_check(int apic, int irq)
95 {
96 return 0;
97 }
98
99 static inline int apicid_to_node(int logical_apicid)
100 {
101 return 0;
102 }
103
104
105 static inline int cpu_present_to_apicid(int mps_cpu)
106 {
107 if (!mps_cpu)
108 return boot_cpu_physical_apicid;
109 else if (mps_cpu < NR_CPUS)
110 return (int) bios_cpu_apicid[mps_cpu];
111 else
112 return BAD_APICID;
113 }
114
115 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
116 {
117 static int id = 0;
118 physid_mask_t mask;
119 mask = physid_mask_of_physid(id);
120 ++id;
121 return mask;
122 }
123
124 extern u8 cpu_2_logical_apicid[];
125 /* Mapping from cpu number to logical apicid */
126 static inline int cpu_to_logical_apicid(int cpu)
127 {
128 if (cpu >= NR_CPUS)
129 return BAD_APICID;
130 return (int)cpu_2_logical_apicid[cpu];
131 }
132
133 static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused)
134 {
135 printk("Processor #%d %ld:%ld APIC version %d\n",
136 m->mpc_apicid,
137 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
138 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
139 m->mpc_apicver);
140 return (m->mpc_apicid);
141 }
142
143 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
144 {
145 /* For clustered we don't have a good way to do this yet - hack */
146 return physids_promote(0xff);
147 }
148
149
150 static inline void setup_portio_remap(void)
151 {
152 }
153
154 extern unsigned int boot_cpu_physical_apicid;
155 static inline int check_phys_apicid_present(int cpu_physical_apicid)
156 {
157 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
158 return (1);
159 }
160
161 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
162 {
163 int num_bits_set;
164 int cpus_found = 0;
165 int cpu;
166 int apicid;
167
168 num_bits_set = cpus_weight(cpumask);
169 /* Return id to all */
170 if (num_bits_set == NR_CPUS)
171 #if defined CONFIG_ES7000_CLUSTERED_APIC
172 return 0xFF;
173 #else
174 return cpu_to_logical_apicid(0);
175 #endif
176 /*
177 * The cpus in the mask must all be on the apic cluster. If are not
178 * on the same apicid cluster return default value of TARGET_CPUS.
179 */
180 cpu = first_cpu(cpumask);
181 apicid = cpu_to_logical_apicid(cpu);
182 while (cpus_found < num_bits_set) {
183 if (cpu_isset(cpu, cpumask)) {
184 int new_apicid = cpu_to_logical_apicid(cpu);
185 if (apicid_cluster(apicid) !=
186 apicid_cluster(new_apicid)){
187 printk ("%s: Not a valid mask!\n",__FUNCTION__);
188 #if defined CONFIG_ES7000_CLUSTERED_APIC
189 return 0xFF;
190 #else
191 return cpu_to_logical_apicid(0);
192 #endif
193 }
194 apicid = new_apicid;
195 cpus_found++;
196 }
197 cpu++;
198 }
199 return apicid;
200 }
201
202 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
203 {
204 return cpuid_apic >> index_msb;
205 }
206
207 #endif /* __ASM_MACH_APIC_H */
208
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