Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * omap_wdt.c
  3  *
  4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5  *
  6  * Author: MontaVista Software, Inc.
  7  *       <gdavis@mvista.com> or <source@mvista.com>
  8  *
  9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
 10  * terms of the GNU General Public License version 2. This program is
 11  * licensed "as is" without any warranty of any kind, whether express
 12  * or implied.
 13  *
 14  * History:
 15  *
 16  * 20030527: George G. Davis <gdavis@mvista.com>
 17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
 18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
 19  *      Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
 20  *
 21  * Copyright (c) 2004 Texas Instruments.
 22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
 23  *      2. Ported to 2.6 kernel
 24  *
 25  * Copyright (c) 2005 David Brownell
 26  *      Use the driver model and standard identifiers; handle bigger timeouts.
 27  */
 28 
 29 #include <linux/module.h>
 30 #include <linux/types.h>
 31 #include <linux/kernel.h>
 32 #include <linux/fs.h>
 33 #include <linux/mm.h>
 34 #include <linux/miscdevice.h>
 35 #include <linux/watchdog.h>
 36 #include <linux/reboot.h>
 37 #include <linux/init.h>
 38 #include <linux/err.h>
 39 #include <linux/platform_device.h>
 40 #include <linux/moduleparam.h>
 41 #include <linux/clk.h>
 42 #include <linux/bitops.h>
 43 #include <linux/io.h>
 44 #include <linux/uaccess.h>
 45 #include <mach/hardware.h>
 46 #include <mach/prcm.h>
 47 
 48 #include "omap_wdt.h"
 49 
 50 static struct platform_device *omap_wdt_dev;
 51 
 52 static unsigned timer_margin;
 53 module_param(timer_margin, uint, 0);
 54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
 55 
 56 static unsigned int wdt_trgr_pattern = 0x1234;
 57 static spinlock_t wdt_lock;
 58 
 59 struct omap_wdt_dev {
 60         void __iomem    *base;          /* physical */
 61         struct device   *dev;
 62         int             omap_wdt_users;
 63         struct clk      *ick;
 64         struct clk      *fck;
 65         struct resource *mem;
 66         struct miscdevice omap_wdt_miscdev;
 67 };
 68 
 69 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
 70 {
 71         void __iomem    *base = wdev->base;
 72 
 73         /* wait for posted write to complete */
 74         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
 75                 cpu_relax();
 76 
 77         wdt_trgr_pattern = ~wdt_trgr_pattern;
 78         __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
 79 
 80         /* wait for posted write to complete */
 81         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
 82                 cpu_relax();
 83         /* reloaded WCRR from WLDR */
 84 }
 85 
 86 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
 87 {
 88         void __iomem *base = wdev->base;
 89 
 90         /* Sequence to enable the watchdog */
 91         __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
 92         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
 93                 cpu_relax();
 94 
 95         __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
 96         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
 97                 cpu_relax();
 98 }
 99 
100 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
101 {
102         void __iomem *base = wdev->base;
103 
104         /* sequence required to disable watchdog */
105         __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
106         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
107                 cpu_relax();
108 
109         __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
110         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
111                 cpu_relax();
112 }
113 
114 static void omap_wdt_adjust_timeout(unsigned new_timeout)
115 {
116         if (new_timeout < TIMER_MARGIN_MIN)
117                 new_timeout = TIMER_MARGIN_DEFAULT;
118         if (new_timeout > TIMER_MARGIN_MAX)
119                 new_timeout = TIMER_MARGIN_MAX;
120         timer_margin = new_timeout;
121 }
122 
123 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
124 {
125         u32 pre_margin = GET_WLDR_VAL(timer_margin);
126         void __iomem *base = wdev->base;
127 
128         /* just count up at 32 KHz */
129         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
130                 cpu_relax();
131 
132         __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
133         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
134                 cpu_relax();
135 }
136 
137 /*
138  *      Allow only one task to hold it open
139  */
140 static int omap_wdt_open(struct inode *inode, struct file *file)
141 {
142         struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
143         void __iomem *base = wdev->base;
144 
145         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
146                 return -EBUSY;
147 
148         clk_enable(wdev->ick);    /* Enable the interface clock */
149         clk_enable(wdev->fck);    /* Enable the functional clock */
150 
151         /* initialize prescaler */
152         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
153                 cpu_relax();
154 
155         __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
156         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
157                 cpu_relax();
158 
159         file->private_data = (void *) wdev;
160 
161         omap_wdt_set_timeout(wdev);
162         omap_wdt_ping(wdev); /* trigger loading of new timeout value */
163         omap_wdt_enable(wdev);
164 
165         return nonseekable_open(inode, file);
166 }
167 
168 static int omap_wdt_release(struct inode *inode, struct file *file)
169 {
170         struct omap_wdt_dev *wdev = file->private_data;
171 
172         /*
173          *      Shut off the timer unless NOWAYOUT is defined.
174          */
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
176 
177         omap_wdt_disable(wdev);
178 
179         clk_disable(wdev->ick);
180         clk_disable(wdev->fck);
181 #else
182         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
183 #endif
184         wdev->omap_wdt_users = 0;
185 
186         return 0;
187 }
188 
189 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
190                 size_t len, loff_t *ppos)
191 {
192         struct omap_wdt_dev *wdev = file->private_data;
193 
194         /* Refresh LOAD_TIME. */
195         if (len) {
196                 spin_lock(&wdt_lock);
197                 omap_wdt_ping(wdev);
198                 spin_unlock(&wdt_lock);
199         }
200         return len;
201 }
202 
203 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
204                                                 unsigned long arg)
205 {
206         struct omap_wdt_dev *wdev;
207         int new_margin;
208         static const struct watchdog_info ident = {
209                 .identity = "OMAP Watchdog",
210                 .options = WDIOF_SETTIMEOUT,
211                 .firmware_version = 0,
212         };
213 
214         wdev = file->private_data;
215 
216         switch (cmd) {
217         case WDIOC_GETSUPPORT:
218                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
219                                 sizeof(ident));
220         case WDIOC_GETSTATUS:
221                 return put_user(0, (int __user *)arg);
222         case WDIOC_GETBOOTSTATUS:
223                 if (cpu_is_omap16xx())
224                         return put_user(__raw_readw(ARM_SYSST),
225                                         (int __user *)arg);
226                 if (cpu_is_omap24xx())
227                         return put_user(omap_prcm_get_reset_sources(),
228                                         (int __user *)arg);
229         case WDIOC_KEEPALIVE:
230                 spin_lock(&wdt_lock);
231                 omap_wdt_ping(wdev);
232                 spin_unlock(&wdt_lock);
233                 return 0;
234         case WDIOC_SETTIMEOUT:
235                 if (get_user(new_margin, (int __user *)arg))
236                         return -EFAULT;
237                 omap_wdt_adjust_timeout(new_margin);
238 
239                 spin_lock(&wdt_lock);
240                 omap_wdt_disable(wdev);
241                 omap_wdt_set_timeout(wdev);
242                 omap_wdt_enable(wdev);
243 
244                 omap_wdt_ping(wdev);
245                 spin_unlock(&wdt_lock);
246                 /* Fall */
247         case WDIOC_GETTIMEOUT:
248                 return put_user(timer_margin, (int __user *)arg);
249         default:
250                 return -ENOTTY;
251         }
252 }
253 
254 static const struct file_operations omap_wdt_fops = {
255         .owner = THIS_MODULE,
256         .write = omap_wdt_write,
257         .unlocked_ioctl = omap_wdt_ioctl,
258         .open = omap_wdt_open,
259         .release = omap_wdt_release,
260 };
261 
262 static int __devinit omap_wdt_probe(struct platform_device *pdev)
263 {
264         struct resource *res, *mem;
265         struct omap_wdt_dev *wdev;
266         int ret;
267 
268         /* reserve static register mappings */
269         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
270         if (!res) {
271                 ret = -ENOENT;
272                 goto err_get_resource;
273         }
274 
275         if (omap_wdt_dev) {
276                 ret = -EBUSY;
277                 goto err_busy;
278         }
279 
280         mem = request_mem_region(res->start, res->end - res->start + 1,
281                                  pdev->name);
282         if (!mem) {
283                 ret = -EBUSY;
284                 goto err_busy;
285         }
286 
287         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
288         if (!wdev) {
289                 ret = -ENOMEM;
290                 goto err_kzalloc;
291         }
292 
293         wdev->omap_wdt_users = 0;
294         wdev->mem = mem;
295 
296         wdev->ick = clk_get(&pdev->dev, "ick");
297         if (IS_ERR(wdev->ick)) {
298                 ret = PTR_ERR(wdev->ick);
299                 wdev->ick = NULL;
300                 goto err_clk;
301         }
302         wdev->fck = clk_get(&pdev->dev, "fck");
303         if (IS_ERR(wdev->fck)) {
304                 ret = PTR_ERR(wdev->fck);
305                 wdev->fck = NULL;
306                 goto err_clk;
307         }
308 
309         wdev->base = ioremap(res->start, res->end - res->start + 1);
310         if (!wdev->base) {
311                 ret = -ENOMEM;
312                 goto err_ioremap;
313         }
314 
315         platform_set_drvdata(pdev, wdev);
316 
317         clk_enable(wdev->ick);
318         clk_enable(wdev->fck);
319 
320         omap_wdt_disable(wdev);
321         omap_wdt_adjust_timeout(timer_margin);
322 
323         wdev->omap_wdt_miscdev.parent = &pdev->dev;
324         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
325         wdev->omap_wdt_miscdev.name = "watchdog";
326         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
327 
328         ret = misc_register(&(wdev->omap_wdt_miscdev));
329         if (ret)
330                 goto err_misc;
331 
332         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
333                 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
334                 timer_margin);
335 
336         /* autogate OCP interface clock */
337         __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
338 
339         clk_disable(wdev->ick);
340         clk_disable(wdev->fck);
341 
342         omap_wdt_dev = pdev;
343 
344         return 0;
345 
346 err_misc:
347         platform_set_drvdata(pdev, NULL);
348         iounmap(wdev->base);
349 
350 err_ioremap:
351         wdev->base = NULL;
352 
353 err_clk:
354         if (wdev->ick)
355                 clk_put(wdev->ick);
356         if (wdev->fck)
357                 clk_put(wdev->fck);
358         kfree(wdev);
359 
360 err_kzalloc:
361         release_mem_region(res->start, res->end - res->start + 1);
362 
363 err_busy:
364 err_get_resource:
365 
366         return ret;
367 }
368 
369 static void omap_wdt_shutdown(struct platform_device *pdev)
370 {
371         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
372 
373         if (wdev->omap_wdt_users)
374                 omap_wdt_disable(wdev);
375 }
376 
377 static int __devexit omap_wdt_remove(struct platform_device *pdev)
378 {
379         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
380         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
381 
382         if (!res)
383                 return -ENOENT;
384 
385         misc_deregister(&(wdev->omap_wdt_miscdev));
386         release_mem_region(res->start, res->end - res->start + 1);
387         platform_set_drvdata(pdev, NULL);
388 
389         clk_put(wdev->ick);
390         clk_put(wdev->fck);
391         iounmap(wdev->base);
392 
393         kfree(wdev);
394         omap_wdt_dev = NULL;
395 
396         return 0;
397 }
398 
399 #ifdef  CONFIG_PM
400 
401 /* REVISIT ... not clear this is the best way to handle system suspend; and
402  * it's very inappropriate for selective device suspend (e.g. suspending this
403  * through sysfs rather than by stopping the watchdog daemon).  Also, this
404  * may not play well enough with NOWAYOUT...
405  */
406 
407 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
408 {
409         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
410 
411         if (wdev->omap_wdt_users)
412                 omap_wdt_disable(wdev);
413 
414         return 0;
415 }
416 
417 static int omap_wdt_resume(struct platform_device *pdev)
418 {
419         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
420 
421         if (wdev->omap_wdt_users) {
422                 omap_wdt_enable(wdev);
423                 omap_wdt_ping(wdev);
424         }
425 
426         return 0;
427 }
428 
429 #else
430 #define omap_wdt_suspend        NULL
431 #define omap_wdt_resume         NULL
432 #endif
433 
434 static struct platform_driver omap_wdt_driver = {
435         .probe          = omap_wdt_probe,
436         .remove         = __devexit_p(omap_wdt_remove),
437         .shutdown       = omap_wdt_shutdown,
438         .suspend        = omap_wdt_suspend,
439         .resume         = omap_wdt_resume,
440         .driver         = {
441                 .owner  = THIS_MODULE,
442                 .name   = "omap_wdt",
443         },
444 };
445 
446 static int __init omap_wdt_init(void)
447 {
448         spin_lock_init(&wdt_lock);
449         return platform_driver_register(&omap_wdt_driver);
450 }
451 
452 static void __exit omap_wdt_exit(void)
453 {
454         platform_driver_unregister(&omap_wdt_driver);
455 }
456 
457 module_init(omap_wdt_init);
458 module_exit(omap_wdt_exit);
459 
460 MODULE_AUTHOR("George G. Davis");
461 MODULE_LICENSE("GPL");
462 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
463 MODULE_ALIAS("platform:omap_wdt");
464 
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