1 /* p9100.c: P9100 frame buffer driver
2 *
3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
5 *
6 * Driver layout based loosely on tgafb.c, see that file for credits.
7 */
8
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/errno.h>
12 #include <linux/string.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/fb.h>
17 #include <linux/mm.h>
18
19 #include <asm/io.h>
20 #include <asm/prom.h>
21 #include <asm/of_device.h>
22 #include <asm/fbio.h>
23
24 #include "sbuslib.h"
25
26 /*
27 * Local functions.
28 */
29
30 static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned,
31 unsigned, struct fb_info *);
32 static int p9100_blank(int, struct fb_info *);
33
34 static int p9100_mmap(struct fb_info *, struct vm_area_struct *);
35 static int p9100_ioctl(struct fb_info *, unsigned int, unsigned long);
36
37 /*
38 * Frame buffer operations
39 */
40
41 static struct fb_ops p9100_ops = {
42 .owner = THIS_MODULE,
43 .fb_setcolreg = p9100_setcolreg,
44 .fb_blank = p9100_blank,
45 .fb_fillrect = cfb_fillrect,
46 .fb_copyarea = cfb_copyarea,
47 .fb_imageblit = cfb_imageblit,
48 .fb_mmap = p9100_mmap,
49 .fb_ioctl = p9100_ioctl,
50 #ifdef CONFIG_COMPAT
51 .fb_compat_ioctl = sbusfb_compat_ioctl,
52 #endif
53 };
54
55 /* P9100 control registers */
56 #define P9100_SYSCTL_OFF 0x0UL
57 #define P9100_VIDEOCTL_OFF 0x100UL
58 #define P9100_VRAMCTL_OFF 0x180UL
59 #define P9100_RAMDAC_OFF 0x200UL
60 #define P9100_VIDEOCOPROC_OFF 0x400UL
61
62 /* P9100 command registers */
63 #define P9100_CMD_OFF 0x0UL
64
65 /* P9100 framebuffer memory */
66 #define P9100_FB_OFF 0x0UL
67
68 /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
69 #define SYS_CONFIG_PIXELSIZE_SHIFT 26
70
71 #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
72
73 struct p9100_regs {
74 /* Registers for the system control */
75 u32 sys_base;
76 u32 sys_config;
77 u32 sys_intr;
78 u32 sys_int_ena;
79 u32 sys_alt_rd;
80 u32 sys_alt_wr;
81 u32 sys_xxx[58];
82
83 /* Registers for the video control */
84 u32 vid_base;
85 u32 vid_hcnt;
86 u32 vid_htotal;
87 u32 vid_hsync_rise;
88 u32 vid_hblank_rise;
89 u32 vid_hblank_fall;
90 u32 vid_hcnt_preload;
91 u32 vid_vcnt;
92 u32 vid_vlen;
93 u32 vid_vsync_rise;
94 u32 vid_vblank_rise;
95 u32 vid_vblank_fall;
96 u32 vid_vcnt_preload;
97 u32 vid_screenpaint_addr;
98 u32 vid_screenpaint_timectl1;
99 u32 vid_screenpaint_qsfcnt;
100 u32 vid_screenpaint_timectl2;
101 u32 vid_xxx[15];
102
103 /* Registers for the video control */
104 u32 vram_base;
105 u32 vram_memcfg;
106 u32 vram_refresh_pd;
107 u32 vram_refresh_cnt;
108 u32 vram_raslo_max;
109 u32 vram_raslo_cur;
110 u32 pwrup_cfg;
111 u32 vram_xxx[25];
112
113 /* Registers for IBM RGB528 Palette */
114 u32 ramdac_cmap_wridx;
115 u32 ramdac_palette_data;
116 u32 ramdac_pixel_mask;
117 u32 ramdac_palette_rdaddr;
118 u32 ramdac_idx_lo;
119 u32 ramdac_idx_hi;
120 u32 ramdac_idx_data;
121 u32 ramdac_idx_ctl;
122 u32 ramdac_xxx[1784];
123 };
124
125 struct p9100_cmd_parameng {
126 u32 parameng_status;
127 u32 parameng_bltcmd;
128 u32 parameng_quadcmd;
129 };
130
131 struct p9100_par {
132 spinlock_t lock;
133 struct p9100_regs __iomem *regs;
134
135 u32 flags;
136 #define P9100_FLAG_BLANKED 0x00000001
137
138 unsigned long physbase;
139 unsigned long which_io;
140 unsigned long fbsize;
141 };
142
143 /**
144 * p9100_setcolreg - Optional function. Sets a color register.
145 * @regno: boolean, 0 copy local, 1 get_user() function
146 * @red: frame buffer colormap structure
147 * @green: The green value which can be up to 16 bits wide
148 * @blue: The blue value which can be up to 16 bits wide.
149 * @transp: If supported the alpha value which can be up to 16 bits wide.
150 * @info: frame buffer info structure
151 */
152 static int p9100_setcolreg(unsigned regno,
153 unsigned red, unsigned green, unsigned blue,
154 unsigned transp, struct fb_info *info)
155 {
156 struct p9100_par *par = (struct p9100_par *) info->par;
157 struct p9100_regs __iomem *regs = par->regs;
158 unsigned long flags;
159
160 if (regno >= 256)
161 return 1;
162
163 red >>= 8;
164 green >>= 8;
165 blue >>= 8;
166
167 spin_lock_irqsave(&par->lock, flags);
168
169 sbus_writel((regno << 16), ®s->ramdac_cmap_wridx);
170 sbus_writel((red << 16), ®s->ramdac_palette_data);
171 sbus_writel((green << 16), ®s->ramdac_palette_data);
172 sbus_writel((blue << 16), ®s->ramdac_palette_data);
173
174 spin_unlock_irqrestore(&par->lock, flags);
175
176 return 0;
177 }
178
179 /**
180 * p9100_blank - Optional function. Blanks the display.
181 * @blank_mode: the blank mode we want.
182 * @info: frame buffer structure that represents a single frame buffer
183 */
184 static int
185 p9100_blank(int blank, struct fb_info *info)
186 {
187 struct p9100_par *par = (struct p9100_par *) info->par;
188 struct p9100_regs __iomem *regs = par->regs;
189 unsigned long flags;
190 u32 val;
191
192 spin_lock_irqsave(&par->lock, flags);
193
194 switch (blank) {
195 case FB_BLANK_UNBLANK: /* Unblanking */
196 val = sbus_readl(®s->vid_screenpaint_timectl1);
197 val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
198 sbus_writel(val, ®s->vid_screenpaint_timectl1);
199 par->flags &= ~P9100_FLAG_BLANKED;
200 break;
201
202 case FB_BLANK_NORMAL: /* Normal blanking */
203 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
204 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
205 case FB_BLANK_POWERDOWN: /* Poweroff */
206 val = sbus_readl(®s->vid_screenpaint_timectl1);
207 val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
208 sbus_writel(val, ®s->vid_screenpaint_timectl1);
209 par->flags |= P9100_FLAG_BLANKED;
210 break;
211 }
212
213 spin_unlock_irqrestore(&par->lock, flags);
214
215 return 0;
216 }
217
218 static struct sbus_mmap_map p9100_mmap_map[] = {
219 { CG3_MMAP_OFFSET, 0, SBUS_MMAP_FBSIZE(1) },
220 { 0, 0, 0 }
221 };
222
223 static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma)
224 {
225 struct p9100_par *par = (struct p9100_par *)info->par;
226
227 return sbusfb_mmap_helper(p9100_mmap_map,
228 par->physbase, par->fbsize,
229 par->which_io, vma);
230 }
231
232 static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
233 unsigned long arg)
234 {
235 struct p9100_par *par = (struct p9100_par *) info->par;
236
237 /* Make it look like a cg3. */
238 return sbusfb_ioctl_helper(cmd, arg, info,
239 FBTYPE_SUN3COLOR, 8, par->fbsize);
240 }
241
242 /*
243 * Initialisation
244 */
245
246 static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
247 {
248 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
249
250 info->fix.type = FB_TYPE_PACKED_PIXELS;
251 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
252
253 info->fix.line_length = linebytes;
254
255 info->fix.accel = FB_ACCEL_SUN_CGTHREE;
256 }
257
258 static int __devinit p9100_probe(struct of_device *op, const struct of_device_id *match)
259 {
260 struct device_node *dp = op->node;
261 struct fb_info *info;
262 struct p9100_par *par;
263 int linebytes, err;
264
265 info = framebuffer_alloc(sizeof(struct p9100_par), &op->dev);
266
267 err = -ENOMEM;
268 if (!info)
269 goto out_err;
270 par = info->par;
271
272 spin_lock_init(&par->lock);
273
274 /* This is the framebuffer and the only resource apps can mmap. */
275 par->physbase = op->resource[2].start;
276 par->which_io = op->resource[2].flags & IORESOURCE_BITS;
277
278 sbusfb_fill_var(&info->var, dp->node, 8);
279 info->var.red.length = 8;
280 info->var.green.length = 8;
281 info->var.blue.length = 8;
282
283 linebytes = of_getintprop_default(dp, "linebytes", info->var.xres);
284 par->fbsize = PAGE_ALIGN(linebytes * info->var.yres);
285
286 par->regs = of_ioremap(&op->resource[0], 0,
287 sizeof(struct p9100_regs), "p9100 regs");
288 if (!par->regs)
289 goto out_release_fb;
290
291 info->flags = FBINFO_DEFAULT;
292 info->fbops = &p9100_ops;
293 info->screen_base = of_ioremap(&op->resource[2], 0,
294 par->fbsize, "p9100 ram");
295 if (!info->screen_base)
296 goto out_unmap_regs;
297
298 p9100_blank(0, info);
299
300 if (fb_alloc_cmap(&info->cmap, 256, 0))
301 goto out_unmap_screen;
302
303 p9100_init_fix(info, linebytes, dp);
304
305 err = register_framebuffer(info);
306 if (err < 0)
307 goto out_dealloc_cmap;
308
309 fb_set_cmap(&info->cmap, info);
310
311 dev_set_drvdata(&op->dev, info);
312
313 printk("%s: p9100 at %lx:%lx\n",
314 dp->full_name,
315 par->which_io, par->physbase);
316
317 return 0;
318
319 out_dealloc_cmap:
320 fb_dealloc_cmap(&info->cmap);
321
322 out_unmap_screen:
323 of_iounmap(&op->resource[2], info->screen_base, par->fbsize);
324
325 out_unmap_regs:
326 of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs));
327
328 out_release_fb:
329 framebuffer_release(info);
330
331 out_err:
332 return err;
333 }
334
335 static int __devexit p9100_remove(struct of_device *op)
336 {
337 struct fb_info *info = dev_get_drvdata(&op->dev);
338 struct p9100_par *par = info->par;
339
340 unregister_framebuffer(info);
341 fb_dealloc_cmap(&info->cmap);
342
343 of_iounmap(&op->resource[0], par->regs, sizeof(struct p9100_regs));
344 of_iounmap(&op->resource[2], info->screen_base, par->fbsize);
345
346 framebuffer_release(info);
347
348 dev_set_drvdata(&op->dev, NULL);
349
350 return 0;
351 }
352
353 static struct of_device_id p9100_match[] = {
354 {
355 .name = "p9100",
356 },
357 {},
358 };
359 MODULE_DEVICE_TABLE(of, p9100_match);
360
361 static struct of_platform_driver p9100_driver = {
362 .name = "p9100",
363 .match_table = p9100_match,
364 .probe = p9100_probe,
365 .remove = __devexit_p(p9100_remove),
366 };
367
368 static int __init p9100_init(void)
369 {
370 if (fb_get_options("p9100fb", NULL))
371 return -ENODEV;
372
373 return of_register_driver(&p9100_driver, &of_bus_type);
374 }
375
376 static void __exit p9100_exit(void)
377 {
378 of_unregister_driver(&p9100_driver);
379 }
380
381 module_init(p9100_init);
382 module_exit(p9100_exit);
383
384 MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
385 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
386 MODULE_VERSION("2.0");
387 MODULE_LICENSE("GPL");
388
|
This page was automatically generated by the
LXR engine.
|