1 #ifndef _INTELFB_H
2 #define _INTELFB_H
3
4 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
5
6 #include <linux/agp_backend.h>
7 #include <linux/fb.h>
8
9 #ifdef CONFIG_FB_INTEL_I2C
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
12 #endif
13
14 /*** Version/name ***/
15 #define INTELFB_VERSION "0.9.4"
16 #define INTELFB_MODULE_NAME "intelfb"
17 #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM"
18
19
20 /*** Debug/feature defines ***/
21
22 #ifndef DEBUG
23 #define DEBUG 0
24 #endif
25
26 #ifndef VERBOSE
27 #define VERBOSE 0
28 #endif
29
30 #ifndef REGDUMP
31 #define REGDUMP 0
32 #endif
33
34 #ifndef DETECT_VGA_CLASS_ONLY
35 #define DETECT_VGA_CLASS_ONLY 1
36 #endif
37
38 #ifndef ALLOCATE_FOR_PANNING
39 #define ALLOCATE_FOR_PANNING 1
40 #endif
41
42 #ifndef PREFERRED_MODE
43 #define PREFERRED_MODE "1024x768-32@70"
44 #endif
45
46 /*** hw-related values ***/
47
48 /* Resource Allocation */
49 #define INTELFB_FB_ACQUIRED 1
50 #define INTELFB_MMIO_ACQUIRED 2
51
52 /* PCI ids for supported devices */
53 #define PCI_DEVICE_ID_INTEL_830M 0x3577
54 #define PCI_DEVICE_ID_INTEL_845G 0x2562
55 #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
56 #define PCI_DEVICE_ID_INTEL_865G 0x2572
57 #define PCI_DEVICE_ID_INTEL_915G 0x2582
58 #define PCI_DEVICE_ID_INTEL_915GM 0x2592
59 #define PCI_DEVICE_ID_INTEL_945G 0x2772
60 #define PCI_DEVICE_ID_INTEL_945GM 0x27A2
61
62 /* Size of MMIO region */
63 #define INTEL_REG_SIZE 0x80000
64
65 #define STRIDE_ALIGNMENT 16
66 #define STRIDE_ALIGNMENT_I9XX 64
67
68 #define PALETTE_8_ENTRIES 256
69
70
71 /*** Macros ***/
72
73 /* basic arithmetic */
74 #define KB(x) ((x) * 1024)
75 #define MB(x) ((x) * 1024 * 1024)
76 #define BtoKB(x) ((x) / 1024)
77 #define BtoMB(x) ((x) / 1024 / 1024)
78
79 #define GTT_PAGE_SIZE KB(4)
80
81 #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
82 #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
83 #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
84 #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
85
86 /* messages */
87 #define PFX INTELFB_MODULE_NAME ": "
88
89 #define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
90 #define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
91 #define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
92 #define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
93 #if DEBUG
94 #define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
95 #else
96 #define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
97 #endif
98
99 /* get commonly used pointers */
100 #define GET_DINFO(info) (info)->par
101
102 /* misc macros */
103 #define ACCEL(d, i) \
104 ((d)->accel && !(d)->ring_lockup && \
105 ((i)->var.accel_flags & FB_ACCELF_TEXT))
106
107 /*#define NOACCEL_CHIPSET(d) \
108 ((d)->chipset != INTEL_865G)*/
109 #define NOACCEL_CHIPSET(d) \
110 (0)
111
112 #define FIXED_MODE(d) ((d)->fixed_mode)
113
114 /*** Driver parameters ***/
115
116 #define RINGBUFFER_SIZE KB(64)
117 #define HW_CURSOR_SIZE KB(4)
118
119 /* Intel agpgart driver */
120 #define AGP_PHYSICAL_MEMORY 2
121
122 /* store information about an Ixxx DVO */
123 /* The i830->i865 use multiple DVOs with multiple i2cs */
124 /* the i915, i945 have a single sDVO i2c bus - which is different */
125 #define MAX_OUTPUTS 6
126
127 /* these are outputs from the chip - integrated only
128 external chips are via DVO or SDVO output */
129 #define INTELFB_OUTPUT_UNUSED 0
130 #define INTELFB_OUTPUT_ANALOG 1
131 #define INTELFB_OUTPUT_DVO 2
132 #define INTELFB_OUTPUT_SDVO 3
133 #define INTELFB_OUTPUT_LVDS 4
134 #define INTELFB_OUTPUT_TVOUT 5
135
136 #define INTELFB_DVO_CHIP_NONE 0
137 #define INTELFB_DVO_CHIP_LVDS 1
138 #define INTELFB_DVO_CHIP_TMDS 2
139 #define INTELFB_DVO_CHIP_TVOUT 4
140
141 #define INTELFB_OUTPUT_PIPE_NC 0
142 #define INTELFB_OUTPUT_PIPE_A 1
143 #define INTELFB_OUTPUT_PIPE_B 2
144
145 /*** Data Types ***/
146
147 /* supported chipsets */
148 enum intel_chips {
149 INTEL_830M,
150 INTEL_845G,
151 INTEL_85XGM,
152 INTEL_852GM,
153 INTEL_852GME,
154 INTEL_855GM,
155 INTEL_855GME,
156 INTEL_865G,
157 INTEL_915G,
158 INTEL_915GM,
159 INTEL_945G,
160 INTEL_945GM,
161 };
162
163 struct intelfb_hwstate {
164 u32 vga0_divisor;
165 u32 vga1_divisor;
166 u32 vga_pd;
167 u32 dpll_a;
168 u32 dpll_b;
169 u32 fpa0;
170 u32 fpa1;
171 u32 fpb0;
172 u32 fpb1;
173 u32 palette_a[PALETTE_8_ENTRIES];
174 u32 palette_b[PALETTE_8_ENTRIES];
175 u32 htotal_a;
176 u32 hblank_a;
177 u32 hsync_a;
178 u32 vtotal_a;
179 u32 vblank_a;
180 u32 vsync_a;
181 u32 src_size_a;
182 u32 bclrpat_a;
183 u32 htotal_b;
184 u32 hblank_b;
185 u32 hsync_b;
186 u32 vtotal_b;
187 u32 vblank_b;
188 u32 vsync_b;
189 u32 src_size_b;
190 u32 bclrpat_b;
191 u32 adpa;
192 u32 dvoa;
193 u32 dvob;
194 u32 dvoc;
195 u32 dvoa_srcdim;
196 u32 dvob_srcdim;
197 u32 dvoc_srcdim;
198 u32 lvds;
199 u32 pipe_a_conf;
200 u32 pipe_b_conf;
201 u32 disp_arb;
202 u32 cursor_a_control;
203 u32 cursor_b_control;
204 u32 cursor_a_base;
205 u32 cursor_b_base;
206 u32 cursor_size;
207 u32 disp_a_ctrl;
208 u32 disp_b_ctrl;
209 u32 disp_a_base;
210 u32 disp_b_base;
211 u32 cursor_a_palette[4];
212 u32 cursor_b_palette[4];
213 u32 disp_a_stride;
214 u32 disp_b_stride;
215 u32 vgacntrl;
216 u32 add_id;
217 u32 swf0x[7];
218 u32 swf1x[7];
219 u32 swf3x[3];
220 u32 fence[8];
221 u32 instpm;
222 u32 mem_mode;
223 u32 fw_blc_0;
224 u32 fw_blc_1;
225 u16 hwstam;
226 u16 ier;
227 u16 iir;
228 u16 imr;
229 };
230
231 struct intelfb_heap_data {
232 u32 physical;
233 u8 __iomem *virtual;
234 u32 offset; /* in GATT pages */
235 u32 size; /* in bytes */
236 };
237
238 #ifdef CONFIG_FB_INTEL_I2C
239 struct intelfb_i2c_chan {
240 struct intelfb_info *dinfo;
241 u32 reg;
242 struct i2c_adapter adapter;
243 struct i2c_algo_bit_data algo;
244 };
245 #endif
246
247 struct intelfb_output_rec {
248 int type;
249 int pipe;
250 int flags;
251
252 #ifdef CONFIG_FB_INTEL_I2C
253 struct intelfb_i2c_chan i2c_bus;
254 struct intelfb_i2c_chan ddc_bus;
255 #endif
256 };
257
258 struct intelfb_vsync {
259 wait_queue_head_t wait;
260 unsigned int count;
261 int pan_display;
262 u32 pan_offset;
263 };
264
265 struct intelfb_info {
266 struct fb_info *info;
267 struct fb_ops *fbops;
268 struct pci_dev *pdev;
269
270 struct intelfb_hwstate save_state;
271
272 /* agpgart structs */
273 struct agp_memory *gtt_fb_mem; /* use all stolen memory or vram */
274 struct agp_memory *gtt_ring_mem; /* ring buffer */
275 struct agp_memory *gtt_cursor_mem; /* hw cursor */
276
277 /* use a gart reserved fb mem */
278 u8 fbmem_gart;
279
280 /* mtrr support */
281 int mtrr_reg;
282 u32 has_mtrr;
283
284 /* heap data */
285 struct intelfb_heap_data aperture;
286 struct intelfb_heap_data fb;
287 struct intelfb_heap_data ring;
288 struct intelfb_heap_data cursor;
289
290 /* mmio regs */
291 u32 mmio_base_phys;
292 u8 __iomem *mmio_base;
293
294 /* fb start offset (in bytes) */
295 u32 fb_start;
296
297 /* ring buffer */
298 u32 ring_head;
299 u32 ring_tail;
300 u32 ring_tail_mask;
301 u32 ring_space;
302 u32 ring_lockup;
303
304 /* palette */
305 u32 pseudo_palette[16];
306
307 /* chip info */
308 int pci_chipset;
309 int chipset;
310 const char *name;
311 int mobile;
312
313 /* current mode */
314 int bpp, depth;
315 u32 visual;
316 int xres, yres, pitch;
317 int pixclock;
318
319 /* current pipe */
320 int pipe;
321
322 /* some flags */
323 int accel;
324 int hwcursor;
325 int fixed_mode;
326 int ring_active;
327 int flag;
328 unsigned long irq_flags;
329 int open;
330
331 /* vsync */
332 struct intelfb_vsync vsync;
333 spinlock_t int_lock;
334
335 /* hw cursor */
336 int cursor_on;
337 int cursor_blanked;
338 u8 cursor_src[64];
339
340 /* initial parameters */
341 int initial_vga;
342 struct fb_var_screeninfo initial_var;
343 u32 initial_fb_base;
344 u32 initial_video_ram;
345 u32 initial_pitch;
346
347 /* driver registered */
348 int registered;
349
350 /* index into plls */
351 int pll_index;
352
353 /* outputs */
354 int num_outputs;
355 struct intelfb_output_rec output[MAX_OUTPUTS];
356 };
357
358 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
359 ((dinfo)->chipset == INTEL_915GM) || \
360 ((dinfo)->chipset == INTEL_945G) || \
361 ((dinfo)->chipset==INTEL_945GM))
362
363 #ifndef FBIO_WAITFORVSYNC
364 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
365 #endif
366
367 /*** function prototypes ***/
368
369 extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
370
371 #ifdef CONFIG_FB_INTEL_I2C
372 extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
373 extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
374 #endif
375
376 #endif /* _INTELFB_H */
377
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