1 /*
2 * USB ConnectTech WhiteHEAT driver
3 *
4 * Copyright (C) 2002
5 * Connect Tech Inc.
6 *
7 * Copyright (C) 1999, 2000
8 * Greg Kroah-Hartman (greg@kroah.com)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * See Documentation/usb/usb-serial.txt for more information on using this driver
16 *
17 */
18
19 #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
20 #define __LINUX_USB_SERIAL_WHITEHEAT_H
21
22
23 /* WhiteHEAT commands */
24 #define WHITEHEAT_OPEN 1 /* open the port */
25 #define WHITEHEAT_CLOSE 2 /* close the port */
26 #define WHITEHEAT_SETUP_PORT 3 /* change port settings */
27 #define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
28 #define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
29 #define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
30 #define WHITEHEAT_DUMP 7 /* dump memory */
31 #define WHITEHEAT_STATUS 8 /* get status */
32 #define WHITEHEAT_PURGE 9 /* clear the UART fifos */
33 #define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS for a port */
34 #define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and hardware ID */
35 #define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
36 #define WHITEHEAT_EVENT 13 /* unsolicited status events */
37 #define WHITEHEAT_ECHO 14 /* send data to the indicated IN endpoint */
38 #define WHITEHEAT_DO_TEST 15 /* perform the specified test */
39 #define WHITEHEAT_CMD_COMPLETE 16 /* reply for certain commands */
40 #define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
41
42
43 /*
44 * Commands to the firmware
45 */
46
47
48 /*
49 * WHITEHEAT_OPEN
50 * WHITEHEAT_CLOSE
51 * WHITEHEAT_STATUS
52 * WHITEHEAT_GET_DTR_RTS
53 * WHITEHEAT_REPORT_TX_DONE
54 */
55 struct whiteheat_simple {
56 __u8 port; /* port number (1 to N) */
57 };
58
59
60 /*
61 * WHITEHEAT_SETUP_PORT
62 */
63 #define WHITEHEAT_PAR_NONE 'n' /* no parity */
64 #define WHITEHEAT_PAR_EVEN 'e' /* even parity */
65 #define WHITEHEAT_PAR_ODD 'o' /* odd parity */
66 #define WHITEHEAT_PAR_SPACE '' /* space (force 0) parity */
67 #define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */
68
69 #define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */
70 #define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX fills/empties */
71 #define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will stop/start TX */
72 #define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */
73
74 #define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */
75 #define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit, off otherwise */
76 #define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX fills/empties */
77 #define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on will stop/start TX */
78 #define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on will stop/start TX */
79 #define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX fills/empties */
80
81 struct whiteheat_port_settings {
82 __u8 port; /* port number (1 to N) */
83 __u32 baud; /* any value 7 - 460800, firmware calculates best fit; arrives little endian */
84 __u8 bits; /* 5, 6, 7, or 8 */
85 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
86 __u8 parity; /* see WHITEHEAT_PAR_* above */
87 __u8 sflow; /* see WHITEHEAT_SFLOW_* above */
88 __u8 xoff; /* XOFF byte value */
89 __u8 xon; /* XON byte value */
90 __u8 hflow; /* see WHITEHEAT_HFLOW_* above */
91 __u8 lloop; /* 0/1 turns local loopback mode off/on */
92 } __attribute__ ((packed));
93
94
95 /*
96 * WHITEHEAT_SET_RTS
97 * WHITEHEAT_SET_DTR
98 * WHITEHEAT_SET_BREAK
99 */
100 #define WHITEHEAT_RTS_OFF 0x00
101 #define WHITEHEAT_RTS_ON 0x01
102 #define WHITEHEAT_DTR_OFF 0x00
103 #define WHITEHEAT_DTR_ON 0x01
104 #define WHITEHEAT_BREAK_OFF 0x00
105 #define WHITEHEAT_BREAK_ON 0x01
106
107 struct whiteheat_set_rdb {
108 __u8 port; /* port number (1 to N) */
109 __u8 state; /* 0/1 turns signal off/on */
110 };
111
112
113 /*
114 * WHITEHEAT_DUMP
115 */
116 #define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */
117 #define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */
118 #define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */
119 #define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */
120
121 /*
122 * Allowable address ranges (firmware checks address):
123 * Type DATA: 0x00 - 0xff
124 * Type IDATA: 0x80 - 0xff
125 * Type BDATA: 0x20 - 0x2f
126 * Type XDATA: 0x0000 - 0xffff
127 *
128 * B/I/DATA all read the local memory space
129 * XDATA reads the external memory space
130 * BDATA returns bits as bytes
131 *
132 * NOTE: 0x80 - 0xff (local space) are the Special Function Registers
133 * of the 8051, and some have on-read side-effects.
134 */
135
136 struct whiteheat_dump {
137 __u8 mem_type; /* see WHITEHEAT_DUMP_* above */
138 __u16 addr; /* address, see restrictions above */
139 __u16 length; /* number of bytes to dump, max 63 bytes */
140 };
141
142
143 /*
144 * WHITEHEAT_PURGE
145 */
146 #define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
147 #define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
148
149 struct whiteheat_purge {
150 __u8 port; /* port number (1 to N) */
151 __u8 what; /* bit pattern of what to purge */
152 };
153
154
155 /*
156 * WHITEHEAT_ECHO
157 */
158 struct whiteheat_echo {
159 __u8 port; /* port number (1 to N) */
160 __u8 length; /* length of message to echo, max 61 bytes */
161 __u8 echo_data[61]; /* data to echo */
162 };
163
164
165 /*
166 * WHITEHEAT_DO_TEST
167 */
168 #define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
169 #define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
170 #define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for PORT_CONT/PORT_DISCONT */
171 #define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */
172 #define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */
173 #define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
174 #define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
175 #define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a loopback cable/connector */
176 #define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */
177 #define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */
178 #define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */
179
180 struct whiteheat_test {
181 __u8 port; /* port number (1 to n) */
182 __u8 test; /* see WHITEHEAT_TEST_* above*/
183 __u8 info[32]; /* additional info */
184 };
185
186
187 /*
188 * Replies from the firmware
189 */
190
191
192 /*
193 * WHITEHEAT_STATUS
194 */
195 #define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */
196 #define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */
197 #define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */
198 #define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */
199
200 #define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */
201 #define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS (waiting for CTS to go on) */
202 #define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped by RTS */
203 #define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF received (waiting for XON) */
204 #define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF transmitted */
205 #define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */
206
207 struct whiteheat_status_info {
208 __u8 port; /* port number (1 to N) */
209 __u8 event; /* indicates what the current event is, see WHITEHEAT_EVENT_* above */
210 __u8 modem; /* modem signal status (copy of uart's MSR register) */
211 __u8 error; /* line status (copy of uart's LSR register) */
212 __u8 flow; /* flow control state, see WHITEHEAT_FLOW_* above */
213 __u8 connect; /* 0 means not connected, non-zero means connected */
214 };
215
216
217 /*
218 * WHITEHEAT_GET_DTR_RTS
219 */
220 struct whiteheat_dr_info {
221 __u8 mcr; /* copy of uart's MCR register */
222 };
223
224
225 /*
226 * WHITEHEAT_GET_HW_INFO
227 */
228 struct whiteheat_hw_info {
229 __u8 hw_id; /* hardware id number, WhiteHEAT = 0 */
230 __u8 sw_major_rev; /* major version number */
231 __u8 sw_minor_rev; /* minor version number */
232 struct whiteheat_hw_eeprom_info {
233 __u8 b0; /* B0 */
234 __u8 vendor_id_low; /* vendor id (low byte) */
235 __u8 vendor_id_high; /* vendor id (high byte) */
236 __u8 product_id_low; /* product id (low byte) */
237 __u8 product_id_high; /* product id (high byte) */
238 __u8 device_id_low; /* device id (low byte) */
239 __u8 device_id_high; /* device id (high byte) */
240 __u8 not_used_1;
241 __u8 serial_number_0; /* serial number (low byte) */
242 __u8 serial_number_1; /* serial number */
243 __u8 serial_number_2; /* serial number */
244 __u8 serial_number_3; /* serial number (high byte) */
245 __u8 not_used_2;
246 __u8 not_used_3;
247 __u8 checksum_low; /* checksum (low byte) */
248 __u8 checksum_high; /* checksum (high byte */
249 } hw_eeprom_info; /* EEPROM contents */
250 };
251
252
253 /*
254 * WHITEHEAT_EVENT
255 */
256 struct whiteheat_event_info {
257 __u8 port; /* port number (1 to N) */
258 __u8 event; /* see whiteheat_status_info.event */
259 __u8 info; /* see whiteheat_status_info.modem, .error, .flow, .connect */
260 };
261
262
263 /*
264 * WHITEHEAT_DO_TEST
265 */
266 #define WHITEHEAT_TEST_FAIL 0x00 /* test failed */
267 #define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */
268 #define WHITEHEAT_TEST_PASS 0xff /* test passed */
269
270 struct whiteheat_test_info {
271 __u8 port; /* port number (1 to N) */
272 __u8 test; /* indicates which test this is a response for, see WHITEHEAT_DO_TEST above */
273 __u8 status; /* see WHITEHEAT_TEST_* above */
274 __u8 results[32]; /* test-dependent results */
275 };
276
277
278 #endif
279
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