Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ]
Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * Copyright (C) 2005-2006 by Texas Instruments
  3  *
  4  * The Inventra Controller Driver for Linux is free software; you
  5  * can redistribute it and/or modify it under the terms of the GNU
  6  * General Public License version 2 as published by the Free Software
  7  * Foundation.
  8  */
  9 
 10 #ifndef __MUSB_OMAP243X_H__
 11 #define __MUSB_OMAP243X_H__
 12 
 13 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 14 #include <mach/hardware.h>
 15 #include <mach/usb.h>
 16 
 17 /*
 18  * OMAP2430-specific definitions
 19  */
 20 
 21 #define MENTOR_BASE_OFFSET      0
 22 #if     defined(CONFIG_ARCH_OMAP2430)
 23 #define OMAP_HSOTG_BASE         (OMAP243X_HS_BASE)
 24 #elif   defined(CONFIG_ARCH_OMAP3430)
 25 #define OMAP_HSOTG_BASE         (OMAP34XX_HSUSB_OTG_BASE)
 26 #endif
 27 #define OMAP_HSOTG(offset)      (OMAP_HSOTG_BASE + 0x400 + (offset))
 28 #define OTG_REVISION            OMAP_HSOTG(0x0)
 29 #define OTG_SYSCONFIG           OMAP_HSOTG(0x4)
 30 #       define  MIDLEMODE       12      /* bit position */
 31 #       define  FORCESTDBY              (0 << MIDLEMODE)
 32 #       define  NOSTDBY                 (1 << MIDLEMODE)
 33 #       define  SMARTSTDBY              (2 << MIDLEMODE)
 34 #       define  SIDLEMODE               3       /* bit position */
 35 #       define  FORCEIDLE               (0 << SIDLEMODE)
 36 #       define  NOIDLE                  (1 << SIDLEMODE)
 37 #       define  SMARTIDLE               (2 << SIDLEMODE)
 38 #       define  ENABLEWAKEUP            (1 << 2)
 39 #       define  SOFTRST                 (1 << 1)
 40 #       define  AUTOIDLE                (1 << 0)
 41 #define OTG_SYSSTATUS           OMAP_HSOTG(0x8)
 42 #       define  RESETDONE               (1 << 0)
 43 #define OTG_INTERFSEL           OMAP_HSOTG(0xc)
 44 #       define  EXTCP                   (1 << 2)
 45 #       define  PHYSEL          0       /* bit position */
 46 #       define  UTMI_8BIT               (0 << PHYSEL)
 47 #       define  ULPI_12PIN              (1 << PHYSEL)
 48 #       define  ULPI_8PIN               (2 << PHYSEL)
 49 #define OTG_SIMENABLE           OMAP_HSOTG(0x10)
 50 #       define  TM1                     (1 << 0)
 51 #define OTG_FORCESTDBY          OMAP_HSOTG(0x14)
 52 #       define  ENABLEFORCE             (1 << 0)
 53 
 54 #endif  /* CONFIG_ARCH_OMAP2430 */
 55 
 56 #endif  /* __MUSB_OMAP243X_H__ */
 57 
  This page was automatically generated by the LXR engine.