1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6 * (C) Copyright 2002 Hewlett-Packard Company
7 *
8 * OMAP Bus Glue
9 *
10 * Written by Christopher Hoover <ch@hpl.hp.com>
11 * Based on fragments of previous driver by Russell King et al.
12 *
13 * Modified for OMAP from ohci-sa1111.c by Tony Lindgren <tony@atomide.com>
14 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
15 *
16 * This file is licenced under the GPL.
17 */
18
19 #include <asm/hardware.h>
20 #include <asm/io.h>
21 #include <asm/mach-types.h>
22
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/irqs.h>
26 #include <asm/arch/gpio.h>
27 #include <asm/arch/fpga.h>
28 #include <asm/arch/usb.h>
29
30 #include "ohci-omap.h"
31
32 #ifndef CONFIG_ARCH_OMAP
33 #error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
34 #endif
35
36 extern int usb_disabled(void);
37 extern int ocpi_enable(void);
38
39 /*
40 * OHCI clock initialization for OMAP-1510 and 1610
41 */
42 static int omap_ohci_clock_power(int on)
43 {
44 if (on) {
45 /* for 1510, 48MHz DPLL is set up in usb init */
46
47 if (cpu_is_omap16xx()) {
48 /* Enable OHCI */
49 omap_writel(omap_readl(ULPD_SOFT_REQ) | SOFT_USB_OTG_REQ,
50 ULPD_SOFT_REQ);
51
52 /* USB host clock request if not using OTG */
53 omap_writel(omap_readl(ULPD_SOFT_REQ) | SOFT_USB_REQ,
54 ULPD_SOFT_REQ);
55
56 omap_writel(omap_readl(ULPD_STATUS_REQ) | USB_HOST_DPLL_REQ,
57 ULPD_STATUS_REQ);
58 }
59
60 /* Enable 48MHz clock to USB */
61 omap_writel(omap_readl(ULPD_CLOCK_CTRL) | USB_MCLK_EN,
62 ULPD_CLOCK_CTRL);
63
64 omap_writel(omap_readl(ARM_IDLECT2) | (1 << EN_LBFREECK) | (1 << EN_LBCK),
65 ARM_IDLECT2);
66
67 omap_writel(omap_readl(MOD_CONF_CTRL_0) | USB_HOST_HHC_UHOST_EN,
68 MOD_CONF_CTRL_0);
69 } else {
70 /* Disable 48MHz clock to USB */
71 omap_writel(omap_readl(ULPD_CLOCK_CTRL) & ~USB_MCLK_EN,
72 ULPD_CLOCK_CTRL);
73
74 /* FIXME: The DPLL stays on for now */
75 }
76
77 return 0;
78 }
79
80 /*
81 * Hardware specific transceiver power on/off
82 */
83 static int omap_ohci_transceiver_power(int on)
84 {
85 if (on) {
86 if (machine_is_omap_innovator() && cpu_is_omap1510())
87 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
88 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
89 INNOVATOR_FPGA_CAM_USB_CONTROL);
90 else if (machine_is_omap_osk()) {
91 /* FIXME: GPIO1 -> 1 on the TPS65010 I2C chip */
92 }
93 } else {
94 if (machine_is_omap_innovator() && cpu_is_omap1510())
95 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
96 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
97 INNOVATOR_FPGA_CAM_USB_CONTROL);
98 else if (machine_is_omap_osk()) {
99 /* FIXME: GPIO1 -> 0 on the TPS65010 I2C chip */
100 }
101 }
102
103 return 0;
104 }
105
106 /*
107 * OMAP-1510 specific Local Bus clock on/off
108 */
109 static int omap_1510_local_bus_power(int on)
110 {
111 if (on) {
112 omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
113 udelay(200);
114 } else {
115 omap_writel(0, OMAP1510_LB_MMU_CTL);
116 }
117
118 return 0;
119 }
120
121 /*
122 * OMAP-1510 specific Local Bus initialization
123 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
124 * See also arch/mach-omap/memory.h for __virt_to_dma() and
125 * __dma_to_virt() which need to match with the physical
126 * Local Bus address below.
127 */
128 static int omap_1510_local_bus_init(void)
129 {
130 unsigned int tlb;
131 unsigned long lbaddr, physaddr;
132
133 omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
134 OMAP1510_LB_CLOCK_DIV);
135
136 /* Configure the Local Bus MMU table */
137 for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
138 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
139 physaddr = tlb * 0x00100000 + PHYS_OFFSET;
140 omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
141 omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
142 OMAP1510_LB_MMU_CAM_L);
143 omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
144 omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
145 omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
146 omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
147 }
148
149 /* Enable the walking table */
150 omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
151 udelay(200);
152
153 return 0;
154 }
155
156 #ifdef CONFIG_USB_OTG
157
158 static void start_hnp(struct ohci_hcd *ohci)
159 {
160 const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
161 unsigned long flags;
162
163 otg_start_hnp(ohci->transceiver);
164
165 local_irq_save(flags);
166 ohci->transceiver->state = OTG_STATE_A_SUSPEND;
167 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
168 OTG_CTRL_REG &= ~OTG_A_BUSREQ;
169 local_irq_restore(flags);
170 }
171
172 #endif
173
174 /*-------------------------------------------------------------------------*/
175
176 static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev)
177 {
178 struct omap_usb_config *config = pdev->dev.platform_data;
179 int need_transceiver = (config->otg != 0);
180
181 dev_dbg(&pdev->dev, "starting USB Controller\n");
182
183 if (config->otg) {
184 ohci_to_hcd(ohci)->self.otg_port = config->otg;
185 /* default/minimum OTG power budget: 8 mA */
186 ohci->power_budget = 8;
187 }
188
189 /* boards can use OTG transceivers in non-OTG modes */
190 need_transceiver = need_transceiver
191 || machine_is_omap_h2();
192
193 if (cpu_is_omap16xx())
194 ocpi_enable();
195
196 #ifdef CONFIG_ARCH_OMAP_OTG
197 if (need_transceiver) {
198 ohci->transceiver = otg_get_transceiver();
199 if (ohci->transceiver) {
200 int status = otg_set_host(ohci->transceiver,
201 &ohci_to_hcd(ohci)->self);
202 dev_dbg(&pdev->dev, "init %s transceiver, status %d\n",
203 ohci->transceiver->label, status);
204 if (status) {
205 if (ohci->transceiver)
206 put_device(ohci->transceiver->dev);
207 return status;
208 }
209 } else {
210 dev_err(&pdev->dev, "can't find transceiver\n");
211 return -ENODEV;
212 }
213 }
214 #endif
215
216 if (machine_is_omap_osk()) {
217 omap_request_gpio(9);
218 omap_set_gpio_direction(9, 1);
219 omap_set_gpio_dataout(9, 1);
220 }
221
222 omap_ohci_clock_power(1);
223
224 omap_ohci_transceiver_power(1);
225
226 if (cpu_is_omap1510()) {
227 omap_1510_local_bus_power(1);
228 omap_1510_local_bus_init();
229 }
230
231 /* board init will have already handled HMC and mux setup.
232 * any external transceiver should already be initialized
233 * too, so all configured ports use the right signaling now.
234 */
235
236 return 0;
237 }
238
239 static void omap_stop_hc(struct platform_device *pdev)
240 {
241 dev_dbg(&pdev->dev, "stopping USB Controller\n");
242
243 /*
244 * FIXME: Put the USB host controller into reset.
245 */
246
247 /*
248 * FIXME: Stop the USB clock.
249 */
250 //omap_disable_device(dev);
251
252 }
253
254
255 /*-------------------------------------------------------------------------*/
256
257 void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *);
258
259 /* configure so an HC device and id are always provided */
260 /* always called with process context; sleeping is OK */
261
262
263 /**
264 * usb_hcd_omap_probe - initialize OMAP-based HCDs
265 * Context: !in_interrupt()
266 *
267 * Allocates basic resources for this USB host controller, and
268 * then invokes the start() method for the HCD associated with it
269 * through the hotplug entry's driver_data.
270 */
271 int usb_hcd_omap_probe (const struct hc_driver *driver,
272 struct platform_device *pdev)
273 {
274 int retval;
275 struct usb_hcd *hcd = 0;
276 struct ohci_hcd *ohci;
277
278 if (pdev->num_resources != 2) {
279 printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
280 pdev->num_resources);
281 return -ENODEV;
282 }
283
284 if (pdev->resource[0].flags != IORESOURCE_MEM
285 || pdev->resource[1].flags != IORESOURCE_IRQ) {
286 printk(KERN_ERR "hcd probe: invalid resource type\n");
287 return -ENODEV;
288 }
289
290 if (!request_mem_region(pdev->resource[0].start,
291 pdev->resource[0].end - pdev->resource[0].start + 1, hcd_name)) {
292 dev_dbg(&pdev->dev, "request_mem_region failed\n");
293 return -EBUSY;
294 }
295
296 hcd = usb_create_hcd (driver);
297 if (hcd == NULL){
298 dev_dbg(&pdev->dev, "hcd_alloc failed\n");
299 retval = -ENOMEM;
300 goto err1;
301 }
302 dev_set_drvdata(&pdev->dev, hcd);
303 ohci = hcd_to_ohci(hcd);
304 ohci_hcd_init(ohci);
305
306 hcd->irq = pdev->resource[1].start;
307 hcd->regs = (void *)pdev->resource[0].start;
308 hcd->self.controller = &pdev->dev;
309
310 retval = omap_start_hc(ohci, pdev);
311 if (retval < 0)
312 goto err2;
313
314 retval = hcd_buffer_create (hcd);
315 if (retval != 0) {
316 dev_dbg(&pdev->dev, "pool alloc fail\n");
317 goto err2;
318 }
319
320 retval = request_irq (hcd->irq, usb_hcd_irq,
321 SA_INTERRUPT, hcd->driver->description, hcd);
322 if (retval != 0) {
323 dev_dbg(&pdev->dev, "request_irq failed\n");
324 retval = -EBUSY;
325 goto err3;
326 }
327
328 dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
329
330 hcd->self.bus_name = pdev->dev.bus_id;
331 usb_register_bus (&hcd->self);
332
333 if ((retval = driver->start (hcd)) < 0)
334 {
335 usb_hcd_omap_remove(hcd, pdev);
336 return retval;
337 }
338
339 return 0;
340
341 err3:
342 hcd_buffer_destroy (hcd);
343 err2:
344 dev_set_drvdata(&pdev->dev, NULL);
345 usb_put_hcd(hcd);
346 err1:
347 omap_stop_hc(pdev);
348
349 release_mem_region(pdev->resource[0].start,
350 pdev->resource[0].end - pdev->resource[0].start + 1);
351
352 return retval;
353 }
354
355
356 /* may be called without controller electrically present */
357 /* may be called with controller, bus, and devices active */
358
359 /**
360 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
361 * @dev: USB Host Controller being removed
362 * Context: !in_interrupt()
363 *
364 * Reverses the effect of usb_hcd_omap_probe(), first invoking
365 * the HCD's stop() method. It is always called from a thread
366 * context, normally "rmmod", "apmd", or something similar.
367 *
368 */
369 void usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
370 {
371 dev_info(&pdev->dev, "remove: state %x\n", hcd->state);
372
373 if (in_interrupt ())
374 BUG ();
375
376 hcd->state = USB_STATE_QUIESCING;
377
378 dev_dbg(&pdev->dev, "roothub graceful disconnect\n");
379 usb_disconnect (&hcd->self.root_hub);
380
381 hcd->driver->stop (hcd);
382 hcd_buffer_destroy (hcd);
383 hcd->state = USB_STATE_HALT;
384
385 if (machine_is_omap_osk())
386 omap_free_gpio(9);
387
388 free_irq (hcd->irq, hcd);
389
390 usb_deregister_bus (&hcd->self);
391
392 omap_stop_hc(pdev);
393
394 release_mem_region(pdev->resource[0].start,
395 pdev->resource[0].end - pdev->resource[0].start + 1);
396 }
397
398 /*-------------------------------------------------------------------------*/
399
400 static int __devinit
401 ohci_omap_start (struct usb_hcd *hcd)
402 {
403 struct omap_usb_config *config;
404 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
405 int ret;
406
407 if ((ret = ohci_init(ohci)) < 0)
408 return ret;
409
410 config = hcd->self.controller->platform_data;
411 if (config->otg || config->rwc)
412 writel(OHCI_CTRL_RWC, &ohci->regs->control);
413
414 if ((ret = ohci_run (ohci)) < 0) {
415 err ("can't start %s", hcd->self.bus_name);
416 ohci_stop (hcd);
417 return ret;
418 }
419 return 0;
420 }
421
422 /*-------------------------------------------------------------------------*/
423
424 static const struct hc_driver ohci_omap_hc_driver = {
425 .description = hcd_name,
426 .product_desc = "OMAP OHCI",
427 .hcd_priv_size = sizeof(struct ohci_hcd),
428
429 /*
430 * generic hardware linkage
431 */
432 .irq = ohci_irq,
433 .flags = HCD_USB11,
434
435 /*
436 * basic lifecycle operations
437 */
438 .start = ohci_omap_start,
439 .stop = ohci_stop,
440
441 /*
442 * managing i/o requests and associated device resources
443 */
444 .urb_enqueue = ohci_urb_enqueue,
445 .urb_dequeue = ohci_urb_dequeue,
446 .endpoint_disable = ohci_endpoint_disable,
447
448 /*
449 * scheduling support
450 */
451 .get_frame_number = ohci_get_frame,
452
453 /*
454 * root hub support
455 */
456 .hub_status_data = ohci_hub_status_data,
457 .hub_control = ohci_hub_control,
458 #ifdef CONFIG_USB_SUSPEND
459 .hub_suspend = ohci_hub_suspend,
460 .hub_resume = ohci_hub_resume,
461 #endif
462 .start_port_reset = ohci_start_port_reset,
463 };
464
465 /*-------------------------------------------------------------------------*/
466
467 static int ohci_hcd_omap_drv_probe(struct device *dev)
468 {
469 return usb_hcd_omap_probe(&ohci_omap_hc_driver,
470 to_platform_device(dev));
471 }
472
473 static int ohci_hcd_omap_drv_remove(struct device *dev)
474 {
475 struct platform_device *pdev = to_platform_device(dev);
476 struct usb_hcd *hcd = dev_get_drvdata(dev);
477 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
478
479 usb_hcd_omap_remove(hcd, pdev);
480 if (ohci->transceiver) {
481 (void) otg_set_host(ohci->transceiver, 0);
482 put_device(ohci->transceiver->dev);
483 }
484 dev_set_drvdata(dev, NULL);
485
486 return 0;
487 }
488
489 /*-------------------------------------------------------------------------*/
490
491 #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
492
493 /* states match PCI usage, always suspending the root hub except that
494 * 4 ~= D3cold (ACPI D3) with clock off (resume sees reset).
495 */
496
497 static int ohci_omap_suspend(struct device *dev, u32 state, u32 level)
498 {
499 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev));
500 int status = -EINVAL;
501
502 if (state <= dev->power.power_state)
503 return 0;
504
505 dev_dbg(dev, "suspend to %d\n", state);
506 down(&ohci_to_hcd(ohci)->self.root_hub->serialize);
507 status = ohci_hub_suspend(ohci_to_hcd(ohci));
508 if (status == 0) {
509 if (state >= 4) {
510 /* power off + reset */
511 OTG_SYSCON_2_REG &= ~UHOST_EN;
512 ohci_to_hcd(ohci)->self.root_hub->state =
513 USB_STATE_SUSPENDED;
514 state = 4;
515 }
516 ohci_to_hcd(ohci)->state = HCD_STATE_SUSPENDED;
517 dev->power.power_state = state;
518 }
519 up(&ohci_to_hcd(ohci)->self.root_hub->serialize);
520 return status;
521 }
522
523 static int ohci_omap_resume(struct device *dev, u32 level)
524 {
525 struct ohci_hcd *ohci = hcd_to_ohci(dev_get_drvdata(dev));
526 int status = 0;
527
528 switch (dev->power.power_state) {
529 case 0:
530 break;
531 case 4:
532 if (time_before(jiffies, ohci->next_statechange))
533 msleep(5);
534 ohci->next_statechange = jiffies;
535 OTG_SYSCON_2_REG |= UHOST_EN;
536 /* FALLTHROUGH */
537 default:
538 dev_dbg(dev, "resume from %d\n", dev->power.power_state);
539 #ifdef CONFIG_USB_SUSPEND
540 /* get extra cleanup even if remote wakeup isn't in use */
541 status = usb_resume_device(ohci_to_hcd(ohci)->self.root_hub);
542 #else
543 down(&ohci_to_hcd(ohci)->self.root_hub->serialize);
544 status = ohci_hub_resume(ohci_to_hcd(ohci));
545 up(&ohci_to_hcd(ohci)->self.root_hub->serialize);
546 #endif
547 if (status == 0)
548 dev->power.power_state = 0;
549 break;
550 }
551 return status;
552 }
553
554 #endif
555
556 /*-------------------------------------------------------------------------*/
557
558 /*
559 * Driver definition to register with the OMAP bus
560 */
561 static struct device_driver ohci_hcd_omap_driver = {
562 .name = "ohci",
563 .bus = &platform_bus_type,
564 .probe = ohci_hcd_omap_drv_probe,
565 .remove = ohci_hcd_omap_drv_remove,
566 #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
567 .suspend = ohci_omap_suspend,
568 .resume = ohci_omap_resume,
569 #endif
570 };
571
572 static int __init ohci_hcd_omap_init (void)
573 {
574 printk (KERN_DEBUG "%s: " DRIVER_INFO " (OMAP)\n", hcd_name);
575 if (usb_disabled())
576 return -ENODEV;
577
578 pr_debug("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
579 sizeof (struct ed), sizeof (struct td));
580
581 return driver_register(&ohci_hcd_omap_driver);
582 }
583
584 static void __exit ohci_hcd_omap_cleanup (void)
585 {
586 driver_unregister(&ohci_hcd_omap_driver);
587 }
588
589 module_init (ohci_hcd_omap_init);
590 module_exit (ohci_hcd_omap_cleanup);
591
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