1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
17 *
18 * History:
19 *
20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
22 * 2003/02/24 show registers in sysfs (Kevin Brosius)
23 *
24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
25 * bandwidth accounting; if debugging, show schedules in driverfs
26 * 2002/07/19 fixes to management of ED and schedule state.
27 * 2002/06/09 SA-1111 support (Christopher Hoover)
28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
29 * to fix urb unlink races caused by interrupt latency assumptions;
30 * minor ED field and function naming updates
31 * 2002/01/18 package as a patch for 2.5.3; this should match the
32 * 2.4.17 kernel modulo some bugs being fixed.
33 *
34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
35 * from post-2.4.5 patches.
36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
39 * pbook pci quirks gone (please fix pbook pci sw!) (db)
40 *
41 * 2001/04/08 Identify version on module load (gb)
42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
43 pci_map_single (db)
44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
46 *
47 * 2000/09/26 fixed races in removing the private portion of the urb
48 * 2000/09/07 disable bulk and control lists when unlinking the last
49 * endpoint descriptor in order to avoid unrecoverable errors on
50 * the Lucent chips. (rwc@sgi)
51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
52 * urb unlink probs, indentation fixes
53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
54 * device unplugs.
55 * 2000/06/28 use PCI hotplug framework, for better power management
56 * and for Cardbus support (David Brownell)
57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
58 * when the controller loses power; handle UE; cleanup; ...
59 *
60 * v5.2 1999/12/07 URB 3rd preview,
61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
63 * i386: HUB, Keyboard, Mouse, Printer
64 *
65 * v4.3 1999/10/27 multiple HCs, bulk_request
66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
68 * v4.0 1999/08/18
69 * v3.0 1999/06/25
70 * v2.1 1999/05/09 code clean up
71 * v2.0 1999/05/04
72 * v1.0 1999/04/27 initial release
73 *
74 * This file is licenced under the GPL.
75 */
76
77 #include <linux/config.h>
78
79 #ifdef CONFIG_USB_DEBUG
80 # define DEBUG
81 #else
82 # undef DEBUG
83 #endif
84
85 #include <linux/module.h>
86 #include <linux/moduleparam.h>
87 #include <linux/pci.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/ioport.h>
91 #include <linux/sched.h>
92 #include <linux/slab.h>
93 #include <linux/smp_lock.h>
94 #include <linux/errno.h>
95 #include <linux/init.h>
96 #include <linux/timer.h>
97 #include <linux/list.h>
98 #include <linux/interrupt.h> /* for in_interrupt () */
99 #include <linux/usb.h>
100 #include <linux/usb_otg.h>
101 #include "../core/hcd.h"
102 #include <linux/dma-mapping.h>
103 #include <linux/dmapool.h> /* needed by ohci-mem.c when no PCI */
104
105 #include <asm/io.h>
106 #include <asm/irq.h>
107 #include <asm/system.h>
108 #include <asm/unaligned.h>
109 #include <asm/byteorder.h>
110
111
112 #define DRIVER_VERSION "2004 Nov 08"
113 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
114 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
115
116 /*-------------------------------------------------------------------------*/
117
118 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
119
120 /* For initializing controller (mask in an HCFS mode too) */
121 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
122 #define OHCI_INTR_INIT \
123 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
124
125 #ifdef __hppa__
126 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
127 #define IR_DISABLE
128 #endif
129
130 #ifdef CONFIG_ARCH_OMAP
131 /* OMAP doesn't support IR (no SMM; not needed) */
132 #define IR_DISABLE
133 #endif
134
135 /*-------------------------------------------------------------------------*/
136
137 static const char hcd_name [] = "ohci_hcd";
138
139 #include "ohci.h"
140
141 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
142 static int ohci_init (struct ohci_hcd *ohci);
143 static void ohci_stop (struct usb_hcd *hcd);
144
145 #include "ohci-hub.c"
146 #include "ohci-dbg.c"
147 #include "ohci-mem.c"
148 #include "ohci-q.c"
149
150
151 /* Some boards don't support per-port power switching */
152 static int power_switching = 0;
153 module_param (power_switching, bool, 0);
154 MODULE_PARM_DESC (power_switching, "true (not default) to switch port power");
155
156 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
157 static int no_handshake = 0;
158 module_param (no_handshake, bool, 0);
159 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
160
161 /*-------------------------------------------------------------------------*/
162
163 /*
164 * queue up an urb for anything except the root hub
165 */
166 static int ohci_urb_enqueue (
167 struct usb_hcd *hcd,
168 struct usb_host_endpoint *ep,
169 struct urb *urb,
170 int mem_flags
171 ) {
172 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
173 struct ed *ed;
174 urb_priv_t *urb_priv;
175 unsigned int pipe = urb->pipe;
176 int i, size = 0;
177 unsigned long flags;
178 int retval = 0;
179
180 #ifdef OHCI_VERBOSE_DEBUG
181 urb_print (urb, "SUB", usb_pipein (pipe));
182 #endif
183
184 /* every endpoint has a ed, locate and maybe (re)initialize it */
185 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
186 return -ENOMEM;
187
188 /* for the private part of the URB we need the number of TDs (size) */
189 switch (ed->type) {
190 case PIPE_CONTROL:
191 /* td_submit_urb() doesn't yet handle these */
192 if (urb->transfer_buffer_length > 4096)
193 return -EMSGSIZE;
194
195 /* 1 TD for setup, 1 for ACK, plus ... */
196 size = 2;
197 /* FALLTHROUGH */
198 // case PIPE_INTERRUPT:
199 // case PIPE_BULK:
200 default:
201 /* one TD for every 4096 Bytes (can be upto 8K) */
202 size += urb->transfer_buffer_length / 4096;
203 /* ... and for any remaining bytes ... */
204 if ((urb->transfer_buffer_length % 4096) != 0)
205 size++;
206 /* ... and maybe a zero length packet to wrap it up */
207 if (size == 0)
208 size++;
209 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
210 && (urb->transfer_buffer_length
211 % usb_maxpacket (urb->dev, pipe,
212 usb_pipeout (pipe))) == 0)
213 size++;
214 break;
215 case PIPE_ISOCHRONOUS: /* number of packets from URB */
216 size = urb->number_of_packets;
217 break;
218 }
219
220 /* allocate the private part of the URB */
221 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
222 mem_flags);
223 if (!urb_priv)
224 return -ENOMEM;
225 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
226 INIT_LIST_HEAD (&urb_priv->pending);
227 urb_priv->length = size;
228 urb_priv->ed = ed;
229
230 /* allocate the TDs (deferring hash chain updates) */
231 for (i = 0; i < size; i++) {
232 urb_priv->td [i] = td_alloc (ohci, mem_flags);
233 if (!urb_priv->td [i]) {
234 urb_priv->length = i;
235 urb_free_priv (ohci, urb_priv);
236 return -ENOMEM;
237 }
238 }
239
240 spin_lock_irqsave (&ohci->lock, flags);
241
242 /* don't submit to a dead HC */
243 if (!HCD_IS_RUNNING(hcd->state)) {
244 retval = -ENODEV;
245 goto fail;
246 }
247
248 /* in case of unlink-during-submit */
249 spin_lock (&urb->lock);
250 if (urb->status != -EINPROGRESS) {
251 spin_unlock (&urb->lock);
252 urb->hcpriv = urb_priv;
253 finish_urb (ohci, urb, NULL);
254 retval = 0;
255 goto fail;
256 }
257
258 /* schedule the ed if needed */
259 if (ed->state == ED_IDLE) {
260 retval = ed_schedule (ohci, ed);
261 if (retval < 0)
262 goto fail0;
263 if (ed->type == PIPE_ISOCHRONOUS) {
264 u16 frame = ohci_frame_no(ohci);
265
266 /* delay a few frames before the first TD */
267 frame += max_t (u16, 8, ed->interval);
268 frame &= ~(ed->interval - 1);
269 frame |= ed->branch;
270 urb->start_frame = frame;
271
272 /* yes, only URB_ISO_ASAP is supported, and
273 * urb->start_frame is never used as input.
274 */
275 }
276 } else if (ed->type == PIPE_ISOCHRONOUS)
277 urb->start_frame = ed->last_iso + ed->interval;
278
279 /* fill the TDs and link them to the ed; and
280 * enable that part of the schedule, if needed
281 * and update count of queued periodic urbs
282 */
283 urb->hcpriv = urb_priv;
284 td_submit_urb (ohci, urb);
285
286 fail0:
287 spin_unlock (&urb->lock);
288 fail:
289 if (retval)
290 urb_free_priv (ohci, urb_priv);
291 spin_unlock_irqrestore (&ohci->lock, flags);
292 return retval;
293 }
294
295 /*
296 * decouple the URB from the HC queues (TDs, urb_priv); it's
297 * already marked using urb->status. reporting is always done
298 * asynchronously, and we might be dealing with an urb that's
299 * partially transferred, or an ED with other urbs being unlinked.
300 */
301 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
302 {
303 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
304 unsigned long flags;
305
306 #ifdef OHCI_VERBOSE_DEBUG
307 urb_print (urb, "UNLINK", 1);
308 #endif
309
310 spin_lock_irqsave (&ohci->lock, flags);
311 if (HCD_IS_RUNNING(hcd->state)) {
312 urb_priv_t *urb_priv;
313
314 /* Unless an IRQ completed the unlink while it was being
315 * handed to us, flag it for unlink and giveback, and force
316 * some upcoming INTR_SF to call finish_unlinks()
317 */
318 urb_priv = urb->hcpriv;
319 if (urb_priv) {
320 if (urb_priv->ed->state == ED_OPER)
321 start_ed_unlink (ohci, urb_priv->ed);
322 }
323 } else {
324 /*
325 * with HC dead, we won't respect hc queue pointers
326 * any more ... just clean up every urb's memory.
327 */
328 if (urb->hcpriv)
329 finish_urb (ohci, urb, NULL);
330 }
331 spin_unlock_irqrestore (&ohci->lock, flags);
332 return 0;
333 }
334
335 /*-------------------------------------------------------------------------*/
336
337 /* frees config/altsetting state for endpoints,
338 * including ED memory, dummy TD, and bulk/intr data toggle
339 */
340
341 static void
342 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
343 {
344 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
345 unsigned long flags;
346 struct ed *ed = ep->hcpriv;
347 unsigned limit = 1000;
348
349 /* ASSERT: any requests/urbs are being unlinked */
350 /* ASSERT: nobody can be submitting urbs for this any more */
351
352 if (!ed)
353 return;
354
355 rescan:
356 spin_lock_irqsave (&ohci->lock, flags);
357
358 if (!HCD_IS_RUNNING (hcd->state)) {
359 sanitize:
360 ed->state = ED_IDLE;
361 finish_unlinks (ohci, 0, NULL);
362 }
363
364 switch (ed->state) {
365 case ED_UNLINK: /* wait for hw to finish? */
366 /* major IRQ delivery trouble loses INTR_SF too... */
367 if (limit-- == 0) {
368 ohci_warn (ohci, "IRQ INTR_SF lossage\n");
369 goto sanitize;
370 }
371 spin_unlock_irqrestore (&ohci->lock, flags);
372 set_current_state (TASK_UNINTERRUPTIBLE);
373 schedule_timeout (1);
374 goto rescan;
375 case ED_IDLE: /* fully unlinked */
376 if (list_empty (&ed->td_list)) {
377 td_free (ohci, ed->dummy);
378 ed_free (ohci, ed);
379 break;
380 }
381 /* else FALL THROUGH */
382 default:
383 /* caller was supposed to have unlinked any requests;
384 * that's not our job. can't recover; must leak ed.
385 */
386 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
387 ed, ep->desc.bEndpointAddress, ed->state,
388 list_empty (&ed->td_list) ? "" : " (has tds)");
389 td_free (ohci, ed->dummy);
390 break;
391 }
392 ep->hcpriv = NULL;
393 spin_unlock_irqrestore (&ohci->lock, flags);
394 return;
395 }
396
397 static int ohci_get_frame (struct usb_hcd *hcd)
398 {
399 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
400
401 return ohci_frame_no(ohci);
402 }
403
404 static void ohci_usb_reset (struct ohci_hcd *ohci)
405 {
406 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
407 ohci->hc_control &= OHCI_CTRL_RWC;
408 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
409 }
410
411 /*-------------------------------------------------------------------------*
412 * HC functions
413 *-------------------------------------------------------------------------*/
414
415 /* init memory, and kick BIOS/SMM off */
416
417 static int ohci_init (struct ohci_hcd *ohci)
418 {
419 int ret;
420
421 disable (ohci);
422 ohci->regs = ohci_to_hcd(ohci)->regs;
423 ohci->next_statechange = jiffies;
424
425 #ifndef IR_DISABLE
426 /* SMM owns the HC? not for long! */
427 if (!no_handshake && ohci_readl (ohci,
428 &ohci->regs->control) & OHCI_CTRL_IR) {
429 u32 temp;
430
431 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
432
433 /* this timeout is arbitrary. we make it long, so systems
434 * depending on usb keyboards may be usable even if the
435 * BIOS/SMM code seems pretty broken.
436 */
437 temp = 500; /* arbitrary: five seconds */
438
439 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
440 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
441 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
442 msleep (10);
443 if (--temp == 0) {
444 ohci_err (ohci, "USB HC takeover failed!"
445 " (BIOS/SMM bug)\n");
446 return -EBUSY;
447 }
448 }
449 ohci_usb_reset (ohci);
450 }
451 #endif
452
453 /* Disable HC interrupts */
454 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
455 // flush the writes
456 (void) ohci_readl (ohci, &ohci->regs->control);
457
458 if (ohci->hcca)
459 return 0;
460
461 ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
462 sizeof *ohci->hcca, &ohci->hcca_dma, 0);
463 if (!ohci->hcca)
464 return -ENOMEM;
465
466 if ((ret = ohci_mem_init (ohci)) < 0)
467 ohci_stop (ohci_to_hcd(ohci));
468
469 return ret;
470
471 }
472
473 /*-------------------------------------------------------------------------*/
474
475 /* Start an OHCI controller, set the BUS operational
476 * resets USB and controller
477 * enable interrupts
478 * connect the virtual root hub
479 */
480 static int ohci_run (struct ohci_hcd *ohci)
481 {
482 u32 mask, temp;
483 struct usb_device *udev;
484 struct usb_bus *bus;
485 int first = ohci->fminterval == 0;
486
487 disable (ohci);
488
489 /* boot firmware should have set this up (5.1.1.3.1) */
490 if (first) {
491
492 temp = ohci_readl (ohci, &ohci->regs->fminterval);
493 ohci->fminterval = temp & 0x3fff;
494 if (ohci->fminterval != FI)
495 ohci_dbg (ohci, "fminterval delta %d\n",
496 ohci->fminterval - FI);
497 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
498 /* also: power/overcurrent flags in roothub.a */
499 }
500
501 /* Reset USB nearly "by the book". RemoteWakeupConnected
502 * saved if boot firmware (BIOS/SMM/...) told us it's connected
503 * (for OHCI integrated on mainboard, it normally is)
504 */
505 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
506 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
507 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
508 ohci->hc_control);
509
510 if (ohci->hc_control & OHCI_CTRL_RWC
511 && !(ohci->flags & OHCI_QUIRK_AMD756))
512 ohci_to_hcd(ohci)->can_wakeup = 1;
513
514 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
515 case OHCI_USB_OPER:
516 temp = 0;
517 break;
518 case OHCI_USB_SUSPEND:
519 case OHCI_USB_RESUME:
520 ohci->hc_control &= OHCI_CTRL_RWC;
521 ohci->hc_control |= OHCI_USB_RESUME;
522 temp = 10 /* msec wait */;
523 break;
524 // case OHCI_USB_RESET:
525 default:
526 ohci->hc_control &= OHCI_CTRL_RWC;
527 ohci->hc_control |= OHCI_USB_RESET;
528 temp = 50 /* msec wait */;
529 break;
530 }
531 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
532 // flush the writes
533 (void) ohci_readl (ohci, &ohci->regs->control);
534 msleep(temp);
535 if (power_switching) {
536 unsigned ports = roothub_a (ohci) & RH_A_NDP;
537
538 /* power down each port */
539 for (temp = 0; temp < ports; temp++)
540 ohci_writel (ohci, RH_PS_LSDA,
541 &ohci->regs->roothub.portstatus [temp]);
542 }
543 // flush those writes
544 (void) ohci_readl (ohci, &ohci->regs->control);
545 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
546
547 /* 2msec timelimit here means no irqs/preempt */
548 spin_lock_irq (&ohci->lock);
549
550 retry:
551 /* HC Reset requires max 10 us delay */
552 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
553 temp = 30; /* ... allow extra time */
554 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
555 if (--temp == 0) {
556 spin_unlock_irq (&ohci->lock);
557 ohci_err (ohci, "USB HC reset timed out!\n");
558 return -1;
559 }
560 udelay (1);
561 }
562
563 /* now we're in the SUSPEND state ... must go OPERATIONAL
564 * within 2msec else HC enters RESUME
565 *
566 * ... but some hardware won't init fmInterval "by the book"
567 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
568 * this if we write fmInterval after we're OPERATIONAL.
569 * Unclear about ALi, ServerWorks, and others ... this could
570 * easily be a longstanding bug in chip init on Linux.
571 */
572 if (ohci->flags & OHCI_QUIRK_INITRESET) {
573 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
574 // flush those writes
575 (void) ohci_readl (ohci, &ohci->regs->control);
576 }
577 ohci_writel (ohci, ohci->fminterval, &ohci->regs->fminterval);
578
579 /* Tell the controller where the control and bulk lists are
580 * The lists are empty now. */
581 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
582 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
583
584 /* a reset clears this */
585 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
586
587 periodic_reinit (ohci);
588
589 /* some OHCI implementations are finicky about how they init.
590 * bogus values here mean not even enumeration could work.
591 */
592 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
593 || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
594 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
595 ohci->flags |= OHCI_QUIRK_INITRESET;
596 ohci_dbg (ohci, "enabling initreset quirk\n");
597 goto retry;
598 }
599 spin_unlock_irq (&ohci->lock);
600 ohci_err (ohci, "init err (%08x %04x)\n",
601 ohci_readl (ohci, &ohci->regs->fminterval),
602 ohci_readl (ohci, &ohci->regs->periodicstart));
603 return -EOVERFLOW;
604 }
605
606 /* start controller operations */
607 ohci->hc_control &= OHCI_CTRL_RWC;
608 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
609 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
610 ohci_to_hcd(ohci)->state = USB_STATE_RUNNING;
611
612 /* wake on ConnectStatusChange, matching external hubs */
613 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
614
615 /* Choose the interrupts we care about now, others later on demand */
616 mask = OHCI_INTR_INIT;
617 ohci_writel (ohci, mask, &ohci->regs->intrstatus);
618 ohci_writel (ohci, mask, &ohci->regs->intrenable);
619
620 /* handle root hub init quirks ... */
621 temp = roothub_a (ohci);
622 temp &= ~(RH_A_PSM | RH_A_OCPM);
623 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
624 /* NSC 87560 and maybe others */
625 temp |= RH_A_NOCP;
626 temp &= ~(RH_A_POTPGT | RH_A_NPS);
627 } else if (power_switching) {
628 /* act like most external hubs: use per-port power
629 * switching and overcurrent reporting.
630 */
631 temp &= ~(RH_A_NPS | RH_A_NOCP);
632 temp |= RH_A_PSM | RH_A_OCPM;
633 } else {
634 /* hub power always on; required for AMD-756 and some
635 * Mac platforms. ganged overcurrent reporting, if any.
636 */
637 temp |= RH_A_NPS;
638 }
639 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
640 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
641 ohci_writel (ohci, power_switching ? RH_B_PPCM : 0,
642 &ohci->regs->roothub.b);
643 // flush those writes
644 (void) ohci_readl (ohci, &ohci->regs->control);
645
646 spin_unlock_irq (&ohci->lock);
647
648 // POTPGT delay is bits 24-31, in 2 ms units.
649 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
650 bus = &ohci_to_hcd(ohci)->self;
651 ohci_to_hcd(ohci)->state = USB_STATE_RUNNING;
652
653 ohci_dump (ohci, 1);
654
655 udev = bus->root_hub;
656 if (udev) {
657 return 0;
658 }
659
660 /* connect the virtual root hub */
661 udev = usb_alloc_dev (NULL, bus, 0);
662 if (!udev) {
663 disable (ohci);
664 ohci->hc_control &= ~OHCI_CTRL_HCFS;
665 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
666 return -ENOMEM;
667 }
668
669 udev->speed = USB_SPEED_FULL;
670 if (hcd_register_root (udev, ohci_to_hcd(ohci)) != 0) {
671 usb_put_dev (udev);
672 disable (ohci);
673 ohci->hc_control &= ~OHCI_CTRL_HCFS;
674 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
675 return -ENODEV;
676 }
677 if (ohci->power_budget)
678 hub_set_power_budget(udev, ohci->power_budget);
679
680 create_debug_files (ohci);
681 return 0;
682 }
683
684 /*-------------------------------------------------------------------------*/
685
686 /* an interrupt happens */
687
688 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
689 {
690 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
691 struct ohci_regs __iomem *regs = ohci->regs;
692 int ints;
693
694 /* we can eliminate a (slow) ohci_readl()
695 if _only_ WDH caused this irq */
696 if ((ohci->hcca->done_head != 0)
697 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
698 & 0x01)) {
699 ints = OHCI_INTR_WDH;
700
701 /* cardbus/... hardware gone before remove() */
702 } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) {
703 disable (ohci);
704 ohci_dbg (ohci, "device removed!\n");
705 return IRQ_HANDLED;
706
707 /* interrupt for some other device? */
708 } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) {
709 return IRQ_NONE;
710 }
711
712 if (ints & OHCI_INTR_UE) {
713 disable (ohci);
714 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
715 // e.g. due to PCI Master/Target Abort
716
717 ohci_dump (ohci, 1);
718 ohci_usb_reset (ohci);
719 }
720
721 if (ints & OHCI_INTR_RD) {
722 ohci_vdbg (ohci, "resume detect\n");
723 schedule_work(&ohci->rh_resume);
724 }
725
726 if (ints & OHCI_INTR_WDH) {
727 if (HCD_IS_RUNNING(hcd->state))
728 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable);
729 spin_lock (&ohci->lock);
730 dl_done_list (ohci, ptregs);
731 spin_unlock (&ohci->lock);
732 if (HCD_IS_RUNNING(hcd->state))
733 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable);
734 }
735
736 /* could track INTR_SO to reduce available PCI/... bandwidth */
737
738 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
739 * when there's still unlinking to be done (next frame).
740 */
741 spin_lock (&ohci->lock);
742 if (ohci->ed_rm_list)
743 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
744 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
745 && HCD_IS_RUNNING(hcd->state))
746 ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable);
747 spin_unlock (&ohci->lock);
748
749 if (HCD_IS_RUNNING(hcd->state)) {
750 ohci_writel (ohci, ints, ®s->intrstatus);
751 ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable);
752 // flush those writes
753 (void) ohci_readl (ohci, &ohci->regs->control);
754 }
755
756 return IRQ_HANDLED;
757 }
758
759 /*-------------------------------------------------------------------------*/
760
761 static void ohci_stop (struct usb_hcd *hcd)
762 {
763 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
764
765 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
766 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
767 hcd->state);
768 ohci_dump (ohci, 1);
769
770 flush_scheduled_work();
771
772 ohci_usb_reset (ohci);
773 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
774
775 remove_debug_files (ohci);
776 ohci_mem_cleanup (ohci);
777 if (ohci->hcca) {
778 dma_free_coherent (hcd->self.controller,
779 sizeof *ohci->hcca,
780 ohci->hcca, ohci->hcca_dma);
781 ohci->hcca = NULL;
782 ohci->hcca_dma = 0;
783 }
784 }
785
786 /*-------------------------------------------------------------------------*/
787
788 /* must not be called from interrupt context */
789
790 #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
791
792 static int ohci_restart (struct ohci_hcd *ohci)
793 {
794 int temp;
795 int i;
796 struct urb_priv *priv;
797 struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub;
798
799 /* mark any devices gone, so they do nothing till khubd disconnects.
800 * recycle any "live" eds/tds (and urbs) right away.
801 * later, khubd disconnect processing will recycle the other state,
802 * (either as disconnect/reconnect, or maybe someday as a reset).
803 */
804 spin_lock_irq(&ohci->lock);
805 disable (ohci);
806 for (i = 0; i < root->maxchild; i++) {
807 if (root->children [i])
808 usb_set_device_state (root->children[i],
809 USB_STATE_NOTATTACHED);
810 }
811 if (!list_empty (&ohci->pending))
812 ohci_dbg(ohci, "abort schedule...\n");
813 list_for_each_entry (priv, &ohci->pending, pending) {
814 struct urb *urb = priv->td[0]->urb;
815 struct ed *ed = priv->ed;
816
817 switch (ed->state) {
818 case ED_OPER:
819 ed->state = ED_UNLINK;
820 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
821 ed_deschedule (ohci, ed);
822
823 ed->ed_next = ohci->ed_rm_list;
824 ed->ed_prev = NULL;
825 ohci->ed_rm_list = ed;
826 /* FALLTHROUGH */
827 case ED_UNLINK:
828 break;
829 default:
830 ohci_dbg(ohci, "bogus ed %p state %d\n",
831 ed, ed->state);
832 }
833
834 spin_lock (&urb->lock);
835 urb->status = -ESHUTDOWN;
836 spin_unlock (&urb->lock);
837 }
838 finish_unlinks (ohci, 0, NULL);
839 spin_unlock_irq(&ohci->lock);
840
841 /* paranoia, in case that didn't work: */
842
843 /* empty the interrupt branches */
844 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
845 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
846
847 /* no EDs to remove */
848 ohci->ed_rm_list = NULL;
849
850 /* empty control and bulk lists */
851 ohci->ed_controltail = NULL;
852 ohci->ed_bulktail = NULL;
853
854 if ((temp = ohci_run (ohci)) < 0) {
855 ohci_err (ohci, "can't restart, %d\n", temp);
856 return temp;
857 } else {
858 /* here we "know" root ports should always stay powered,
859 * and that if we try to turn them back on the root hub
860 * will respond to CSC processing.
861 */
862 i = roothub_a (ohci) & RH_A_NDP;
863 while (i--)
864 ohci_writel (ohci, RH_PS_PSS,
865 &ohci->regs->roothub.portstatus [temp]);
866 ohci_dbg (ohci, "restart complete\n");
867 }
868 return 0;
869 }
870 #endif
871
872 /*-------------------------------------------------------------------------*/
873
874 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
875
876 MODULE_AUTHOR (DRIVER_AUTHOR);
877 MODULE_DESCRIPTION (DRIVER_INFO);
878 MODULE_LICENSE ("GPL");
879
880 #ifdef CONFIG_PCI
881 #include "ohci-pci.c"
882 #endif
883
884 #ifdef CONFIG_SA1111
885 #include "ohci-sa1111.c"
886 #endif
887
888 #ifdef CONFIG_ARCH_OMAP
889 #include "ohci-omap.c"
890 #endif
891
892 #ifdef CONFIG_ARCH_LH7A404
893 #include "ohci-lh7a404.c"
894 #endif
895
896 #ifdef CONFIG_PXA27x
897 #include "ohci-pxa27x.c"
898 #endif
899
900 #ifdef CONFIG_SOC_AU1X00
901 #include "ohci-au1xxx.c"
902 #endif
903
904 #if !(defined(CONFIG_PCI) \
905 || defined(CONFIG_SA1111) \
906 || defined(CONFIG_ARCH_OMAP) \
907 || defined (CONFIG_ARCH_LH7A404) \
908 || defined (CONFIG_PXA27x) \
909 || defined (CONFIG_SOC_AU1X00) \
910 )
911 #error "missing bus glue for ohci-hcd"
912 #endif
913
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