1 /*
2 * Copyright (C) 2001-2004 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* this file is part of ehci-hcd.c */
20
21 /*-------------------------------------------------------------------------*/
22
23 /*
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
25 *
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
30 *
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
34 *
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
39 */
40
41 /*-------------------------------------------------------------------------*/
42
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
44
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
48 {
49 int i, count;
50 u64 addr = buf;
51
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
61
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
73 }
74
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
78 }
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
81
82 return count;
83 }
84
85 /*-------------------------------------------------------------------------*/
86
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
89 {
90 /* writes to an active overlay are unsafe */
91 BUG_ON(qh->qh_state != QH_STATE_IDLE);
92
93 qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
94 qh->hw_alt_next = EHCI_LIST_END(ehci);
95
96 /* Except for control endpoints, we make hardware maintain data
97 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
98 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
99 * ever clear it.
100 */
101 if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
102 unsigned is_out, epnum;
103
104 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
105 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
106 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
107 qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
108 usb_settoggle (qh->dev, epnum, is_out, 1);
109 }
110 }
111
112 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
113 wmb ();
114 qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
115 }
116
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
120 */
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
123 {
124 struct ehci_qtd *qtd;
125
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /* first qtd may already be partially processed */
132 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
133 qtd = NULL;
134 }
135
136 if (qtd)
137 qh_update (ehci, qh, qtd);
138 }
139
140 /*-------------------------------------------------------------------------*/
141
142 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
143
144 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
145 struct usb_host_endpoint *ep)
146 {
147 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
148 struct ehci_qh *qh = ep->hcpriv;
149 unsigned long flags;
150
151 spin_lock_irqsave(&ehci->lock, flags);
152 qh->clearing_tt = 0;
153 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
154 && HC_IS_RUNNING(hcd->state))
155 qh_link_async(ehci, qh);
156 spin_unlock_irqrestore(&ehci->lock, flags);
157 }
158
159 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
160 struct urb *urb, u32 token)
161 {
162
163 /* If an async split transaction gets an error or is unlinked,
164 * the TT buffer may be left in an indeterminate state. We
165 * have to clear the TT buffer.
166 *
167 * Note: this routine is never called for Isochronous transfers.
168 */
169 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
170 #ifdef DEBUG
171 struct usb_device *tt = urb->dev->tt->hub;
172 dev_dbg(&tt->dev,
173 "clear tt buffer port %d, a%d ep%d t%08x\n",
174 urb->dev->ttport, urb->dev->devnum,
175 usb_pipeendpoint(urb->pipe), token);
176 #endif /* DEBUG */
177 if (!ehci_is_TDI(ehci)
178 || urb->dev->tt->hub !=
179 ehci_to_hcd(ehci)->self.root_hub) {
180 if (usb_hub_clear_tt_buffer(urb) == 0)
181 qh->clearing_tt = 1;
182 } else {
183
184 /* REVISIT ARC-derived cores don't clear the root
185 * hub TT buffer in this way...
186 */
187 }
188 }
189 }
190
191 static int qtd_copy_status (
192 struct ehci_hcd *ehci,
193 struct urb *urb,
194 size_t length,
195 u32 token
196 )
197 {
198 int status = -EINPROGRESS;
199
200 /* count IN/OUT bytes, not SETUP (even short packets) */
201 if (likely (QTD_PID (token) != 2))
202 urb->actual_length += length - QTD_LENGTH (token);
203
204 /* don't modify error codes */
205 if (unlikely(urb->unlinked))
206 return status;
207
208 /* force cleanup after short read; not always an error */
209 if (unlikely (IS_SHORT_READ (token)))
210 status = -EREMOTEIO;
211
212 /* serious "can't proceed" faults reported by the hardware */
213 if (token & QTD_STS_HALT) {
214 if (token & QTD_STS_BABBLE) {
215 /* FIXME "must" disable babbling device's port too */
216 status = -EOVERFLOW;
217 /* CERR nonzero + halt --> stall */
218 } else if (QTD_CERR(token)) {
219 status = -EPIPE;
220
221 /* In theory, more than one of the following bits can be set
222 * since they are sticky and the transaction is retried.
223 * Which to test first is rather arbitrary.
224 */
225 } else if (token & QTD_STS_MMF) {
226 /* fs/ls interrupt xfer missed the complete-split */
227 status = -EPROTO;
228 } else if (token & QTD_STS_DBE) {
229 status = (QTD_PID (token) == 1) /* IN ? */
230 ? -ENOSR /* hc couldn't read data */
231 : -ECOMM; /* hc couldn't write data */
232 } else if (token & QTD_STS_XACT) {
233 /* timeout, bad CRC, wrong PID, etc */
234 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
235 urb->dev->devpath,
236 usb_pipeendpoint(urb->pipe),
237 usb_pipein(urb->pipe) ? "in" : "out");
238 status = -EPROTO;
239 } else { /* unknown */
240 status = -EPROTO;
241 }
242
243 ehci_vdbg (ehci,
244 "dev%d ep%d%s qtd token %08x --> status %d\n",
245 usb_pipedevice (urb->pipe),
246 usb_pipeendpoint (urb->pipe),
247 usb_pipein (urb->pipe) ? "in" : "out",
248 token, status);
249 }
250
251 return status;
252 }
253
254 static void
255 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
256 __releases(ehci->lock)
257 __acquires(ehci->lock)
258 {
259 if (likely (urb->hcpriv != NULL)) {
260 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
261
262 /* S-mask in a QH means it's an interrupt urb */
263 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
264
265 /* ... update hc-wide periodic stats (for usbfs) */
266 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
267 }
268 qh_put (qh);
269 }
270
271 if (unlikely(urb->unlinked)) {
272 COUNT(ehci->stats.unlink);
273 } else {
274 /* report non-error and short read status as zero */
275 if (status == -EINPROGRESS || status == -EREMOTEIO)
276 status = 0;
277 COUNT(ehci->stats.complete);
278 }
279
280 #ifdef EHCI_URB_TRACE
281 ehci_dbg (ehci,
282 "%s %s urb %p ep%d%s status %d len %d/%d\n",
283 __func__, urb->dev->devpath, urb,
284 usb_pipeendpoint (urb->pipe),
285 usb_pipein (urb->pipe) ? "in" : "out",
286 status,
287 urb->actual_length, urb->transfer_buffer_length);
288 #endif
289
290 /* complete() can reenter this HCD */
291 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
292 spin_unlock (&ehci->lock);
293 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
294 spin_lock (&ehci->lock);
295 }
296
297 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
298 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
299
300 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
301 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
302
303 /*
304 * Process and free completed qtds for a qh, returning URBs to drivers.
305 * Chases up to qh->hw_current. Returns number of completions called,
306 * indicating how much "real" work we did.
307 */
308 static unsigned
309 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
310 {
311 struct ehci_qtd *last = NULL, *end = qh->dummy;
312 struct list_head *entry, *tmp;
313 int last_status = -EINPROGRESS;
314 int stopped;
315 unsigned count = 0;
316 u8 state;
317 __le32 halt = HALT_BIT(ehci);
318
319 if (unlikely (list_empty (&qh->qtd_list)))
320 return count;
321
322 /* completions (or tasks on other cpus) must never clobber HALT
323 * till we've gone through and cleaned everything up, even when
324 * they add urbs to this qh's queue or mark them for unlinking.
325 *
326 * NOTE: unlinking expects to be done in queue order.
327 */
328 state = qh->qh_state;
329 qh->qh_state = QH_STATE_COMPLETING;
330 stopped = (state == QH_STATE_IDLE);
331
332 /* remove de-activated QTDs from front of queue.
333 * after faults (including short reads), cleanup this urb
334 * then let the queue advance.
335 * if queue is stopped, handles unlinks.
336 */
337 list_for_each_safe (entry, tmp, &qh->qtd_list) {
338 struct ehci_qtd *qtd;
339 struct urb *urb;
340 u32 token = 0;
341
342 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
343 urb = qtd->urb;
344
345 /* clean up any state from previous QTD ...*/
346 if (last) {
347 if (likely (last->urb != urb)) {
348 ehci_urb_done(ehci, last->urb, last_status);
349 count++;
350 last_status = -EINPROGRESS;
351 }
352 ehci_qtd_free (ehci, last);
353 last = NULL;
354 }
355
356 /* ignore urbs submitted during completions we reported */
357 if (qtd == end)
358 break;
359
360 /* hardware copies qtd out of qh overlay */
361 rmb ();
362 token = hc32_to_cpu(ehci, qtd->hw_token);
363
364 /* always clean up qtds the hc de-activated */
365 retry_xacterr:
366 if ((token & QTD_STS_ACTIVE) == 0) {
367
368 /* on STALL, error, and short reads this urb must
369 * complete and all its qtds must be recycled.
370 */
371 if ((token & QTD_STS_HALT) != 0) {
372
373 /* retry transaction errors until we
374 * reach the software xacterr limit
375 */
376 if ((token & QTD_STS_XACT) &&
377 QTD_CERR(token) == 0 &&
378 ++qh->xacterrs < QH_XACTERR_MAX &&
379 !urb->unlinked) {
380 ehci_dbg(ehci,
381 "detected XactErr len %zu/%zu retry %d\n",
382 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
383
384 /* reset the token in the qtd and the
385 * qh overlay (which still contains
386 * the qtd) so that we pick up from
387 * where we left off
388 */
389 token &= ~QTD_STS_HALT;
390 token |= QTD_STS_ACTIVE |
391 (EHCI_TUNE_CERR << 10);
392 qtd->hw_token = cpu_to_hc32(ehci,
393 token);
394 wmb();
395 qh->hw_token = cpu_to_hc32(ehci, token);
396 goto retry_xacterr;
397 }
398 stopped = 1;
399
400 /* magic dummy for some short reads; qh won't advance.
401 * that silicon quirk can kick in with this dummy too.
402 *
403 * other short reads won't stop the queue, including
404 * control transfers (status stage handles that) or
405 * most other single-qtd reads ... the queue stops if
406 * URB_SHORT_NOT_OK was set so the driver submitting
407 * the urbs could clean it up.
408 */
409 } else if (IS_SHORT_READ (token)
410 && !(qtd->hw_alt_next
411 & EHCI_LIST_END(ehci))) {
412 stopped = 1;
413 goto halt;
414 }
415
416 /* stop scanning when we reach qtds the hc is using */
417 } else if (likely (!stopped
418 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
419 break;
420
421 /* scan the whole queue for unlinks whenever it stops */
422 } else {
423 stopped = 1;
424
425 /* cancel everything if we halt, suspend, etc */
426 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
427 last_status = -ESHUTDOWN;
428
429 /* this qtd is active; skip it unless a previous qtd
430 * for its urb faulted, or its urb was canceled.
431 */
432 else if (last_status == -EINPROGRESS && !urb->unlinked)
433 continue;
434
435 /* qh unlinked; token in overlay may be most current */
436 if (state == QH_STATE_IDLE
437 && cpu_to_hc32(ehci, qtd->qtd_dma)
438 == qh->hw_current) {
439 token = hc32_to_cpu(ehci, qh->hw_token);
440
441 /* An unlink may leave an incomplete
442 * async transaction in the TT buffer.
443 * We have to clear it.
444 */
445 ehci_clear_tt_buffer(ehci, qh, urb, token);
446 }
447
448 /* force halt for unlinked or blocked qh, so we'll
449 * patch the qh later and so that completions can't
450 * activate it while we "know" it's stopped.
451 */
452 if ((halt & qh->hw_token) == 0) {
453 halt:
454 qh->hw_token |= halt;
455 wmb ();
456 }
457 }
458
459 /* unless we already know the urb's status, collect qtd status
460 * and update count of bytes transferred. in common short read
461 * cases with only one data qtd (including control transfers),
462 * queue processing won't halt. but with two or more qtds (for
463 * example, with a 32 KB transfer), when the first qtd gets a
464 * short read the second must be removed by hand.
465 */
466 if (last_status == -EINPROGRESS) {
467 last_status = qtd_copy_status(ehci, urb,
468 qtd->length, token);
469 if (last_status == -EREMOTEIO
470 && (qtd->hw_alt_next
471 & EHCI_LIST_END(ehci)))
472 last_status = -EINPROGRESS;
473
474 /* As part of low/full-speed endpoint-halt processing
475 * we must clear the TT buffer (11.17.5).
476 */
477 if (unlikely(last_status != -EINPROGRESS &&
478 last_status != -EREMOTEIO)) {
479 /* The TT's in some hubs malfunction when they
480 * receive this request following a STALL (they
481 * stop sending isochronous packets). Since a
482 * STALL can't leave the TT buffer in a busy
483 * state (if you believe Figures 11-48 - 11-51
484 * in the USB 2.0 spec), we won't clear the TT
485 * buffer in this case. Strictly speaking this
486 * is a violation of the spec.
487 */
488 if (last_status != -EPIPE)
489 ehci_clear_tt_buffer(ehci, qh, urb,
490 token);
491 }
492 }
493
494 /* if we're removing something not at the queue head,
495 * patch the hardware queue pointer.
496 */
497 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
498 last = list_entry (qtd->qtd_list.prev,
499 struct ehci_qtd, qtd_list);
500 last->hw_next = qtd->hw_next;
501 }
502
503 /* remove qtd; it's recycled after possible urb completion */
504 list_del (&qtd->qtd_list);
505 last = qtd;
506
507 /* reinit the xacterr counter for the next qtd */
508 qh->xacterrs = 0;
509 }
510
511 /* last urb's completion might still need calling */
512 if (likely (last != NULL)) {
513 ehci_urb_done(ehci, last->urb, last_status);
514 count++;
515 ehci_qtd_free (ehci, last);
516 }
517
518 /* restore original state; caller must unlink or relink */
519 qh->qh_state = state;
520
521 /* be sure the hardware's done with the qh before refreshing
522 * it after fault cleanup, or recovering from silicon wrongly
523 * overlaying the dummy qtd (which reduces DMA chatter).
524 */
525 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
526 switch (state) {
527 case QH_STATE_IDLE:
528 qh_refresh(ehci, qh);
529 break;
530 case QH_STATE_LINKED:
531 /* We won't refresh a QH that's linked (after the HC
532 * stopped the queue). That avoids a race:
533 * - HC reads first part of QH;
534 * - CPU updates that first part and the token;
535 * - HC reads rest of that QH, including token
536 * Result: HC gets an inconsistent image, and then
537 * DMAs to/from the wrong memory (corrupting it).
538 *
539 * That should be rare for interrupt transfers,
540 * except maybe high bandwidth ...
541 */
542 if ((cpu_to_hc32(ehci, QH_SMASK)
543 & qh->hw_info2) != 0) {
544 intr_deschedule (ehci, qh);
545 (void) qh_schedule (ehci, qh);
546 } else
547 unlink_async (ehci, qh);
548 break;
549 /* otherwise, unlink already started */
550 }
551 }
552
553 return count;
554 }
555
556 /*-------------------------------------------------------------------------*/
557
558 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
559 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
560 // ... and packet size, for any kind of endpoint descriptor
561 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
562
563 /*
564 * reverse of qh_urb_transaction: free a list of TDs.
565 * used for cleanup after errors, before HC sees an URB's TDs.
566 */
567 static void qtd_list_free (
568 struct ehci_hcd *ehci,
569 struct urb *urb,
570 struct list_head *qtd_list
571 ) {
572 struct list_head *entry, *temp;
573
574 list_for_each_safe (entry, temp, qtd_list) {
575 struct ehci_qtd *qtd;
576
577 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
578 list_del (&qtd->qtd_list);
579 ehci_qtd_free (ehci, qtd);
580 }
581 }
582
583 /*
584 * create a list of filled qtds for this URB; won't link into qh.
585 */
586 static struct list_head *
587 qh_urb_transaction (
588 struct ehci_hcd *ehci,
589 struct urb *urb,
590 struct list_head *head,
591 gfp_t flags
592 ) {
593 struct ehci_qtd *qtd, *qtd_prev;
594 dma_addr_t buf;
595 int len, maxpacket;
596 int is_input;
597 u32 token;
598
599 /*
600 * URBs map to sequences of QTDs: one logical transaction
601 */
602 qtd = ehci_qtd_alloc (ehci, flags);
603 if (unlikely (!qtd))
604 return NULL;
605 list_add_tail (&qtd->qtd_list, head);
606 qtd->urb = urb;
607
608 token = QTD_STS_ACTIVE;
609 token |= (EHCI_TUNE_CERR << 10);
610 /* for split transactions, SplitXState initialized to zero */
611
612 len = urb->transfer_buffer_length;
613 is_input = usb_pipein (urb->pipe);
614 if (usb_pipecontrol (urb->pipe)) {
615 /* SETUP pid */
616 qtd_fill(ehci, qtd, urb->setup_dma,
617 sizeof (struct usb_ctrlrequest),
618 token | (2 /* "setup" */ << 8), 8);
619
620 /* ... and always at least one more pid */
621 token ^= QTD_TOGGLE;
622 qtd_prev = qtd;
623 qtd = ehci_qtd_alloc (ehci, flags);
624 if (unlikely (!qtd))
625 goto cleanup;
626 qtd->urb = urb;
627 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
628 list_add_tail (&qtd->qtd_list, head);
629
630 /* for zero length DATA stages, STATUS is always IN */
631 if (len == 0)
632 token |= (1 /* "in" */ << 8);
633 }
634
635 /*
636 * data transfer stage: buffer setup
637 */
638 buf = urb->transfer_dma;
639
640 if (is_input)
641 token |= (1 /* "in" */ << 8);
642 /* else it's already initted to "out" pid (0 << 8) */
643
644 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
645
646 /*
647 * buffer gets wrapped in one or more qtds;
648 * last one may be "short" (including zero len)
649 * and may serve as a control status ack
650 */
651 for (;;) {
652 int this_qtd_len;
653
654 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
655 len -= this_qtd_len;
656 buf += this_qtd_len;
657
658 /*
659 * short reads advance to a "magic" dummy instead of the next
660 * qtd ... that forces the queue to stop, for manual cleanup.
661 * (this will usually be overridden later.)
662 */
663 if (is_input)
664 qtd->hw_alt_next = ehci->async->hw_alt_next;
665
666 /* qh makes control packets use qtd toggle; maybe switch it */
667 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
668 token ^= QTD_TOGGLE;
669
670 if (likely (len <= 0))
671 break;
672
673 qtd_prev = qtd;
674 qtd = ehci_qtd_alloc (ehci, flags);
675 if (unlikely (!qtd))
676 goto cleanup;
677 qtd->urb = urb;
678 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
679 list_add_tail (&qtd->qtd_list, head);
680 }
681
682 /*
683 * unless the caller requires manual cleanup after short reads,
684 * have the alt_next mechanism keep the queue running after the
685 * last data qtd (the only one, for control and most other cases).
686 */
687 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
688 || usb_pipecontrol (urb->pipe)))
689 qtd->hw_alt_next = EHCI_LIST_END(ehci);
690
691 /*
692 * control requests may need a terminating data "status" ack;
693 * bulk ones may need a terminating short packet (zero length).
694 */
695 if (likely (urb->transfer_buffer_length != 0)) {
696 int one_more = 0;
697
698 if (usb_pipecontrol (urb->pipe)) {
699 one_more = 1;
700 token ^= 0x0100; /* "in" <--> "out" */
701 token |= QTD_TOGGLE; /* force DATA1 */
702 } else if (usb_pipebulk (urb->pipe)
703 && (urb->transfer_flags & URB_ZERO_PACKET)
704 && !(urb->transfer_buffer_length % maxpacket)) {
705 one_more = 1;
706 }
707 if (one_more) {
708 qtd_prev = qtd;
709 qtd = ehci_qtd_alloc (ehci, flags);
710 if (unlikely (!qtd))
711 goto cleanup;
712 qtd->urb = urb;
713 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
714 list_add_tail (&qtd->qtd_list, head);
715
716 /* never any data in such packets */
717 qtd_fill(ehci, qtd, 0, 0, token, 0);
718 }
719 }
720
721 /* by default, enable interrupt on urb completion */
722 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
723 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
724 return head;
725
726 cleanup:
727 qtd_list_free (ehci, urb, head);
728 return NULL;
729 }
730
731 /*-------------------------------------------------------------------------*/
732
733 // Would be best to create all qh's from config descriptors,
734 // when each interface/altsetting is established. Unlink
735 // any previous qh and cancel its urbs first; endpoints are
736 // implicitly reset then (data toggle too).
737 // That'd mean updating how usbcore talks to HCDs. (2.7?)
738
739
740 /*
741 * Each QH holds a qtd list; a QH is used for everything except iso.
742 *
743 * For interrupt urbs, the scheduler must set the microframe scheduling
744 * mask(s) each time the QH gets scheduled. For highspeed, that's
745 * just one microframe in the s-mask. For split interrupt transactions
746 * there are additional complications: c-mask, maybe FSTNs.
747 */
748 static struct ehci_qh *
749 qh_make (
750 struct ehci_hcd *ehci,
751 struct urb *urb,
752 gfp_t flags
753 ) {
754 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
755 u32 info1 = 0, info2 = 0;
756 int is_input, type;
757 int maxp = 0;
758 struct usb_tt *tt = urb->dev->tt;
759
760 if (!qh)
761 return qh;
762
763 /*
764 * init endpoint/device data for this QH
765 */
766 info1 |= usb_pipeendpoint (urb->pipe) << 8;
767 info1 |= usb_pipedevice (urb->pipe) << 0;
768
769 is_input = usb_pipein (urb->pipe);
770 type = usb_pipetype (urb->pipe);
771 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
772
773 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
774 * acts like up to 3KB, but is built from smaller packets.
775 */
776 if (max_packet(maxp) > 1024) {
777 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
778 goto done;
779 }
780
781 /* Compute interrupt scheduling parameters just once, and save.
782 * - allowing for high bandwidth, how many nsec/uframe are used?
783 * - split transactions need a second CSPLIT uframe; same question
784 * - splits also need a schedule gap (for full/low speed I/O)
785 * - qh has a polling interval
786 *
787 * For control/bulk requests, the HC or TT handles these.
788 */
789 if (type == PIPE_INTERRUPT) {
790 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
791 is_input, 0,
792 hb_mult(maxp) * max_packet(maxp)));
793 qh->start = NO_FRAME;
794
795 if (urb->dev->speed == USB_SPEED_HIGH) {
796 qh->c_usecs = 0;
797 qh->gap_uf = 0;
798
799 qh->period = urb->interval >> 3;
800 if (qh->period == 0 && urb->interval != 1) {
801 /* NOTE interval 2 or 4 uframes could work.
802 * But interval 1 scheduling is simpler, and
803 * includes high bandwidth.
804 */
805 urb->interval = 1;
806 } else if (qh->period > ehci->periodic_size) {
807 qh->period = ehci->periodic_size;
808 urb->interval = qh->period << 3;
809 }
810 } else {
811 int think_time;
812
813 /* gap is f(FS/LS transfer times) */
814 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
815 is_input, 0, maxp) / (125 * 1000);
816
817 /* FIXME this just approximates SPLIT/CSPLIT times */
818 if (is_input) { // SPLIT, gap, CSPLIT+DATA
819 qh->c_usecs = qh->usecs + HS_USECS (0);
820 qh->usecs = HS_USECS (1);
821 } else { // SPLIT+DATA, gap, CSPLIT
822 qh->usecs += HS_USECS (1);
823 qh->c_usecs = HS_USECS (0);
824 }
825
826 think_time = tt ? tt->think_time : 0;
827 qh->tt_usecs = NS_TO_US (think_time +
828 usb_calc_bus_time (urb->dev->speed,
829 is_input, 0, max_packet (maxp)));
830 qh->period = urb->interval;
831 if (qh->period > ehci->periodic_size) {
832 qh->period = ehci->periodic_size;
833 urb->interval = qh->period;
834 }
835 }
836 }
837
838 /* support for tt scheduling, and access to toggles */
839 qh->dev = urb->dev;
840
841 /* using TT? */
842 switch (urb->dev->speed) {
843 case USB_SPEED_LOW:
844 info1 |= (1 << 12); /* EPS "low" */
845 /* FALL THROUGH */
846
847 case USB_SPEED_FULL:
848 /* EPS 0 means "full" */
849 if (type != PIPE_INTERRUPT)
850 info1 |= (EHCI_TUNE_RL_TT << 28);
851 if (type == PIPE_CONTROL) {
852 info1 |= (1 << 27); /* for TT */
853 info1 |= 1 << 14; /* toggle from qtd */
854 }
855 info1 |= maxp << 16;
856
857 info2 |= (EHCI_TUNE_MULT_TT << 30);
858
859 /* Some Freescale processors have an erratum in which the
860 * port number in the queue head was 0..N-1 instead of 1..N.
861 */
862 if (ehci_has_fsl_portno_bug(ehci))
863 info2 |= (urb->dev->ttport-1) << 23;
864 else
865 info2 |= urb->dev->ttport << 23;
866
867 /* set the address of the TT; for TDI's integrated
868 * root hub tt, leave it zeroed.
869 */
870 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
871 info2 |= tt->hub->devnum << 16;
872
873 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
874
875 break;
876
877 case USB_SPEED_HIGH: /* no TT involved */
878 info1 |= (2 << 12); /* EPS "high" */
879 if (type == PIPE_CONTROL) {
880 info1 |= (EHCI_TUNE_RL_HS << 28);
881 info1 |= 64 << 16; /* usb2 fixed maxpacket */
882 info1 |= 1 << 14; /* toggle from qtd */
883 info2 |= (EHCI_TUNE_MULT_HS << 30);
884 } else if (type == PIPE_BULK) {
885 info1 |= (EHCI_TUNE_RL_HS << 28);
886 /* The USB spec says that high speed bulk endpoints
887 * always use 512 byte maxpacket. But some device
888 * vendors decided to ignore that, and MSFT is happy
889 * to help them do so. So now people expect to use
890 * such nonconformant devices with Linux too; sigh.
891 */
892 info1 |= max_packet(maxp) << 16;
893 info2 |= (EHCI_TUNE_MULT_HS << 30);
894 } else { /* PIPE_INTERRUPT */
895 info1 |= max_packet (maxp) << 16;
896 info2 |= hb_mult (maxp) << 30;
897 }
898 break;
899 default:
900 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
901 done:
902 qh_put (qh);
903 return NULL;
904 }
905
906 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
907
908 /* init as live, toggle clear, advance to dummy */
909 qh->qh_state = QH_STATE_IDLE;
910 qh->hw_info1 = cpu_to_hc32(ehci, info1);
911 qh->hw_info2 = cpu_to_hc32(ehci, info2);
912 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
913 qh_refresh (ehci, qh);
914 return qh;
915 }
916
917 /*-------------------------------------------------------------------------*/
918
919 /* move qh (and its qtds) onto async queue; maybe enable queue. */
920
921 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
922 {
923 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
924 struct ehci_qh *head;
925
926 /* Don't link a QH if there's a Clear-TT-Buffer pending */
927 if (unlikely(qh->clearing_tt))
928 return;
929
930 /* (re)start the async schedule? */
931 head = ehci->async;
932 timer_action_done (ehci, TIMER_ASYNC_OFF);
933 if (!head->qh_next.qh) {
934 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
935
936 if (!(cmd & CMD_ASE)) {
937 /* in case a clear of CMD_ASE didn't take yet */
938 (void)handshake(ehci, &ehci->regs->status,
939 STS_ASS, 0, 150);
940 cmd |= CMD_ASE | CMD_RUN;
941 ehci_writel(ehci, cmd, &ehci->regs->command);
942 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
943 /* posted write need not be known to HC yet ... */
944 }
945 }
946
947 /* clear halt and/or toggle; and maybe recover from silicon quirk */
948 if (qh->qh_state == QH_STATE_IDLE)
949 qh_refresh (ehci, qh);
950
951 /* splice right after start */
952 qh->qh_next = head->qh_next;
953 qh->hw_next = head->hw_next;
954 wmb ();
955
956 head->qh_next.qh = qh;
957 head->hw_next = dma;
958
959 qh_get(qh);
960 qh->xacterrs = 0;
961 qh->qh_state = QH_STATE_LINKED;
962 /* qtd completions reported later by interrupt */
963 }
964
965 /*-------------------------------------------------------------------------*/
966
967 /*
968 * For control/bulk/interrupt, return QH with these TDs appended.
969 * Allocates and initializes the QH if necessary.
970 * Returns null if it can't allocate a QH it needs to.
971 * If the QH has TDs (urbs) already, that's great.
972 */
973 static struct ehci_qh *qh_append_tds (
974 struct ehci_hcd *ehci,
975 struct urb *urb,
976 struct list_head *qtd_list,
977 int epnum,
978 void **ptr
979 )
980 {
981 struct ehci_qh *qh = NULL;
982 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
983
984 qh = (struct ehci_qh *) *ptr;
985 if (unlikely (qh == NULL)) {
986 /* can't sleep here, we have ehci->lock... */
987 qh = qh_make (ehci, urb, GFP_ATOMIC);
988 *ptr = qh;
989 }
990 if (likely (qh != NULL)) {
991 struct ehci_qtd *qtd;
992
993 if (unlikely (list_empty (qtd_list)))
994 qtd = NULL;
995 else
996 qtd = list_entry (qtd_list->next, struct ehci_qtd,
997 qtd_list);
998
999 /* control qh may need patching ... */
1000 if (unlikely (epnum == 0)) {
1001
1002 /* usb_reset_device() briefly reverts to address 0 */
1003 if (usb_pipedevice (urb->pipe) == 0)
1004 qh->hw_info1 &= ~qh_addr_mask;
1005 }
1006
1007 /* just one way to queue requests: swap with the dummy qtd.
1008 * only hc or qh_refresh() ever modify the overlay.
1009 */
1010 if (likely (qtd != NULL)) {
1011 struct ehci_qtd *dummy;
1012 dma_addr_t dma;
1013 __hc32 token;
1014
1015 /* to avoid racing the HC, use the dummy td instead of
1016 * the first td of our list (becomes new dummy). both
1017 * tds stay deactivated until we're done, when the
1018 * HC is allowed to fetch the old dummy (4.10.2).
1019 */
1020 token = qtd->hw_token;
1021 qtd->hw_token = HALT_BIT(ehci);
1022 wmb ();
1023 dummy = qh->dummy;
1024
1025 dma = dummy->qtd_dma;
1026 *dummy = *qtd;
1027 dummy->qtd_dma = dma;
1028
1029 list_del (&qtd->qtd_list);
1030 list_add (&dummy->qtd_list, qtd_list);
1031 list_splice_tail(qtd_list, &qh->qtd_list);
1032
1033 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1034 qh->dummy = qtd;
1035
1036 /* hc must see the new dummy at list end */
1037 dma = qtd->qtd_dma;
1038 qtd = list_entry (qh->qtd_list.prev,
1039 struct ehci_qtd, qtd_list);
1040 qtd->hw_next = QTD_NEXT(ehci, dma);
1041
1042 /* let the hc process these next qtds */
1043 wmb ();
1044 dummy->hw_token = token;
1045
1046 urb->hcpriv = qh_get (qh);
1047 }
1048 }
1049 return qh;
1050 }
1051
1052 /*-------------------------------------------------------------------------*/
1053
1054 static int
1055 submit_async (
1056 struct ehci_hcd *ehci,
1057 struct urb *urb,
1058 struct list_head *qtd_list,
1059 gfp_t mem_flags
1060 ) {
1061 struct ehci_qtd *qtd;
1062 int epnum;
1063 unsigned long flags;
1064 struct ehci_qh *qh = NULL;
1065 int rc;
1066
1067 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
1068 epnum = urb->ep->desc.bEndpointAddress;
1069
1070 #ifdef EHCI_URB_TRACE
1071 ehci_dbg (ehci,
1072 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1073 __func__, urb->dev->devpath, urb,
1074 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1075 urb->transfer_buffer_length,
1076 qtd, urb->ep->hcpriv);
1077 #endif
1078
1079 spin_lock_irqsave (&ehci->lock, flags);
1080 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1081 &ehci_to_hcd(ehci)->flags))) {
1082 rc = -ESHUTDOWN;
1083 goto done;
1084 }
1085 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1086 if (unlikely(rc))
1087 goto done;
1088
1089 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1090 if (unlikely(qh == NULL)) {
1091 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1092 rc = -ENOMEM;
1093 goto done;
1094 }
1095
1096 /* Control/bulk operations through TTs don't need scheduling,
1097 * the HC and TT handle it when the TT has a buffer ready.
1098 */
1099 if (likely (qh->qh_state == QH_STATE_IDLE))
1100 qh_link_async(ehci, qh);
1101 done:
1102 spin_unlock_irqrestore (&ehci->lock, flags);
1103 if (unlikely (qh == NULL))
1104 qtd_list_free (ehci, urb, qtd_list);
1105 return rc;
1106 }
1107
1108 /*-------------------------------------------------------------------------*/
1109
1110 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1111
1112 static void end_unlink_async (struct ehci_hcd *ehci)
1113 {
1114 struct ehci_qh *qh = ehci->reclaim;
1115 struct ehci_qh *next;
1116
1117 iaa_watchdog_done(ehci);
1118
1119 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1120 qh->qh_state = QH_STATE_IDLE;
1121 qh->qh_next.qh = NULL;
1122 qh_put (qh); // refcount from reclaim
1123
1124 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1125 next = qh->reclaim;
1126 ehci->reclaim = next;
1127 qh->reclaim = NULL;
1128
1129 qh_completions (ehci, qh);
1130
1131 if (!list_empty (&qh->qtd_list)
1132 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1133 qh_link_async (ehci, qh);
1134 else {
1135 /* it's not free to turn the async schedule on/off; leave it
1136 * active but idle for a while once it empties.
1137 */
1138 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1139 && ehci->async->qh_next.qh == NULL)
1140 timer_action (ehci, TIMER_ASYNC_OFF);
1141 }
1142 qh_put(qh); /* refcount from async list */
1143
1144 if (next) {
1145 ehci->reclaim = NULL;
1146 start_unlink_async (ehci, next);
1147 }
1148 }
1149
1150 /* makes sure the async qh will become idle */
1151 /* caller must own ehci->lock */
1152
1153 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1154 {
1155 int cmd = ehci_readl(ehci, &ehci->regs->command);
1156 struct ehci_qh *prev;
1157
1158 #ifdef DEBUG
1159 assert_spin_locked(&ehci->lock);
1160 if (ehci->reclaim
1161 || (qh->qh_state != QH_STATE_LINKED
1162 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1163 )
1164 BUG ();
1165 #endif
1166
1167 /* stop async schedule right now? */
1168 if (unlikely (qh == ehci->async)) {
1169 /* can't get here without STS_ASS set */
1170 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1171 && !ehci->reclaim) {
1172 /* ... and CMD_IAAD clear */
1173 ehci_writel(ehci, cmd & ~CMD_ASE,
1174 &ehci->regs->command);
1175 wmb ();
1176 // handshake later, if we need to
1177 timer_action_done (ehci, TIMER_ASYNC_OFF);
1178 }
1179 return;
1180 }
1181
1182 qh->qh_state = QH_STATE_UNLINK;
1183 ehci->reclaim = qh = qh_get (qh);
1184
1185 prev = ehci->async;
1186 while (prev->qh_next.qh != qh)
1187 prev = prev->qh_next.qh;
1188
1189 prev->hw_next = qh->hw_next;
1190 prev->qh_next = qh->qh_next;
1191 wmb ();
1192
1193 /* If the controller isn't running, we don't have to wait for it */
1194 if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1195 /* if (unlikely (qh->reclaim != 0))
1196 * this will recurse, probably not much
1197 */
1198 end_unlink_async (ehci);
1199 return;
1200 }
1201
1202 cmd |= CMD_IAAD;
1203 ehci_writel(ehci, cmd, &ehci->regs->command);
1204 (void)ehci_readl(ehci, &ehci->regs->command);
1205 iaa_watchdog_start(ehci);
1206 }
1207
1208 /*-------------------------------------------------------------------------*/
1209
1210 static void scan_async (struct ehci_hcd *ehci)
1211 {
1212 struct ehci_qh *qh;
1213 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1214
1215 ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1216 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1217 rescan:
1218 qh = ehci->async->qh_next.qh;
1219 if (likely (qh != NULL)) {
1220 do {
1221 /* clean any finished work for this qh */
1222 if (!list_empty (&qh->qtd_list)
1223 && qh->stamp != ehci->stamp) {
1224 int temp;
1225
1226 /* unlinks could happen here; completion
1227 * reporting drops the lock. rescan using
1228 * the latest schedule, but don't rescan
1229 * qhs we already finished (no looping).
1230 */
1231 qh = qh_get (qh);
1232 qh->stamp = ehci->stamp;
1233 temp = qh_completions (ehci, qh);
1234 qh_put (qh);
1235 if (temp != 0) {
1236 goto rescan;
1237 }
1238 }
1239
1240 /* unlink idle entries, reducing DMA usage as well
1241 * as HCD schedule-scanning costs. delay for any qh
1242 * we just scanned, there's a not-unusual case that it
1243 * doesn't stay idle for long.
1244 * (plus, avoids some kind of re-activation race.)
1245 */
1246 if (list_empty(&qh->qtd_list)
1247 && qh->qh_state == QH_STATE_LINKED) {
1248 if (!ehci->reclaim
1249 && ((ehci->stamp - qh->stamp) & 0x1fff)
1250 >= (EHCI_SHRINK_FRAMES * 8))
1251 start_unlink_async(ehci, qh);
1252 else
1253 action = TIMER_ASYNC_SHRINK;
1254 }
1255
1256 qh = qh->qh_next.qh;
1257 } while (qh);
1258 }
1259 if (action == TIMER_ASYNC_SHRINK)
1260 timer_action (ehci, TIMER_ASYNC_SHRINK);
1261 }
1262
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