1 /****************************************************************************
2 * ixj.c
3 *
4 * Device Driver for Quicknet Technologies, Inc.'s Telephony cards
5 * including the Internet PhoneJACK, Internet PhoneJACK Lite,
6 * Internet PhoneJACK PCI, Internet LineJACK, Internet PhoneCARD and
7 * SmartCABLE
8 *
9 * (c) Copyright 1999-2001 Quicknet Technologies, Inc.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * Author: Ed Okerson, <eokerson@quicknet.net>
17 *
18 * Contributors: Greg Herlein, <gherlein@quicknet.net>
19 * David W. Erhart, <derhart@quicknet.net>
20 * John Sellers, <jsellers@quicknet.net>
21 * Mike Preston, <mpreston@quicknet.net>
22 *
23 * Fixes: David Huggins-Daines, <dhd@cepstral.com>
24 * Fabio Ferrari, <fabio.ferrari@digitro.com.br>
25 * Artis Kugevics, <artis@mt.lv>
26 * Daniele Bellucci, <bellucda@tiscali.it>
27 *
28 * More information about the hardware related to this driver can be found
29 * at our website: http://www.quicknet.net
30 *
31 * IN NO EVENT SHALL QUICKNET TECHNOLOGIES, INC. BE LIABLE TO ANY PARTY FOR
32 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
33 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF QUICKNET
34 * TECHNOLOGIES, INC. HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * QUICKNET TECHNOLOGIES, INC. SPECIFICALLY DISCLAIMS ANY WARRANTIES,
37 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
38 * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
39 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
40 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
41 *
42 ***************************************************************************/
43
44 /*
45 * $Log: ixj.c,v $
46 *
47 * Revision 4.8 2003/07/09 19:39:00 Daniele Bellucci
48 * Audit some copy_*_user and minor cleanup.
49 *
50 * Revision 4.7 2001/08/13 06:19:33 craigs
51 * Added additional changes from Alan Cox and John Anderson for
52 * 2.2 to 2.4 cleanup and bounds checking
53 *
54 * Revision 4.6 2001/08/13 01:05:05 craigs
55 * Really fixed PHONE_QUERY_CODEC problem this time
56 *
57 * Revision 4.5 2001/08/13 00:11:03 craigs
58 * Fixed problem in handling of PHONE_QUERY_CODEC, thanks to Shane Anderson
59 *
60 * Revision 4.4 2001/08/07 07:58:12 craigs
61 * Changed back to three digit version numbers
62 * Added tagbuild target to allow automatic and easy tagging of versions
63 *
64 * Revision 4.3 2001/08/07 07:24:47 craigs
65 * Added ixj-ver.h to allow easy configuration management of driver
66 * Added display of version number in /prox/ixj
67 *
68 * Revision 4.2 2001/08/06 07:07:19 craigs
69 * Reverted IXJCTL_DSP_TYPE and IXJCTL_DSP_VERSION files to original
70 * behaviour of returning int rather than short *
71 *
72 * Revision 4.1 2001/08/05 00:17:37 craigs
73 * More changes for correct PCMCIA installation
74 * Start of changes for backward Linux compatibility
75 *
76 * Revision 4.0 2001/08/04 12:33:12 craigs
77 * New version using GNU autoconf
78 *
79 * Revision 3.105 2001/07/20 23:14:32 eokerson
80 * More work on CallerID generation when using ring cadences.
81 *
82 * Revision 3.104 2001/07/06 01:33:55 eokerson
83 * Some bugfixes from Robert Vojta <vojta@ipex.cz> and a few mods to the Makefile.
84 *
85 * Revision 3.103 2001/07/05 19:20:16 eokerson
86 * Updated HOWTO
87 * Changed mic gain to 30dB on Internet LineJACK mic/speaker port.
88 *
89 * Revision 3.102 2001/07/03 23:51:21 eokerson
90 * Un-mute mic on Internet LineJACK when in speakerphone mode.
91 *
92 * Revision 3.101 2001/07/02 19:26:56 eokerson
93 * Removed initialiazation of ixjdebug and ixj_convert_loaded so they will go in the .bss instead of the .data
94 *
95 * Revision 3.100 2001/07/02 19:18:27 eokerson
96 * Changed driver to make dynamic allocation possible. We now pass IXJ * between functions instead of array indexes.
97 * Fixed the way the POTS and PSTN ports interact during a PSTN call to allow local answering.
98 * Fixed speaker mode on Internet LineJACK.
99 *
100 * Revision 3.99 2001/05/09 14:11:16 eokerson
101 * Fixed kmalloc error in ixj_build_filter_cadence. Thanks David Chan <cat@waulogy.stanford.edu>.
102 *
103 * Revision 3.98 2001/05/08 19:55:33 eokerson
104 * Fixed POTS hookstate detection while it is connected to PSTN port.
105 *
106 * Revision 3.97 2001/05/08 00:01:04 eokerson
107 * Fixed kernel oops when sending caller ID data.
108 *
109 * Revision 3.96 2001/05/04 23:09:30 eokerson
110 * Now uses one kernel timer for each card, instead of one for the entire driver.
111 *
112 * Revision 3.95 2001/04/25 22:06:47 eokerson
113 * Fixed squawking at beginning of some G.723.1 calls.
114 *
115 * Revision 3.94 2001/04/03 23:42:00 eokerson
116 * Added linear volume ioctls
117 * Added raw filter load ioctl
118 *
119 * Revision 3.93 2001/02/27 01:00:06 eokerson
120 * Fixed blocking in CallerID.
121 * Reduced size of ixj structure for smaller driver footprint.
122 *
123 * Revision 3.92 2001/02/20 22:02:59 eokerson
124 * Fixed isapnp and pcmcia module compatibility for 2.4.x kernels.
125 * Improved PSTN ring detection.
126 * Fixed wink generation on POTS ports.
127 *
128 * Revision 3.91 2001/02/13 00:55:44 eokerson
129 * Turn AEC back on after changing frame sizes.
130 *
131 * Revision 3.90 2001/02/12 16:42:00 eokerson
132 * Added ALAW codec, thanks to Fabio Ferrari for the table based converters to make ALAW from ULAW.
133 *
134 * Revision 3.89 2001/02/12 15:41:16 eokerson
135 * Fix from Artis Kugevics - Tone gains were not being set correctly.
136 *
137 * Revision 3.88 2001/02/05 23:25:42 eokerson
138 * Fixed lockup bugs with deregister.
139 *
140 * Revision 3.87 2001/01/29 21:00:39 eokerson
141 * Fix from Fabio Ferrari <fabio.ferrari@digitro.com.br> to properly handle EAGAIN and EINTR during non-blocking write.
142 * Updated copyright date.
143 *
144 * Revision 3.86 2001/01/23 23:53:46 eokerson
145 * Fixes to G.729 compatibility.
146 *
147 * Revision 3.85 2001/01/23 21:30:36 eokerson
148 * Added verbage about cards supported.
149 * Removed commands that put the card in low power mode at some times that it should not be in low power mode.
150 *
151 * Revision 3.84 2001/01/22 23:32:10 eokerson
152 * Some bugfixes from David Huggins-Daines, <dhd@cepstral.com> and other cleanups.
153 *
154 * Revision 3.83 2001/01/19 14:51:41 eokerson
155 * Fixed ixj_WriteDSPCommand to decrement usage counter when command fails.
156 *
157 * Revision 3.82 2001/01/19 00:34:49 eokerson
158 * Added verbosity to write overlap errors.
159 *
160 * Revision 3.81 2001/01/18 23:56:54 eokerson
161 * Fixed PSTN line test functions.
162 *
163 * Revision 3.80 2001/01/18 22:29:27 eokerson
164 * Updated AEC/AGC values for different cards.
165 *
166 * Revision 3.79 2001/01/17 02:58:54 eokerson
167 * Fixed AEC reset after Caller ID.
168 * Fixed Codec lockup after Caller ID on Call Waiting when not using 30ms frames.
169 *
170 * Revision 3.78 2001/01/16 19:43:09 eokerson
171 * Added support for Linux 2.4.x kernels.
172 *
173 * Revision 3.77 2001/01/09 04:00:52 eokerson
174 * Linetest will now test the line, even if it has previously succeded.
175 *
176 * Revision 3.76 2001/01/08 19:27:00 eokerson
177 * Fixed problem with standard cable on Internet PhoneCARD.
178 *
179 * Revision 3.75 2000/12/22 16:52:14 eokerson
180 * Modified to allow hookstate detection on the POTS port when the PSTN port is selected.
181 *
182 * Revision 3.74 2000/12/08 22:41:50 eokerson
183 * Added capability for G729B.
184 *
185 * Revision 3.73 2000/12/07 23:35:16 eokerson
186 * Added capability to have different ring pattern before CallerID data.
187 * Added hookstate checks in CallerID routines to stop FSK.
188 *
189 * Revision 3.72 2000/12/06 19:31:31 eokerson
190 * Modified signal behavior to only send one signal per event.
191 *
192 * Revision 3.71 2000/12/06 03:23:08 eokerson
193 * Fixed CallerID on Call Waiting.
194 *
195 * Revision 3.70 2000/12/04 21:29:37 eokerson
196 * Added checking to Smart Cable gain functions.
197 *
198 * Revision 3.69 2000/12/04 21:05:20 eokerson
199 * Changed ixjdebug levels.
200 * Added ioctls to change gains in Internet Phone CARD Smart Cable.
201 *
202 * Revision 3.68 2000/12/04 00:17:21 craigs
203 * Changed mixer voice gain to +6dB rather than 0dB
204 *
205 * Revision 3.67 2000/11/30 21:25:51 eokerson
206 * Fixed write signal errors.
207 *
208 * Revision 3.66 2000/11/29 22:42:44 eokerson
209 * Fixed PSTN ring detect problems.
210 *
211 * Revision 3.65 2000/11/29 07:31:55 craigs
212 * Added new 425Hz filter co-efficients
213 * Added card-specific DTMF prescaler initialisation
214 *
215 * Revision 3.64 2000/11/28 14:03:32 craigs
216 * Changed certain mixer initialisations to be 0dB rather than 12dB
217 * Added additional information to /proc/ixj
218 *
219 * Revision 3.63 2000/11/28 11:38:41 craigs
220 * Added display of AEC modes in AUTO and AGC mode
221 *
222 * Revision 3.62 2000/11/28 04:05:44 eokerson
223 * Improved PSTN ring detection routine.
224 *
225 * Revision 3.61 2000/11/27 21:53:12 eokerson
226 * Fixed flash detection.
227 *
228 * Revision 3.60 2000/11/27 15:57:29 eokerson
229 * More work on G.729 load routines.
230 *
231 * Revision 3.59 2000/11/25 21:55:12 eokerson
232 * Fixed errors in G.729 load routine.
233 *
234 * Revision 3.58 2000/11/25 04:08:29 eokerson
235 * Added board locks around G.729 and TS85 load routines.
236 *
237 * Revision 3.57 2000/11/24 05:35:17 craigs
238 * Added ability to retrieve mixer values on LineJACK
239 * Added complete initialisation of all mixer values at startup
240 * Fixed spelling mistake
241 *
242 * Revision 3.56 2000/11/23 02:52:11 robertj
243 * Added cvs change log keyword.
244 * Fixed bug in capabilities list when using G.729 module.
245 *
246 */
247
248 #include "ixj-ver.h"
249
250 #define PERFMON_STATS
251 #define IXJDEBUG 0
252 #define MAXRINGS 5
253
254 #include <linux/module.h>
255
256 #include <linux/init.h>
257 #include <linux/sched.h>
258 #include <linux/kernel.h> /* printk() */
259 #include <linux/fs.h> /* everything... */
260 #include <linux/errno.h> /* error codes */
261 #include <linux/slab.h>
262 #include <linux/mm.h>
263 #include <linux/ioport.h>
264 #include <linux/interrupt.h>
265 #include <linux/proc_fs.h>
266 #include <linux/poll.h>
267 #include <linux/timer.h>
268 #include <linux/delay.h>
269 #include <linux/pci.h>
270
271 #include <asm/io.h>
272 #include <asm/uaccess.h>
273
274 #include <linux/isapnp.h>
275
276 #include "ixj.h"
277
278 #define TYPE(inode) (iminor(inode) >> 4)
279 #define NUM(inode) (iminor(inode) & 0xf)
280
281 static int ixjdebug;
282 static int hertz = HZ;
283 static int samplerate = 100;
284
285 module_param(ixjdebug, int, 0);
286
287 static struct pci_device_id ixj_pci_tbl[] __devinitdata = {
288 { PCI_VENDOR_ID_QUICKNET, PCI_DEVICE_ID_QUICKNET_XJ,
289 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
290 { }
291 };
292
293 MODULE_DEVICE_TABLE(pci, ixj_pci_tbl);
294
295 /************************************************************************
296 *
297 * ixjdebug meanings are now bit mapped instead of level based
298 * Values can be or'ed together to turn on multiple messages
299 *
300 * bit 0 (0x0001) = any failure
301 * bit 1 (0x0002) = general messages
302 * bit 2 (0x0004) = POTS ringing related
303 * bit 3 (0x0008) = PSTN events
304 * bit 4 (0x0010) = PSTN Cadence state details
305 * bit 5 (0x0020) = Tone detection triggers
306 * bit 6 (0x0040) = Tone detection cadence details
307 * bit 7 (0x0080) = ioctl tracking
308 * bit 8 (0x0100) = signal tracking
309 * bit 9 (0x0200) = CallerID generation details
310 *
311 ************************************************************************/
312
313 #ifdef IXJ_DYN_ALLOC
314
315 static IXJ *ixj[IXJMAX];
316 #define get_ixj(b) ixj[(b)]
317
318 /*
319 * Allocate a free IXJ device
320 */
321
322 static IXJ *ixj_alloc()
323 {
324 for(cnt=0; cnt<IXJMAX; cnt++)
325 {
326 if(ixj[cnt] == NULL || !ixj[cnt]->DSPbase)
327 {
328 j = kmalloc(sizeof(IXJ), GFP_KERNEL);
329 if (j == NULL)
330 return NULL;
331 ixj[cnt] = j;
332 return j;
333 }
334 }
335 return NULL;
336 }
337
338 static void ixj_fsk_free(IXJ *j)
339 {
340 kfree(j->fskdata);
341 j->fskdata = NULL;
342 }
343
344 static void ixj_fsk_alloc(IXJ *j)
345 {
346 if(!j->fskdata) {
347 j->fskdata = kmalloc(8000, GFP_KERNEL);
348 if (!j->fskdata) {
349 if(ixjdebug & 0x0200) {
350 printk("IXJ phone%d - allocate failed\n", j->board);
351 }
352 return;
353 } else {
354 j->fsksize = 8000;
355 if(ixjdebug & 0x0200) {
356 printk("IXJ phone%d - allocate succeded\n", j->board);
357 }
358 }
359 }
360 }
361
362 #else
363
364 static IXJ ixj[IXJMAX];
365 #define get_ixj(b) (&ixj[(b)])
366
367 /*
368 * Allocate a free IXJ device
369 */
370
371 static IXJ *ixj_alloc(void)
372 {
373 int cnt;
374 for(cnt=0; cnt<IXJMAX; cnt++) {
375 if(!ixj[cnt].DSPbase)
376 return &ixj[cnt];
377 }
378 return NULL;
379 }
380
381 static inline void ixj_fsk_free(IXJ *j) {;}
382
383 static inline void ixj_fsk_alloc(IXJ *j)
384 {
385 j->fsksize = 8000;
386 }
387
388 #endif
389
390 #ifdef PERFMON_STATS
391 #define ixj_perfmon(x) ((x)++)
392 #else
393 #define ixj_perfmon(x) do { } while(0)
394 #endif
395
396 static int ixj_convert_loaded;
397
398 static int ixj_WriteDSPCommand(unsigned short, IXJ *j);
399
400 /************************************************************************
401 *
402 * These are function definitions to allow external modules to register
403 * enhanced functionality call backs.
404 *
405 ************************************************************************/
406
407 static int Stub(IXJ * J, unsigned long arg)
408 {
409 return 0;
410 }
411
412 static IXJ_REGFUNC ixj_PreRead = &Stub;
413 static IXJ_REGFUNC ixj_PostRead = &Stub;
414 static IXJ_REGFUNC ixj_PreWrite = &Stub;
415 static IXJ_REGFUNC ixj_PostWrite = &Stub;
416
417 static void ixj_read_frame(IXJ *j);
418 static void ixj_write_frame(IXJ *j);
419 static void ixj_init_timer(IXJ *j);
420 static void ixj_add_timer(IXJ * j);
421 static void ixj_timeout(unsigned long ptr);
422 static int read_filters(IXJ *j);
423 static int LineMonitor(IXJ *j);
424 static int ixj_fasync(int fd, struct file *, int mode);
425 static int ixj_set_port(IXJ *j, int arg);
426 static int ixj_set_pots(IXJ *j, int arg);
427 static int ixj_hookstate(IXJ *j);
428 static int ixj_record_start(IXJ *j);
429 static void ixj_record_stop(IXJ *j);
430 static void set_rec_volume(IXJ *j, int volume);
431 static int get_rec_volume(IXJ *j);
432 static int set_rec_codec(IXJ *j, int rate);
433 static void ixj_vad(IXJ *j, int arg);
434 static int ixj_play_start(IXJ *j);
435 static void ixj_play_stop(IXJ *j);
436 static int ixj_set_tone_on(unsigned short arg, IXJ *j);
437 static int ixj_set_tone_off(unsigned short, IXJ *j);
438 static int ixj_play_tone(IXJ *j, char tone);
439 static void ixj_aec_start(IXJ *j, int level);
440 static int idle(IXJ *j);
441 static void ixj_ring_on(IXJ *j);
442 static void ixj_ring_off(IXJ *j);
443 static void aec_stop(IXJ *j);
444 static void ixj_ringback(IXJ *j);
445 static void ixj_busytone(IXJ *j);
446 static void ixj_dialtone(IXJ *j);
447 static void ixj_cpt_stop(IXJ *j);
448 static char daa_int_read(IXJ *j);
449 static char daa_CR_read(IXJ *j, int cr);
450 static int daa_set_mode(IXJ *j, int mode);
451 static int ixj_linetest(IXJ *j);
452 static int ixj_daa_write(IXJ *j);
453 static int ixj_daa_cid_read(IXJ *j);
454 static void DAA_Coeff_US(IXJ *j);
455 static void DAA_Coeff_UK(IXJ *j);
456 static void DAA_Coeff_France(IXJ *j);
457 static void DAA_Coeff_Germany(IXJ *j);
458 static void DAA_Coeff_Australia(IXJ *j);
459 static void DAA_Coeff_Japan(IXJ *j);
460 static int ixj_init_filter(IXJ *j, IXJ_FILTER * jf);
461 static int ixj_init_filter_raw(IXJ *j, IXJ_FILTER_RAW * jfr);
462 static int ixj_init_tone(IXJ *j, IXJ_TONE * ti);
463 static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp);
464 static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp);
465 /* Serial Control Interface funtions */
466 static int SCI_Control(IXJ *j, int control);
467 static int SCI_Prepare(IXJ *j);
468 static int SCI_WaitHighSCI(IXJ *j);
469 static int SCI_WaitLowSCI(IXJ *j);
470 static DWORD PCIEE_GetSerialNumber(WORD wAddress);
471 static int ixj_PCcontrol_wait(IXJ *j);
472 static void ixj_pre_cid(IXJ *j);
473 static void ixj_write_cid(IXJ *j);
474 static void ixj_write_cid_bit(IXJ *j, int bit);
475 static int set_base_frame(IXJ *j, int size);
476 static int set_play_codec(IXJ *j, int rate);
477 static void set_rec_depth(IXJ *j, int depth);
478 static int ixj_mixer(long val, IXJ *j);
479
480 /************************************************************************
481 CT8020/CT8021 Host Programmers Model
482 Host address Function Access
483 DSPbase +
484 0-1 Aux Software Status Register (reserved) Read Only
485 2-3 Software Status Register Read Only
486 4-5 Aux Software Control Register (reserved) Read Write
487 6-7 Software Control Register Read Write
488 8-9 Hardware Status Register Read Only
489 A-B Hardware Control Register Read Write
490 C-D Host Transmit (Write) Data Buffer Access Port (buffer input)Write Only
491 E-F Host Recieve (Read) Data Buffer Access Port (buffer input) Read Only
492 ************************************************************************/
493
494 static inline void ixj_read_HSR(IXJ *j)
495 {
496 j->hsr.bytes.low = inb_p(j->DSPbase + 8);
497 j->hsr.bytes.high = inb_p(j->DSPbase + 9);
498 }
499
500 static inline int IsControlReady(IXJ *j)
501 {
502 ixj_read_HSR(j);
503 return j->hsr.bits.controlrdy ? 1 : 0;
504 }
505
506 static inline int IsPCControlReady(IXJ *j)
507 {
508 j->pccr1.byte = inb_p(j->XILINXbase + 3);
509 return j->pccr1.bits.crr ? 1 : 0;
510 }
511
512 static inline int IsStatusReady(IXJ *j)
513 {
514 ixj_read_HSR(j);
515 return j->hsr.bits.statusrdy ? 1 : 0;
516 }
517
518 static inline int IsRxReady(IXJ *j)
519 {
520 ixj_read_HSR(j);
521 ixj_perfmon(j->rxreadycheck);
522 return j->hsr.bits.rxrdy ? 1 : 0;
523 }
524
525 static inline int IsTxReady(IXJ *j)
526 {
527 ixj_read_HSR(j);
528 ixj_perfmon(j->txreadycheck);
529 return j->hsr.bits.txrdy ? 1 : 0;
530 }
531
532 static inline void set_play_volume(IXJ *j, int volume)
533 {
534 if (ixjdebug & 0x0002)
535 printk(KERN_INFO "IXJ: /dev/phone%d Setting Play Volume to 0x%4.4x\n", j->board, volume);
536 ixj_WriteDSPCommand(0xCF02, j);
537 ixj_WriteDSPCommand(volume, j);
538 }
539
540 static int set_play_volume_linear(IXJ *j, int volume)
541 {
542 int newvolume, dspplaymax;
543
544 if (ixjdebug & 0x0002)
545 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Play Volume to 0x%4.4x\n", j->board, volume);
546 if(volume > 100 || volume < 0) {
547 return -1;
548 }
549
550 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
551 switch (j->cardtype) {
552 case QTI_PHONEJACK:
553 dspplaymax = 0x380;
554 break;
555 case QTI_LINEJACK:
556 if(j->port == PORT_PSTN) {
557 dspplaymax = 0x48;
558 } else {
559 dspplaymax = 0x100;
560 }
561 break;
562 case QTI_PHONEJACK_LITE:
563 dspplaymax = 0x380;
564 break;
565 case QTI_PHONEJACK_PCI:
566 dspplaymax = 0x6C;
567 break;
568 case QTI_PHONECARD:
569 dspplaymax = 0x50;
570 break;
571 default:
572 return -1;
573 }
574 newvolume = (dspplaymax * volume) / 100;
575 set_play_volume(j, newvolume);
576 return 0;
577 }
578
579 static inline void set_play_depth(IXJ *j, int depth)
580 {
581 if (depth > 60)
582 depth = 60;
583 if (depth < 0)
584 depth = 0;
585 ixj_WriteDSPCommand(0x5280 + depth, j);
586 }
587
588 static inline int get_play_volume(IXJ *j)
589 {
590 ixj_WriteDSPCommand(0xCF00, j);
591 return j->ssr.high << 8 | j->ssr.low;
592 }
593
594 static int get_play_volume_linear(IXJ *j)
595 {
596 int volume, newvolume, dspplaymax;
597
598 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
599 switch (j->cardtype) {
600 case QTI_PHONEJACK:
601 dspplaymax = 0x380;
602 break;
603 case QTI_LINEJACK:
604 if(j->port == PORT_PSTN) {
605 dspplaymax = 0x48;
606 } else {
607 dspplaymax = 0x100;
608 }
609 break;
610 case QTI_PHONEJACK_LITE:
611 dspplaymax = 0x380;
612 break;
613 case QTI_PHONEJACK_PCI:
614 dspplaymax = 0x6C;
615 break;
616 case QTI_PHONECARD:
617 dspplaymax = 100;
618 break;
619 default:
620 return -1;
621 }
622 volume = get_play_volume(j);
623 newvolume = (volume * 100) / dspplaymax;
624 if(newvolume > 100)
625 newvolume = 100;
626 return newvolume;
627 }
628
629 static inline BYTE SLIC_GetState(IXJ *j)
630 {
631 if (j->cardtype == QTI_PHONECARD) {
632 j->pccr1.byte = 0;
633 j->psccr.bits.dev = 3;
634 j->psccr.bits.rw = 1;
635 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
636 ixj_PCcontrol_wait(j);
637 j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
638 ixj_PCcontrol_wait(j);
639 if (j->pslic.bits.powerdown)
640 return PLD_SLIC_STATE_OC;
641 else if (!j->pslic.bits.ring0 && !j->pslic.bits.ring1)
642 return PLD_SLIC_STATE_ACTIVE;
643 else
644 return PLD_SLIC_STATE_RINGING;
645 } else {
646 j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
647 }
648 return j->pld_slicr.bits.state;
649 }
650
651 static bool SLIC_SetState(BYTE byState, IXJ *j)
652 {
653 bool fRetVal = false;
654
655 if (j->cardtype == QTI_PHONECARD) {
656 if (j->flags.pcmciasct) {
657 switch (byState) {
658 case PLD_SLIC_STATE_TIPOPEN:
659 case PLD_SLIC_STATE_OC:
660 j->pslic.bits.powerdown = 1;
661 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
662 fRetVal = true;
663 break;
664 case PLD_SLIC_STATE_RINGING:
665 if (j->readers || j->writers) {
666 j->pslic.bits.powerdown = 0;
667 j->pslic.bits.ring0 = 1;
668 j->pslic.bits.ring1 = 0;
669 fRetVal = true;
670 }
671 break;
672 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
673
674 case PLD_SLIC_STATE_STANDBY:
675 case PLD_SLIC_STATE_ACTIVE:
676 if (j->readers || j->writers) {
677 j->pslic.bits.powerdown = 0;
678 } else {
679 j->pslic.bits.powerdown = 1;
680 }
681 j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0;
682 fRetVal = true;
683 break;
684 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
685
686 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
687
688 default:
689 fRetVal = false;
690 break;
691 }
692 j->psccr.bits.dev = 3;
693 j->psccr.bits.rw = 0;
694 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
695 ixj_PCcontrol_wait(j);
696 }
697 } else {
698 /* Set the C1, C2, C3 & B2EN signals. */
699 switch (byState) {
700 case PLD_SLIC_STATE_OC:
701 j->pld_slicw.bits.c1 = 0;
702 j->pld_slicw.bits.c2 = 0;
703 j->pld_slicw.bits.c3 = 0;
704 j->pld_slicw.bits.b2en = 0;
705 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
706 fRetVal = true;
707 break;
708 case PLD_SLIC_STATE_RINGING:
709 j->pld_slicw.bits.c1 = 1;
710 j->pld_slicw.bits.c2 = 0;
711 j->pld_slicw.bits.c3 = 0;
712 j->pld_slicw.bits.b2en = 1;
713 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
714 fRetVal = true;
715 break;
716 case PLD_SLIC_STATE_ACTIVE:
717 j->pld_slicw.bits.c1 = 0;
718 j->pld_slicw.bits.c2 = 1;
719 j->pld_slicw.bits.c3 = 0;
720 j->pld_slicw.bits.b2en = 0;
721 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
722 fRetVal = true;
723 break;
724 case PLD_SLIC_STATE_OHT: /* On-hook transmit */
725
726 j->pld_slicw.bits.c1 = 1;
727 j->pld_slicw.bits.c2 = 1;
728 j->pld_slicw.bits.c3 = 0;
729 j->pld_slicw.bits.b2en = 0;
730 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
731 fRetVal = true;
732 break;
733 case PLD_SLIC_STATE_TIPOPEN:
734 j->pld_slicw.bits.c1 = 0;
735 j->pld_slicw.bits.c2 = 0;
736 j->pld_slicw.bits.c3 = 1;
737 j->pld_slicw.bits.b2en = 0;
738 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
739 fRetVal = true;
740 break;
741 case PLD_SLIC_STATE_STANDBY:
742 j->pld_slicw.bits.c1 = 1;
743 j->pld_slicw.bits.c2 = 0;
744 j->pld_slicw.bits.c3 = 1;
745 j->pld_slicw.bits.b2en = 1;
746 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
747 fRetVal = true;
748 break;
749 case PLD_SLIC_STATE_APR: /* Active polarity reversal */
750
751 j->pld_slicw.bits.c1 = 0;
752 j->pld_slicw.bits.c2 = 1;
753 j->pld_slicw.bits.c3 = 1;
754 j->pld_slicw.bits.b2en = 0;
755 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
756 fRetVal = true;
757 break;
758 case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */
759
760 j->pld_slicw.bits.c1 = 1;
761 j->pld_slicw.bits.c2 = 1;
762 j->pld_slicw.bits.c3 = 1;
763 j->pld_slicw.bits.b2en = 0;
764 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
765 fRetVal = true;
766 break;
767 default:
768 fRetVal = false;
769 break;
770 }
771 }
772
773 return fRetVal;
774 }
775
776 static int ixj_wink(IXJ *j)
777 {
778 BYTE slicnow;
779
780 slicnow = SLIC_GetState(j);
781
782 j->pots_winkstart = jiffies;
783 SLIC_SetState(PLD_SLIC_STATE_OC, j);
784
785 msleep(jiffies_to_msecs(j->winktime));
786
787 SLIC_SetState(slicnow, j);
788 return 0;
789 }
790
791 static void ixj_init_timer(IXJ *j)
792 {
793 init_timer(&j->timer);
794 j->timer.function = ixj_timeout;
795 j->timer.data = (unsigned long)j;
796 }
797
798 static void ixj_add_timer(IXJ *j)
799 {
800 j->timer.expires = jiffies + (hertz / samplerate);
801 add_timer(&j->timer);
802 }
803
804 static void ixj_tone_timeout(IXJ *j)
805 {
806 IXJ_TONE ti;
807
808 j->tone_state++;
809 if (j->tone_state == 3) {
810 j->tone_state = 0;
811 if (j->cadence_t) {
812 j->tone_cadence_state++;
813 if (j->tone_cadence_state >= j->cadence_t->elements_used) {
814 switch (j->cadence_t->termination) {
815 case PLAY_ONCE:
816 ixj_cpt_stop(j);
817 break;
818 case REPEAT_LAST_ELEMENT:
819 j->tone_cadence_state--;
820 ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
821 break;
822 case REPEAT_ALL:
823 j->tone_cadence_state = 0;
824 if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
825 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
826 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
827 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
828 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
829 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
830 ixj_init_tone(j, &ti);
831 }
832 ixj_set_tone_on(j->cadence_t->ce[0].tone_on_time, j);
833 ixj_set_tone_off(j->cadence_t->ce[0].tone_off_time, j);
834 ixj_play_tone(j, j->cadence_t->ce[0].index);
835 break;
836 }
837 } else {
838 if (j->cadence_t->ce[j->tone_cadence_state].gain0) {
839 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
840 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
841 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
842 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
843 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
844 ixj_init_tone(j, &ti);
845 }
846 ixj_set_tone_on(j->cadence_t->ce[j->tone_cadence_state].tone_on_time, j);
847 ixj_set_tone_off(j->cadence_t->ce[j->tone_cadence_state].tone_off_time, j);
848 ixj_play_tone(j, j->cadence_t->ce[j->tone_cadence_state].index);
849 }
850 }
851 }
852 }
853
854 static inline void ixj_kill_fasync(IXJ *j, IXJ_SIGEVENT event, int dir)
855 {
856 if(j->ixj_signals[event]) {
857 if(ixjdebug & 0x0100)
858 printk("Sending signal for event %d\n", event);
859 /* Send apps notice of change */
860 /* see config.h for macro definition */
861 kill_fasync(&(j->async_queue), j->ixj_signals[event], dir);
862 }
863 }
864
865 static void ixj_pstn_state(IXJ *j)
866 {
867 int var;
868 union XOPXR0 XR0, daaint;
869
870 var = 10;
871
872 XR0.reg = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg;
873 daaint.reg = 0;
874 XR0.bitreg.RMR = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
875
876 j->pld_scrr.byte = inb_p(j->XILINXbase);
877 if (j->pld_scrr.bits.daaflag) {
878 daa_int_read(j);
879 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.RING) {
880 if(time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
881 daaint.bitreg.RING = 1;
882 if(ixjdebug & 0x0008) {
883 printk(KERN_INFO "IXJ DAA Ring Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
884 }
885 } else {
886 daa_set_mode(j, SOP_PU_RESET);
887 }
888 }
889 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Caller_ID) {
890 daaint.bitreg.Caller_ID = 1;
891 j->pstn_cid_intr = 1;
892 j->pstn_cid_received = jiffies;
893 if(ixjdebug & 0x0008) {
894 printk(KERN_INFO "IXJ DAA Caller_ID Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
895 }
896 }
897 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.Cadence) {
898 daaint.bitreg.Cadence = 1;
899 if(ixjdebug & 0x0008) {
900 printk(KERN_INFO "IXJ DAA Cadence Interrupt /dev/phone%d at %ld\n", j->board, jiffies);
901 }
902 }
903 if(j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK != XR0.bitreg.VDD_OK) {
904 daaint.bitreg.VDD_OK = 1;
905 daaint.bitreg.SI_0 = j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK;
906 }
907 }
908 daa_CR_read(j, 1);
909 if(j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR != XR0.bitreg.RMR && time_after(jiffies, j->pstn_sleeptil) && !(j->flags.pots_pstn && j->hookstate)) {
910 daaint.bitreg.RMR = 1;
911 daaint.bitreg.SI_1 = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.bitreg.RMR;
912 if(ixjdebug & 0x0008) {
913 printk(KERN_INFO "IXJ DAA RMR /dev/phone%d was %s for %ld\n", j->board, XR0.bitreg.RMR?"on":"off", jiffies - j->pstn_last_rmr);
914 }
915 j->pstn_prev_rmr = j->pstn_last_rmr;
916 j->pstn_last_rmr = jiffies;
917 }
918 switch(j->daa_mode) {
919 case SOP_PU_SLEEP:
920 if (daaint.bitreg.RING) {
921 if (!j->flags.pstn_ringing) {
922 if (j->daa_mode != SOP_PU_RINGING) {
923 j->pstn_ring_int = jiffies;
924 daa_set_mode(j, SOP_PU_RINGING);
925 }
926 }
927 }
928 break;
929 case SOP_PU_RINGING:
930 if (daaint.bitreg.RMR) {
931 if (ixjdebug & 0x0008) {
932 printk(KERN_INFO "IXJ Ring Cadence a state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
933 }
934 if (daaint.bitreg.SI_1) { /* Rising edge of RMR */
935 j->flags.pstn_rmr = 1;
936 j->pstn_ring_start = jiffies;
937 j->pstn_ring_stop = 0;
938 j->ex.bits.pstn_ring = 0;
939 if (j->cadence_f[4].state == 0) {
940 j->cadence_f[4].state = 1;
941 j->cadence_f[4].on1min = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 - var)) / 10000);
942 j->cadence_f[4].on1dot = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100)) / 10000);
943 j->cadence_f[4].on1max = jiffies + (long)((j->cadence_f[4].on1 * hertz * (100 + var)) / 10000);
944 } else if (j->cadence_f[4].state == 2) {
945 if((time_after(jiffies, j->cadence_f[4].off1min) &&
946 time_before(jiffies, j->cadence_f[4].off1max))) {
947 if (j->cadence_f[4].on2) {
948 j->cadence_f[4].state = 3;
949 j->cadence_f[4].on2min = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 - var)) / 10000));
950 j->cadence_f[4].on2dot = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100)) / 10000));
951 j->cadence_f[4].on2max = jiffies + (long)((j->cadence_f[4].on2 * (hertz * (100 + var)) / 10000));
952 } else {
953 j->cadence_f[4].state = 7;
954 }
955 } else {
956 if (ixjdebug & 0x0008) {
957 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
958 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
959 j->cadence_f[4].off1);
960 }
961 j->cadence_f[4].state = 0;
962 }
963 } else if (j->cadence_f[4].state == 4) {
964 if((time_after(jiffies, j->cadence_f[4].off2min) &&
965 time_before(jiffies, j->cadence_f[4].off2max))) {
966 if (j->cadence_f[4].on3) {
967 j->cadence_f[4].state = 5;
968 j->cadence_f[4].on3min = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 - var)) / 10000));
969 j->cadence_f[4].on3dot = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100)) / 10000));
970 j->cadence_f[4].on3max = jiffies + (long)((j->cadence_f[4].on3 * (hertz * (100 + var)) / 10000));
971 } else {
972 j->cadence_f[4].state = 7;
973 }
974 } else {
975 if (ixjdebug & 0x0008) {
976 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
977 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
978 j->cadence_f[4].off2);
979 }
980 j->cadence_f[4].state = 0;
981 }
982 } else if (j->cadence_f[4].state == 6) {
983 if((time_after(jiffies, j->cadence_f[4].off3min) &&
984 time_before(jiffies, j->cadence_f[4].off3max))) {
985 j->cadence_f[4].state = 7;
986 } else {
987 if (ixjdebug & 0x0008) {
988 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
989 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
990 j->cadence_f[4].off3);
991 }
992 j->cadence_f[4].state = 0;
993 }
994 } else {
995 j->cadence_f[4].state = 0;
996 }
997 } else { /* Falling edge of RMR */
998 j->pstn_ring_start = 0;
999 j->pstn_ring_stop = jiffies;
1000 if (j->cadence_f[4].state == 1) {
1001 if(!j->cadence_f[4].on1) {
1002 j->cadence_f[4].state = 7;
1003 } else if((time_after(jiffies, j->cadence_f[4].on1min) &&
1004 time_before(jiffies, j->cadence_f[4].on1max))) {
1005 if (j->cadence_f[4].off1) {
1006 j->cadence_f[4].state = 2;
1007 j->cadence_f[4].off1min = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 - var)) / 10000));
1008 j->cadence_f[4].off1dot = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100)) / 10000));
1009 j->cadence_f[4].off1max = jiffies + (long)((j->cadence_f[4].off1 * (hertz * (100 + var)) / 10000));
1010 } else {
1011 j->cadence_f[4].state = 7;
1012 }
1013 } else {
1014 if (ixjdebug & 0x0008) {
1015 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1016 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1017 j->cadence_f[4].on1);
1018 }
1019 j->cadence_f[4].state = 0;
1020 }
1021 } else if (j->cadence_f[4].state == 3) {
1022 if((time_after(jiffies, j->cadence_f[4].on2min) &&
1023 time_before(jiffies, j->cadence_f[4].on2max))) {
1024 if (j->cadence_f[4].off2) {
1025 j->cadence_f[4].state = 4;
1026 j->cadence_f[4].off2min = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 - var)) / 10000));
1027 j->cadence_f[4].off2dot = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100)) / 10000));
1028 j->cadence_f[4].off2max = jiffies + (long)((j->cadence_f[4].off2 * (hertz * (100 + var)) / 10000));
1029 } else {
1030 j->cadence_f[4].state = 7;
1031 }
1032 } else {
1033 if (ixjdebug & 0x0008) {
1034 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1035 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1036 j->cadence_f[4].on2);
1037 }
1038 j->cadence_f[4].state = 0;
1039 }
1040 } else if (j->cadence_f[4].state == 5) {
1041 if((time_after(jiffies, j->cadence_f[4].on3min) &&
1042 time_before(jiffies, j->cadence_f[4].on3max))) {
1043 if (j->cadence_f[4].off3) {
1044 j->cadence_f[4].state = 6;
1045 j->cadence_f[4].off3min = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 - var)) / 10000));
1046 j->cadence_f[4].off3dot = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100)) / 10000));
1047 j->cadence_f[4].off3max = jiffies + (long)((j->cadence_f[4].off3 * (hertz * (100 + var)) / 10000));
1048 } else {
1049 j->cadence_f[4].state = 7;
1050 }
1051 } else {
1052 j->cadence_f[4].state = 0;
1053 }
1054 } else {
1055 if (ixjdebug & 0x0008) {
1056 printk(KERN_INFO "IXJ Ring Cadence fail state = %d /dev/phone%d at %ld should be %d\n",
1057 j->cadence_f[4].state, j->board, jiffies - j->pstn_prev_rmr,
1058 j->cadence_f[4].on3);
1059 }
1060 j->cadence_f[4].state = 0;
1061 }
1062 }
1063 if (ixjdebug & 0x0010) {
1064 printk(KERN_INFO "IXJ Ring Cadence b state = %d /dev/phone%d at %ld\n", j->cadence_f[4].state, j->board, jiffies);
1065 }
1066 if (ixjdebug & 0x0010) {
1067 switch(j->cadence_f[4].state) {
1068 case 1:
1069 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1070 j->cadence_f[4].on1, j->cadence_f[4].on1min, j->cadence_f[4].on1dot, j->cadence_f[4].on1max);
1071 break;
1072 case 2:
1073 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1074 j->cadence_f[4].off1, j->cadence_f[4].off1min, j->cadence_f[4].off1dot, j->cadence_f[4].off1max);
1075 break;
1076 case 3:
1077 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1078 j->cadence_f[4].on2, j->cadence_f[4].on2min, j->cadence_f[4].on2dot, j->cadence_f[4].on2max);
1079 break;
1080 case 4:
1081 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1082 j->cadence_f[4].off2, j->cadence_f[4].off2min, j->cadence_f[4].off2dot, j->cadence_f[4].off2max);
1083 break;
1084 case 5:
1085 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1086 j->cadence_f[4].on3, j->cadence_f[4].on3min, j->cadence_f[4].on3dot, j->cadence_f[4].on3max);
1087 break;
1088 case 6:
1089 printk(KERN_INFO "IXJ /dev/phone%d Next Ring Cadence state at %u min %ld - %ld - max %ld\n", j->board,
1090 j->cadence_f[4].off3, j->cadence_f[4].off3min, j->cadence_f[4].off3dot, j->cadence_f[4].off3max);
1091 break;
1092 }
1093 }
1094 }
1095 if (j->cadence_f[4].state == 7) {
1096 j->cadence_f[4].state = 0;
1097 j->pstn_ring_stop = jiffies;
1098 j->ex.bits.pstn_ring = 1;
1099 ixj_kill_fasync(j, SIG_PSTN_RING, POLL_IN);
1100 if(ixjdebug & 0x0008) {
1101 printk(KERN_INFO "IXJ Ring int set /dev/phone%d at %ld\n", j->board, jiffies);
1102 }
1103 }
1104 if((j->pstn_ring_int != 0 && time_after(jiffies, j->pstn_ring_int + (hertz * 5)) && !j->flags.pstn_rmr) ||
1105 (j->pstn_ring_stop != 0 && time_after(jiffies, j->pstn_ring_stop + (hertz * 5)))) {
1106 if(ixjdebug & 0x0008) {
1107 printk("IXJ DAA no ring in 5 seconds /dev/phone%d at %ld\n", j->board, jiffies);
1108 printk("IXJ DAA pstn ring int /dev/phone%d at %ld\n", j->board, j->pstn_ring_int);
1109 printk("IXJ DAA pstn ring stop /dev/phone%d at %ld\n", j->board, j->pstn_ring_stop);
1110 }
1111 j->pstn_ring_stop = j->pstn_ring_int = 0;
1112 daa_set_mode(j, SOP_PU_SLEEP);
1113 }
1114 outb_p(j->pld_scrw.byte, j->XILINXbase);
1115 if (j->pstn_cid_intr && time_after(jiffies, j->pstn_cid_received + hertz)) {
1116 ixj_daa_cid_read(j);
1117 j->ex.bits.caller_id = 1;
1118 ixj_kill_fasync(j, SIG_CALLER_ID, POLL_IN);
1119 j->pstn_cid_intr = 0;
1120 }
1121 if (daaint.bitreg.Cadence) {
1122 if(ixjdebug & 0x0008) {
1123 printk("IXJ DAA Cadence interrupt going to sleep /dev/phone%d\n", j->board);
1124 }
1125 daa_set_mode(j, SOP_PU_SLEEP);
1126 j->ex.bits.pstn_ring = 0;
1127 }
1128 break;
1129 case SOP_PU_CONVERSATION:
1130 if (daaint.bitreg.VDD_OK) {
1131 if(!daaint.bitreg.SI_0) {
1132 if (!j->pstn_winkstart) {
1133 if(ixjdebug & 0x0008) {
1134 printk("IXJ DAA possible wink /dev/phone%d %ld\n", j->board, jiffies);
1135 }
1136 j->pstn_winkstart = jiffies;
1137 }
1138 } else {
1139 if (j->pstn_winkstart) {
1140 if(ixjdebug & 0x0008) {
1141 printk("IXJ DAA possible wink end /dev/phone%d %ld\n", j->board, jiffies);
1142 }
1143 j->pstn_winkstart = 0;
1144 }
1145 }
1146 }
1147 if (j->pstn_winkstart && time_after(jiffies, j->pstn_winkstart + ((hertz * j->winktime) / 1000))) {
1148 if(ixjdebug & 0x0008) {
1149 printk("IXJ DAA wink detected going to sleep /dev/phone%d %ld\n", j->board, jiffies);
1150 }
1151 daa_set_mode(j, SOP_PU_SLEEP);
1152 j->pstn_winkstart = 0;
1153 j->ex.bits.pstn_wink = 1;
1154 ixj_kill_fasync(j, SIG_PSTN_WINK, POLL_IN);
1155 }
1156 break;
1157 }
1158 }
1159
1160 static void ixj_timeout(unsigned long ptr)
1161 {
1162 int board;
1163 unsigned long jifon;
1164 IXJ *j = (IXJ *)ptr;
1165 board = j->board;
1166
1167 if (j->DSPbase && atomic_read(&j->DSPWrite) == 0 && test_and_set_bit(board, (void *)&j->busyflags) == 0) {
1168 ixj_perfmon(j->timerchecks);
1169 j->hookstate = ixj_hookstate(j);
1170 if (j->tone_state) {
1171 if (!(j->hookstate)) {
1172 ixj_cpt_stop(j);
1173 if (j->m_hook) {
1174 j->m_hook = 0;
1175 j->ex.bits.hookstate = 1;
1176 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1177 }
1178 clear_bit(board, &j->busyflags);
1179 ixj_add_timer(j);
1180 return;
1181 }
1182 if (j->tone_state == 1)
1183 jifon = ((hertz * j->tone_on_time) * 25 / 100000);
1184 else
1185 jifon = ((hertz * j->tone_on_time) * 25 / 100000) + ((hertz * j->tone_off_time) * 25 / 100000);
1186 if (time_before(jiffies, j->tone_start_jif + jifon)) {
1187 if (j->tone_state == 1) {
1188 ixj_play_tone(j, j->tone_index);
1189 if (j->dsp.low == 0x20) {
1190 clear_bit(board, &j->busyflags);
1191 ixj_add_timer(j);
1192 return;
1193 }
1194 } else {
1195 ixj_play_tone(j, 0);
1196 if (j->dsp.low == 0x20) {
1197 clear_bit(board, &j->busyflags);
1198 ixj_add_timer(j);
1199 return;
1200 }
1201 }
1202 } else {
1203 ixj_tone_timeout(j);
1204 if (j->flags.dialtone) {
1205 ixj_dialtone(j);
1206 }
1207 if (j->flags.busytone) {
1208 ixj_busytone(j);
1209 if (j->dsp.low == 0x20) {
1210 clear_bit(board, &j->busyflags);
1211 ixj_add_timer(j);
1212 return;
1213 }
1214 }
1215 if (j->flags.ringback) {
1216 ixj_ringback(j);
1217 if (j->dsp.low == 0x20) {
1218 clear_bit(board, &j->busyflags);
1219 ixj_add_timer(j);
1220 return;
1221 }
1222 }
1223 if (!j->tone_state) {
1224 ixj_cpt_stop(j);
1225 }
1226 }
1227 }
1228 if (!(j->tone_state && j->dsp.low == 0x20)) {
1229 if (IsRxReady(j)) {
1230 ixj_read_frame(j);
1231 }
1232 if (IsTxReady(j)) {
1233 ixj_write_frame(j);
1234 }
1235 }
1236 if (j->flags.cringing) {
1237 if (j->hookstate & 1) {
1238 j->flags.cringing = 0;
1239 ixj_ring_off(j);
1240 } else if(j->cadence_f[5].enable && ((!j->cadence_f[5].en_filter) || (j->cadence_f[5].en_filter && j->flags.firstring))) {
1241 switch(j->cadence_f[5].state) {
1242 case 0:
1243 j->cadence_f[5].on1dot = jiffies + (long)((j->cadence_f[5].on1 * (hertz * 100) / 10000));
1244 if (time_before(jiffies, j->cadence_f[5].on1dot)) {
1245 if(ixjdebug & 0x0004) {
1246 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1247 }
1248 ixj_ring_on(j);
1249 }
1250 j->cadence_f[5].state = 1;
1251 break;
1252 case 1:
1253 if (time_after(jiffies, j->cadence_f[5].on1dot)) {
1254 j->cadence_f[5].off1dot = jiffies + (long)((j->cadence_f[5].off1 * (hertz * 100) / 10000));
1255 if(ixjdebug & 0x0004) {
1256 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1257 }
1258 ixj_ring_off(j);
1259 j->cadence_f[5].state = 2;
1260 }
1261 break;
1262 case 2:
1263 if (time_after(jiffies, j->cadence_f[5].off1dot)) {
1264 if(ixjdebug & 0x0004) {
1265 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1266 }
1267 ixj_ring_on(j);
1268 if (j->cadence_f[5].on2) {
1269 j->cadence_f[5].on2dot = jiffies + (long)((j->cadence_f[5].on2 * (hertz * 100) / 10000));
1270 j->cadence_f[5].state = 3;
1271 } else {
1272 j->cadence_f[5].state = 7;
1273 }
1274 }
1275 break;
1276 case 3:
1277 if (time_after(jiffies, j->cadence_f[5].on2dot)) {
1278 if(ixjdebug & 0x0004) {
1279 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1280 }
1281 ixj_ring_off(j);
1282 if (j->cadence_f[5].off2) {
1283 j->cadence_f[5].off2dot = jiffies + (long)((j->cadence_f[5].off2 * (hertz * 100) / 10000));
1284 j->cadence_f[5].state = 4;
1285 } else {
1286 j->cadence_f[5].state = 7;
1287 }
1288 }
1289 break;
1290 case 4:
1291 if (time_after(jiffies, j->cadence_f[5].off2dot)) {
1292 if(ixjdebug & 0x0004) {
1293 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1294 }
1295 ixj_ring_on(j);
1296 if (j->cadence_f[5].on3) {
1297 j->cadence_f[5].on3dot = jiffies + (long)((j->cadence_f[5].on3 * (hertz * 100) / 10000));
1298 j->cadence_f[5].state = 5;
1299 } else {
1300 j->cadence_f[5].state = 7;
1301 }
1302 }
1303 break;
1304 case 5:
1305 if (time_after(jiffies, j->cadence_f[5].on3dot)) {
1306 if(ixjdebug & 0x0004) {
1307 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1308 }
1309 ixj_ring_off(j);
1310 if (j->cadence_f[5].off3) {
1311 j->cadence_f[5].off3dot = jiffies + (long)((j->cadence_f[5].off3 * (hertz * 100) / 10000));
1312 j->cadence_f[5].state = 6;
1313 } else {
1314 j->cadence_f[5].state = 7;
1315 }
1316 }
1317 break;
1318 case 6:
1319 if (time_after(jiffies, j->cadence_f[5].off3dot)) {
1320 if(ixjdebug & 0x0004) {
1321 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1322 }
1323 j->cadence_f[5].state = 7;
1324 }
1325 break;
1326 case 7:
1327 if(ixjdebug & 0x0004) {
1328 printk("Ringing cadence state = %d - %ld\n", j->cadence_f[5].state, jiffies);
1329 }
1330 j->flags.cidring = 1;
1331 j->cadence_f[5].state = 0;
1332 break;
1333 }
1334 if (j->flags.cidring && !j->flags.cidsent) {
1335 j->flags.cidsent = 1;
1336 if(j->fskdcnt) {
1337 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1338 ixj_pre_cid(j);
1339 }
1340 j->flags.cidring = 0;
1341 }
1342 clear_bit(board, &j->busyflags);
1343 ixj_add_timer(j);
1344 return;
1345 } else {
1346 if (time_after(jiffies, j->ring_cadence_jif + (hertz / 2))) {
1347 if (j->flags.cidring && !j->flags.cidsent) {
1348 j->flags.cidsent = 1;
1349 if(j->fskdcnt) {
1350 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
1351 ixj_pre_cid(j);
1352 }
1353 j->flags.cidring = 0;
1354 }
1355 j->ring_cadence_t--;
1356 if (j->ring_cadence_t == -1)
1357 j->ring_cadence_t = 15;
1358 j->ring_cadence_jif = jiffies;
1359
1360 if (j->ring_cadence & 1 << j->ring_cadence_t) {
1361 if(j->flags.cidsent && j->cadence_f[5].en_filter)
1362 j->flags.firstring = 1;
1363 else
1364 ixj_ring_on(j);
1365 } else {
1366 ixj_ring_off(j);
1367 if(!j->flags.cidsent)
1368 j->flags.cidring = 1;
1369 }
1370 }
1371 clear_bit(board, &j->busyflags);
1372 ixj_add_timer(j);
1373 return;
1374 }
1375 }
1376 if (!j->flags.ringing) {
1377 if (j->hookstate) { /* & 1) { */
1378 if (j->dsp.low != 0x20 &&
1379 SLIC_GetState(j) != PLD_SLIC_STATE_ACTIVE) {
1380 SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1381 }
1382 LineMonitor(j);
1383 read_filters(j);
1384 ixj_WriteDSPCommand(0x511B, j);
1385 j->proc_load = j->ssr.high << 8 | j->ssr.low;
1386 if (!j->m_hook && (j->hookstate & 1)) {
1387 j->m_hook = j->ex.bits.hookstate = 1;
1388 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1389 }
1390 } else {
1391 if (j->ex.bits.dtmf_ready) {
1392 j->dtmf_wp = j->dtmf_rp = j->ex.bits.dtmf_ready = 0;
1393 }
1394 if (j->m_hook) {
1395 j->m_hook = 0;
1396 j->ex.bits.hookstate = 1;
1397 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1398 }
1399 }
1400 }
1401 if (j->cardtype == QTI_LINEJACK && !j->flags.pstncheck && j->flags.pstn_present) {
1402 ixj_pstn_state(j);
1403 }
1404 if (j->ex.bytes) {
1405 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
1406 }
1407 clear_bit(board, &j->busyflags);
1408 }
1409 ixj_add_timer(j);
1410 }
1411
1412 static int ixj_status_wait(IXJ *j)
1413 {
1414 unsigned long jif;
1415
1416 jif = jiffies + ((60 * hertz) / 100);
1417 while (!IsStatusReady(j)) {
1418 ixj_perfmon(j->statuswait);
1419 if (time_after(jiffies, jif)) {
1420 ixj_perfmon(j->statuswaitfail);
1421 return -1;
1422 }
1423 }
1424 return 0;
1425 }
1426
1427 static int ixj_PCcontrol_wait(IXJ *j)
1428 {
1429 unsigned long jif;
1430
1431 jif = jiffies + ((60 * hertz) / 100);
1432 while (!IsPCControlReady(j)) {
1433 ixj_perfmon(j->pcontrolwait);
1434 if (time_after(jiffies, jif)) {
1435 ixj_perfmon(j->pcontrolwaitfail);
1436 return -1;
1437 }
1438 }
1439 return 0;
1440 }
1441
1442 static int ixj_WriteDSPCommand(unsigned short cmd, IXJ *j)
1443 {
1444 BYTES bytes;
1445 unsigned long jif;
1446
1447 atomic_inc(&j->DSPWrite);
1448 if(atomic_read(&j->DSPWrite) > 1) {
1449 printk("IXJ %d DSP write overlap attempting command 0x%4.4x\n", j->board, cmd);
1450 return -1;
1451 }
1452 bytes.high = (cmd & 0xFF00) >> 8;
1453 bytes.low = cmd & 0x00FF;
1454 jif = jiffies + ((60 * hertz) / 100);
1455 while (!IsControlReady(j)) {
1456 ixj_perfmon(j->iscontrolready);
1457 if (time_after(jiffies, jif)) {
1458 ixj_perfmon(j->iscontrolreadyfail);
1459 atomic_dec(&j->DSPWrite);
1460 if(atomic_read(&j->DSPWrite) > 0) {
1461 printk("IXJ %d DSP overlaped command 0x%4.4x during control ready failure.\n", j->board, cmd);
1462 while(atomic_read(&j->DSPWrite) > 0) {
1463 atomic_dec(&j->DSPWrite);
1464 }
1465 }
1466 return -1;
1467 }
1468 }
1469 outb(bytes.low, j->DSPbase + 6);
1470 outb(bytes.high, j->DSPbase + 7);
1471
1472 if (ixj_status_wait(j)) {
1473 j->ssr.low = 0xFF;
1474 j->ssr.high = 0xFF;
1475 atomic_dec(&j->DSPWrite);
1476 if(atomic_read(&j->DSPWrite) > 0) {
1477 printk("IXJ %d DSP overlaped command 0x%4.4x during status wait failure.\n", j->board, cmd);
1478 while(atomic_read(&j->DSPWrite) > 0) {
1479 atomic_dec(&j->DSPWrite);
1480 }
1481 }
1482 return -1;
1483 }
1484 /* Read Software Status Register */
1485 j->ssr.low = inb_p(j->DSPbase + 2);
1486 j->ssr.high = inb_p(j->DSPbase + 3);
1487 atomic_dec(&j->DSPWrite);
1488 if(atomic_read(&j->DSPWrite) > 0) {
1489 printk("IXJ %d DSP overlaped command 0x%4.4x\n", j->board, cmd);
1490 while(atomic_read(&j->DSPWrite) > 0) {
1491 atomic_dec(&j->DSPWrite);
1492 }
1493 }
1494 return 0;
1495 }
1496
1497 /***************************************************************************
1498 *
1499 * General Purpose IO Register read routine
1500 *
1501 ***************************************************************************/
1502 static inline int ixj_gpio_read(IXJ *j)
1503 {
1504 if (ixj_WriteDSPCommand(0x5143, j))
1505 return -1;
1506
1507 j->gpio.bytes.low = j->ssr.low;
1508 j->gpio.bytes.high = j->ssr.high;
1509
1510 return 0;
1511 }
1512
1513 static inline void LED_SetState(int state, IXJ *j)
1514 {
1515 if (j->cardtype == QTI_LINEJACK) {
1516 j->pld_scrw.bits.led1 = state & 0x1 ? 1 : 0;
1517 j->pld_scrw.bits.led2 = state & 0x2 ? 1 : 0;
1518 j->pld_scrw.bits.led3 = state & 0x4 ? 1 : 0;
1519 j->pld_scrw.bits.led4 = state & 0x8 ? 1 : 0;
1520
1521 outb(j->pld_scrw.byte, j->XILINXbase);
1522 }
1523 }
1524
1525 /*********************************************************************
1526 * GPIO Pins are configured as follows on the Quicknet Internet
1527 * PhoneJACK Telephony Cards
1528 *
1529 * POTS Select GPIO_6=0 GPIO_7=0
1530 * Mic/Speaker Select GPIO_6=0 GPIO_7=1
1531 * Handset Select GPIO_6=1 GPIO_7=0
1532 *
1533 * SLIC Active GPIO_1=0 GPIO_2=1 GPIO_5=0
1534 * SLIC Ringing GPIO_1=1 GPIO_2=1 GPIO_5=0
1535 * SLIC Open Circuit GPIO_1=0 GPIO_2=0 GPIO_5=0
1536 *
1537 * Hook Switch changes reported on GPIO_3
1538 *********************************************************************/
1539 static int ixj_set_port(IXJ *j, int arg)
1540 {
1541 if (j->cardtype == QTI_PHONEJACK_LITE) {
1542 if (arg != PORT_POTS)
1543 return 10;
1544 else
1545 return 0;
1546 }
1547 switch (arg) {
1548 case PORT_POTS:
1549 j->port = PORT_POTS;
1550 switch (j->cardtype) {
1551 case QTI_PHONECARD:
1552 if (j->flags.pcmciasct == 1)
1553 SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j);
1554 else
1555 return 11;
1556 break;
1557 case QTI_PHONEJACK_PCI:
1558 j->pld_slicw.pcib.mic = 0;
1559 j->pld_slicw.pcib.spk = 0;
1560 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1561 break;
1562 case QTI_LINEJACK:
1563 ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
1564 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
1565 Software Control Register */
1566 return 2;
1567 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
1568
1569 outb(j->pld_scrw.byte, j->XILINXbase);
1570 j->pld_clock.byte = 0;
1571 outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1572 j->pld_slicw.bits.rly1 = 1;
1573 j->pld_slicw.bits.spken = 0;
1574 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1575 ixj_mixer(0x1200, j); /* Turn Off MIC switch on mixer left */
1576 ixj_mixer(0x1401, j); /* Turn On Mono1 switch on mixer left */
1577 ixj_mixer(0x1300, j); /* Turn Off MIC switch on mixer right */
1578 ixj_mixer(0x1501, j); /* Turn On Mono1 switch on mixer right */
1579 ixj_mixer(0x0E80, j); /*Mic mute */
1580 ixj_mixer(0x0F00, j); /* Set mono out (SLIC) to 0dB */
1581 ixj_mixer(0x0080, j); /* Mute Master Left volume */
1582 ixj_mixer(0x0180, j); /* Mute Master Right volume */
1583 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
1584 /* SLIC_SetState(PLD_SLIC_STATE_ACTIVE, j); */
1585 break;
1586 case QTI_PHONEJACK:
1587 j->gpio.bytes.high = 0x0B;
1588 j->gpio.bits.gpio6 = 0;
1589 j->gpio.bits.gpio7 = 0;
1590 ixj_WriteDSPCommand(j->gpio.word, j);
1591 break;
1592 }
1593 break;
1594 case PORT_PSTN:
1595 if (j->cardtype == QTI_LINEJACK) {
1596 ixj_WriteDSPCommand(0xC534, j); /* Write CODEC config to Software Control Register */
1597
1598 j->pld_slicw.bits.rly3 = 0;
1599 j->pld_slicw.bits.rly1 = 1;
1600 j->pld_slicw.bits.spken = 0;
1601 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1602 j->port = PORT_PSTN;
1603 } else {
1604 return 4;
1605 }
1606 break;
1607 case PORT_SPEAKER:
1608 j->port = PORT_SPEAKER;
1609 switch (j->cardtype) {
1610 case QTI_PHONECARD:
1611 if (j->flags.pcmciasct) {
1612 SLIC_SetState(PLD_SLIC_STATE_OC, j);
1613 }
1614 break;
1615 case QTI_PHONEJACK_PCI:
1616 j->pld_slicw.pcib.mic = 1;
1617 j->pld_slicw.pcib.spk = 1;
1618 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1619 break;
1620 case QTI_LINEJACK:
1621 ixj_set_pots(j, 0); /* Disconnect POTS/PSTN relay */
1622 if (ixj_WriteDSPCommand(0xC528, j)) /* Write CODEC config to
1623 Software Control Register */
1624 return 2;
1625 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
1626
1627 outb(j->pld_scrw.byte, j->XILINXbase);
1628 j->pld_clock.byte = 0;
1629 outb(j->pld_clock.byte, j->XILINXbase + 0x04);
1630 j->pld_slicw.bits.rly1 = 1;
1631 j->pld_slicw.bits.spken = 1;
1632 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1633 ixj_mixer(0x1201, j); /* Turn On MIC switch on mixer left */
1634 ixj_mixer(0x1400, j); /* Turn Off Mono1 switch on mixer left */
1635 ixj_mixer(0x1301, j); /* Turn On MIC switch on mixer right */
1636 ixj_mixer(0x1500, j); /* Turn Off Mono1 switch on mixer right */
1637 ixj_mixer(0x0E06, j); /*Mic un-mute 0dB */
1638 ixj_mixer(0x0F80, j); /* Mute mono out (SLIC) */
1639 ixj_mixer(0x0000, j); /* Set Master Left volume to 0dB */
1640 ixj_mixer(0x0100, j); /* Set Master Right volume to 0dB */
1641 break;
1642 case QTI_PHONEJACK:
1643 j->gpio.bytes.high = 0x0B;
1644 j->gpio.bits.gpio6 = 0;
1645 j->gpio.bits.gpio7 = 1;
1646 ixj_WriteDSPCommand(j->gpio.word, j);
1647 break;
1648 }
1649 break;
1650 case PORT_HANDSET:
1651 if (j->cardtype != QTI_PHONEJACK) {
1652 return 5;
1653 } else {
1654 j->gpio.bytes.high = 0x0B;
1655 j->gpio.bits.gpio6 = 1;
1656 j->gpio.bits.gpio7 = 0;
1657 ixj_WriteDSPCommand(j->gpio.word, j);
1658 j->port = PORT_HANDSET;
1659 }
1660 break;
1661 default:
1662 return 6;
1663 break;
1664 }
1665 return 0;
1666 }
1667
1668 static int ixj_set_pots(IXJ *j, int arg)
1669 {
1670 if (j->cardtype == QTI_LINEJACK) {
1671 if (arg) {
1672 if (j->port == PORT_PSTN) {
1673 j->pld_slicw.bits.rly1 = 0;
1674 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1675 j->flags.pots_pstn = 1;
1676 return 1;
1677 } else {
1678 j->flags.pots_pstn = 0;
1679 return 0;
1680 }
1681 } else {
1682 j->pld_slicw.bits.rly1 = 1;
1683 outb(j->pld_slicw.byte, j->XILINXbase + 0x01);
1684 j->flags.pots_pstn = 0;
1685 return 1;
1686 }
1687 } else {
1688 return 0;
1689 }
1690 }
1691
1692 static void ixj_ring_on(IXJ *j)
1693 {
1694 if (j->dsp.low == 0x20) /* Internet PhoneJACK */
1695 {
1696 if (ixjdebug & 0x0004)
1697 printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
1698
1699 j->gpio.bytes.high = 0x0B;
1700 j->gpio.bytes.low = 0x00;
1701 j->gpio.bits.gpio1 = 1;
1702 j->gpio.bits.gpio2 = 1;
1703 j->gpio.bits.gpio5 = 0;
1704 ixj_WriteDSPCommand(j->gpio.word, j); /* send the ring signal */
1705 } else /* Internet LineJACK, Internet PhoneJACK Lite or Internet PhoneJACK PCI */
1706 {
1707 if (ixjdebug & 0x0004)
1708 printk(KERN_INFO "IXJ Ring On /dev/phone%d\n", j->board);
1709
1710 SLIC_SetState(PLD_SLIC_STATE_RINGING, j);
1711 }
1712 }
1713
1714 static int ixj_siadc(IXJ *j, int val)
1715 {
1716 if(j->cardtype == QTI_PHONECARD){
1717 if(j->flags.pcmciascp){
1718 if(val == -1)
1719 return j->siadc.bits.rxg;
1720
1721 if(val < 0 || val > 0x1F)
1722 return -1;
1723
1724 j->siadc.bits.hom = 0; /* Handset Out Mute */
1725 j->siadc.bits.lom = 0; /* Line Out Mute */
1726 j->siadc.bits.rxg = val; /*(0xC000 - 0x41C8) / 0x4EF; RX PGA Gain */
1727 j->psccr.bits.addr = 6; /* R/W Smart Cable Register Address */
1728 j->psccr.bits.rw = 0; /* Read / Write flag */
1729 j->psccr.bits.dev = 0;
1730 outb(j->siadc.byte, j->XILINXbase + 0x00);
1731 outb(j->psccr.byte, j->XILINXbase + 0x01);
1732 ixj_PCcontrol_wait(j);
1733 return j->siadc.bits.rxg;
1734 }
1735 }
1736 return -1;
1737 }
1738
1739 static int ixj_sidac(IXJ *j, int val)
1740 {
1741 if(j->cardtype == QTI_PHONECARD){
1742 if(j->flags.pcmciascp){
1743 if(val == -1)
1744 return j->sidac.bits.txg;
1745
1746 if(val < 0 || val > 0x1F)
1747 return -1;
1748
1749 j->sidac.bits.srm = 1; /* Speaker Right Mute */
1750 j->sidac.bits.slm = 1; /* Speaker Left Mute */
1751 j->sidac.bits.txg = val; /* (0xC000 - 0x45E4) / 0x5D3; TX PGA Gain */
1752 j->psccr.bits.addr = 7; /* R/W Smart Cable Register Address */
1753 j->psccr.bits.rw = 0; /* Read / Write flag */
1754 j->psccr.bits.dev = 0;
1755 outb(j->sidac.byte, j->XILINXbase + 0x00);
1756 outb(j->psccr.byte, j->XILINXbase + 0x01);
1757 ixj_PCcontrol_wait(j);
1758 return j->sidac.bits.txg;
1759 }
1760 }
1761 return -1;
1762 }
1763
1764 static int ixj_pcmcia_cable_check(IXJ *j)
1765 {
1766 j->pccr1.byte = inb_p(j->XILINXbase + 0x03);
1767 if (!j->flags.pcmciastate) {
1768 j->pccr2.byte = inb_p(j->XILINXbase + 0x02);
1769 if (j->pccr1.bits.drf || j->pccr2.bits.rstc) {
1770 j->flags.pcmciastate = 4;
1771 return 0;
1772 }
1773 if (j->pccr1.bits.ed) {
1774 j->pccr1.bits.ed = 0;
1775 j->psccr.bits.dev = 3;
1776 j->psccr.bits.rw = 1;
1777 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
1778 ixj_PCcontrol_wait(j);
1779 j->pslic.byte = inw_p(j->XILINXbase + 0x00) & 0xFF;
1780 j->pslic.bits.led2 = j->pslic.bits.det ? 1 : 0;
1781 j->psccr.bits.dev = 3;
1782 j->psccr.bits.rw = 0;
1783 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1784 ixj_PCcontrol_wait(j);
1785 return j->pslic.bits.led2 ? 1 : 0;
1786 } else if (j->flags.pcmciasct) {
1787 return j->r_hook;
1788 } else {
1789 return 1;
1790 }
1791 } else if (j->flags.pcmciastate == 4) {
1792 if (!j->pccr1.bits.drf) {
1793 j->flags.pcmciastate = 3;
1794 }
1795 return 0;
1796 } else if (j->flags.pcmciastate == 3) {
1797 j->pccr2.bits.pwr = 0;
1798 j->pccr2.bits.rstc = 1;
1799 outb(j->pccr2.byte, j->XILINXbase + 0x02);
1800 j->checkwait = jiffies + (hertz * 2);
1801 j->flags.incheck = 1;
1802 j->flags.pcmciastate = 2;
1803 return 0;
1804 } else if (j->flags.pcmciastate == 2) {
1805 if (j->flags.incheck) {
1806 if (time_before(jiffies, j->checkwait)) {
1807 return 0;
1808 } else {
1809 j->flags.incheck = 0;
1810 }
1811 }
1812 j->pccr2.bits.pwr = 0;
1813 j->pccr2.bits.rstc = 0;
1814 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1815 j->flags.pcmciastate = 1;
1816 return 0;
1817 } else if (j->flags.pcmciastate == 1) {
1818 j->flags.pcmciastate = 0;
1819 if (!j->pccr1.bits.drf) {
1820 j->psccr.bits.dev = 3;
1821 j->psccr.bits.rw = 1;
1822 outb_p(j->psccr.byte, j->XILINXbase + 0x01);
1823 ixj_PCcontrol_wait(j);
1824 j->flags.pcmciascp = 1; /* Set Cable Present Flag */
1825
1826 j->flags.pcmciasct = (inw_p(j->XILINXbase + 0x00) >> 8) & 0x03; /* Get Cable Type */
1827
1828 if (j->flags.pcmciasct == 3) {
1829 j->flags.pcmciastate = 4;
1830 return 0;
1831 } else if (j->flags.pcmciasct == 0) {
1832 j->pccr2.bits.pwr = 1;
1833 j->pccr2.bits.rstc = 0;
1834 outb_p(j->pccr2.byte, j->XILINXbase + 0x02);
1835 j->port = PORT_SPEAKER;
1836 } else {
1837 j->port = PORT_POTS;
1838 }
1839 j->sic1.bits.cpd = 0; /* Chip Power Down */
1840 j->sic1.bits.mpd = 0; /* MIC Bias Power Down */
1841 j->sic1.bits.hpd = 0; /* Handset Bias Power Down */
1842 j->sic1.bits.lpd = 0; /* Line Bias Power Down */
1843 j->sic1.bits.spd = 1; /* Speaker Drive Power Down */
1844 j->psccr.bits.addr = 1; /* R/W Smart Cable Register Address */
1845 j->psccr.bits.rw = 0; /* Read / Write flag */
1846 j->psccr.bits.dev = 0;
1847 outb(j->sic1.byte, j->XILINXbase + 0x00);
1848 outb(j->psccr.byte, j->XILINXbase + 0x01);
1849 ixj_PCcontrol_wait(j);
1850
1851 j->sic2.bits.al = 0; /* Analog Loopback DAC analog -> ADC analog */
1852 j->sic2.bits.dl2 = 0; /* Digital Loopback DAC -> ADC one bit */
1853 j->sic2.bits.dl1 = 0; /* Digital Loopback ADC -> DAC one bit */
1854 j->sic2.bits.pll = 0; /* 1 = div 10, 0 = div 5 */
1855 j->sic2.bits.hpd = 0; /* HPF disable */
1856 j->psccr.bits.addr = 2; /* R/W Smart Cable Register Address */
1857 j->psccr.bits.rw = 0; /* Read / Write flag */
1858 j->psccr.bits.dev = 0;
1859 outb(j->sic2.byte, j->XILINXbase + 0x00);
1860 outb(j->psccr.byte, j->XILINXbase + 0x01);
1861 ixj_PCcontrol_wait(j);
1862
1863 j->psccr.bits.addr = 3; /* R/W Smart Cable Register Address */
1864 j->psccr.bits.rw = 0; /* Read / Write flag */
1865 j->psccr.bits.dev = 0;
1866 outb(0x00, j->XILINXbase + 0x00); /* PLL Divide N1 */
1867 outb(j->psccr.byte, j->XILINXbase + 0x01);
1868 ixj_PCcontrol_wait(j);
1869
1870 j->psccr.bits.addr = 4; /* R/W Smart Cable Register Address */
1871 j->psccr.bits.rw = 0; /* Read / Write flag */
1872 j->psccr.bits.dev = 0;
1873 outb(0x09, j->XILINXbase + 0x00); /* PLL Multiply M1 */
1874 outb(j->psccr.byte, j->XILINXbase + 0x01);
1875 ixj_PCcontrol_wait(j);
1876
1877 j->sirxg.bits.lig = 1; /* Line In Gain */
1878 j->sirxg.bits.lim = 1; /* Line In Mute */
1879 j->sirxg.bits.mcg = 0; /* MIC In Gain was 3 */
1880 j->sirxg.bits.mcm = 0; /* MIC In Mute */
1881 j->sirxg.bits.him = 0; /* Handset In Mute */
1882 j->sirxg.bits.iir = 1; /* IIR */
1883 j->psccr.bits.addr = 5; /* R/W Smart Cable Register Address */
1884 j->psccr.bits.rw = 0; /* Read / Write flag */
1885 j->psccr.bits.dev = 0;
1886 outb(j->sirxg.byte, j->XILINXbase + 0x00);
1887 outb(j->psccr.byte, j->XILINXbase + 0x01);
1888 ixj_PCcontrol_wait(j);
1889
1890 ixj_siadc(j, 0x17);
1891 ixj_sidac(j, 0x1D);
1892
1893 j->siaatt.bits.sot = 0;
1894 j->psccr.bits.addr = 9; /* R/W Smart Cable Register Address */
1895 j->psccr.bits.rw = 0; /* Read / Write flag */
1896 j->psccr.bits.dev = 0;
1897 outb(j->siaatt.byte, j->XILINXbase + 0x00);
1898 outb(j->psccr.byte, j->XILINXbase + 0x01);
1899 ixj_PCcontrol_wait(j);
1900
1901 if (j->flags.pcmciasct == 1 && !j->readers && !j->writers) {
1902 j->psccr.byte = j->pslic.byte = 0;
1903 j->pslic.bits.powerdown = 1;
1904 j->psccr.bits.dev = 3;
1905 j->psccr.bits.rw = 0;
1906 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1907 ixj_PCcontrol_wait(j);
1908 }
1909 }
1910 return 0;
1911 } else {
1912 j->flags.pcmciascp = 0;
1913 return 0;
1914 }
1915 return 0;
1916 }
1917
1918 static int ixj_hookstate(IXJ *j)
1919 {
1920 int fOffHook = 0;
1921
1922 switch (j->cardtype) {
1923 case QTI_PHONEJACK:
1924 ixj_gpio_read(j);
1925 fOffHook = j->gpio.bits.gpio3read ? 1 : 0;
1926 break;
1927 case QTI_LINEJACK:
1928 case QTI_PHONEJACK_LITE:
1929 case QTI_PHONEJACK_PCI:
1930 SLIC_GetState(j);
1931 if(j->cardtype == QTI_LINEJACK && j->flags.pots_pstn == 1 && (j->readers || j->writers)) {
1932 fOffHook = j->pld_slicr.bits.potspstn ? 1 : 0;
1933 if(fOffHook != j->p_hook) {
1934 if(!j->checkwait) {
1935 j->checkwait = jiffies;
1936 }
1937 if(time_before(jiffies, j->checkwait + 2)) {
1938 fOffHook ^= 1;
1939 } else {
1940 j->checkwait = 0;
1941 }
1942 j->p_hook = fOffHook;
1943 printk("IXJ : /dev/phone%d pots-pstn hookstate check %d at %ld\n", j->board, fOffHook, jiffies);
1944 }
1945 } else {
1946 if (j->pld_slicr.bits.state == PLD_SLIC_STATE_ACTIVE ||
1947 j->pld_slicr.bits.state == PLD_SLIC_STATE_STANDBY) {
1948 if (j->flags.ringing || j->flags.cringing) {
1949 if (!in_interrupt()) {
1950 msleep(20);
1951 }
1952 SLIC_GetState(j);
1953 if (j->pld_slicr.bits.state == PLD_SLIC_STATE_RINGING) {
1954 ixj_ring_on(j);
1955 }
1956 }
1957 if (j->cardtype == QTI_PHONEJACK_PCI) {
1958 j->pld_scrr.byte = inb_p(j->XILINXbase);
1959 fOffHook = j->pld_scrr.pcib.det ? 1 : 0;
1960 } else
1961 fOffHook = j->pld_slicr.bits.det ? 1 : 0;
1962 }
1963 }
1964 break;
1965 case QTI_PHONECARD:
1966 fOffHook = ixj_pcmcia_cable_check(j);
1967 break;
1968 }
1969 if (j->r_hook != fOffHook) {
1970 j->r_hook = fOffHook;
1971 if (j->port == PORT_SPEAKER || j->port == PORT_HANDSET) { // || (j->port == PORT_PSTN && j->flags.pots_pstn == 0)) {
1972 j->ex.bits.hookstate = 1;
1973 ixj_kill_fasync(j, SIG_HOOKSTATE, POLL_IN);
1974 } else if (!fOffHook) {
1975 j->flash_end = jiffies + ((60 * hertz) / 100);
1976 }
1977 }
1978 if (fOffHook) {
1979 if(time_before(jiffies, j->flash_end)) {
1980 j->ex.bits.flash = 1;
1981 j->flash_end = 0;
1982 ixj_kill_fasync(j, SIG_FLASH, POLL_IN);
1983 }
1984 } else {
1985 if(time_before(jiffies, j->flash_end)) {
1986 fOffHook = 1;
1987 }
1988 }
1989
1990 if (j->port == PORT_PSTN && j->daa_mode == SOP_PU_CONVERSATION)
1991 fOffHook |= 2;
1992
1993 if (j->port == PORT_SPEAKER) {
1994 if(j->cardtype == QTI_PHONECARD) {
1995 if(j->flags.pcmciascp && j->flags.pcmciasct) {
1996 fOffHook |= 2;
1997 }
1998 } else {
1999 fOffHook |= 2;
2000 }
2001 }
2002
2003 if (j->port == PORT_HANDSET)
2004 fOffHook |= 2;
2005
2006 return fOffHook;
2007 }
2008
2009 static void ixj_ring_off(IXJ *j)
2010 {
2011 if (j->dsp.low == 0x20) /* Internet PhoneJACK */
2012 {
2013 if (ixjdebug & 0x0004)
2014 printk(KERN_INFO "IXJ Ring Off\n");
2015 j->gpio.bytes.high = 0x0B;
2016 j->gpio.bytes.low = 0x00;
2017 j->gpio.bits.gpio1 = 0;
2018 j->gpio.bits.gpio2 = 1;
2019 j->gpio.bits.gpio5 = 0;
2020 ixj_WriteDSPCommand(j->gpio.word, j);
2021 } else /* Internet LineJACK */
2022 {
2023 if (ixjdebug & 0x0004)
2024 printk(KERN_INFO "IXJ Ring Off\n");
2025
2026 if(!j->flags.cidplay)
2027 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
2028
2029 SLIC_GetState(j);
2030 }
2031 }
2032
2033 static void ixj_ring_start(IXJ *j)
2034 {
2035 j->flags.cringing = 1;
2036 if (ixjdebug & 0x0004)
2037 printk(KERN_INFO "IXJ Cadence Ringing Start /dev/phone%d\n", j->board);
2038 if (ixj_hookstate(j) & 1) {
2039 if (j->port == PORT_POTS)
2040 ixj_ring_off(j);
2041 j->flags.cringing = 0;
2042 if (ixjdebug & 0x0004)
2043 printk(KERN_INFO "IXJ Cadence Ringing Stopped /dev/phone%d off hook\n", j->board);
2044 } else if(j->cadence_f[5].enable && (!j->cadence_f[5].en_filter)) {
2045 j->ring_cadence_jif = jiffies;
2046 j->flags.cidsent = j->flags.cidring = 0;
2047 j->cadence_f[5].state = 0;
2048 if(j->cadence_f[5].on1)
2049 ixj_ring_on(j);
2050 } else {
2051 j->ring_cadence_jif = jiffies;
2052 j->ring_cadence_t = 15;
2053 if (j->ring_cadence & 1 << j->ring_cadence_t) {
2054 ixj_ring_on(j);
2055 } else {
2056 ixj_ring_off(j);
2057 }
2058 j->flags.cidsent = j->flags.cidring = j->flags.firstring = 0;
2059 }
2060 }
2061
2062 static int ixj_ring(IXJ *j)
2063 {
2064 char cntr;
2065 unsigned long jif;
2066
2067 j->flags.ringing = 1;
2068 if (ixj_hookstate(j) & 1) {
2069 ixj_ring_off(j);
2070 j->flags.ringing = 0;
2071 return 1;
2072 }
2073 for (cntr = 0; cntr < j->maxrings; cntr++) {
2074 jif = jiffies + (1 * hertz);
2075 ixj_ring_on(j);
2076 while (time_before(jiffies, jif)) {
2077 if (ixj_hookstate(j) & 1) {
2078 ixj_ring_off(j);
2079 j->flags.ringing = 0;
2080 return 1;
2081 }
2082 schedule_timeout_interruptible(1);
2083 if (signal_pending(current))
2084 break;
2085 }
2086 jif = jiffies + (3 * hertz);
2087 ixj_ring_off(j);
2088 while (time_before(jiffies, jif)) {
2089 if (ixj_hookstate(j) & 1) {
2090 msleep(10);
2091 if (ixj_hookstate(j) & 1) {
2092 j->flags.ringing = 0;
2093 return 1;
2094 }
2095 }
2096 schedule_timeout_interruptible(1);
2097 if (signal_pending(current))
2098 break;
2099 }
2100 }
2101 ixj_ring_off(j);
2102 j->flags.ringing = 0;
2103 return 0;
2104 }
2105
2106 static int ixj_open(struct phone_device *p, struct file *file_p)
2107 {
2108 IXJ *j = get_ixj(p->board);
2109 file_p->private_data = j;
2110
2111 if (!j->DSPbase)
2112 return -ENODEV;
2113
2114 if (file_p->f_mode & FMODE_READ) {
2115 if(!j->readers) {
2116 j->readers++;
2117 } else {
2118 return -EBUSY;
2119 }
2120 }
2121
2122 if (file_p->f_mode & FMODE_WRITE) {
2123 if(!j->writers) {
2124 j->writers++;
2125 } else {
2126 if (file_p->f_mode & FMODE_READ){
2127 j->readers--;
2128 }
2129 return -EBUSY;
2130 }
2131 }
2132
2133 if (j->cardtype == QTI_PHONECARD) {
2134 j->pslic.bits.powerdown = 0;
2135 j->psccr.bits.dev = 3;
2136 j->psccr.bits.rw = 0;
2137 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
2138 ixj_PCcontrol_wait(j);
2139 }
2140
2141 j->flags.cidplay = 0;
2142 j->flags.cidcw_ack = 0;
2143
2144 if (ixjdebug & 0x0002)
2145 printk(KERN_INFO "Opening board %d\n", p->board);
2146
2147 j->framesread = j->frameswritten = 0;
2148 return 0;
2149 }
2150
2151 static int ixj_release(struct inode *inode, struct file *file_p)
2152 {
2153 IXJ_TONE ti;
2154 int cnt;
2155 IXJ *j = file_p->private_data;
2156 int board = j->p.board;
2157
2158 /*
2159 * Set up locks to ensure that only one process is talking to the DSP at a time.
2160 * This is necessary to keep the DSP from locking up.
2161 */
2162 while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
2163 schedule_timeout_interruptible(1);
2164 if (ixjdebug & 0x0002)
2165 printk(KERN_INFO "Closing board %d\n", NUM(inode));
2166
2167 if (j->cardtype == QTI_PHONECARD)
2168 ixj_set_port(j, PORT_SPEAKER);
2169 else
2170 ixj_set_port(j, PORT_POTS);
2171
2172 aec_stop(j);
2173 ixj_play_stop(j);
2174 ixj_record_stop(j);
2175 set_play_volume(j, 0x100);
2176 set_rec_volume(j, 0x100);
2177 ixj_ring_off(j);
2178
2179 /* Restore the tone table to default settings. */
2180 ti.tone_index = 10;
2181 ti.gain0 = 1;
2182 ti.freq0 = hz941;
2183 ti.gain1 = 0;
2184 ti.freq1 = hz1209;
2185 ixj_init_tone(j, &ti);
2186 ti.tone_index = 11;
2187 ti.gain0 = 1;
2188 ti.freq0 = hz941;
2189 ti.gain1 = 0;
2190 ti.freq1 = hz1336;
2191 ixj_init_tone(j, &ti);
2192 ti.tone_index = 12;
2193 ti.gain0 = 1;
2194 ti.freq0 = hz941;
2195 ti.gain1 = 0;
2196 ti.freq1 = hz1477;
2197 ixj_init_tone(j, &ti);
2198 ti.tone_index = 13;
2199 ti.gain0 = 1;
2200 ti.freq0 = hz800;
2201 ti.gain1 = 0;
2202 ti.freq1 = 0;
2203 ixj_init_tone(j, &ti);
2204 ti.tone_index = 14;
2205 ti.gain0 = 1;
2206 ti.freq0 = hz1000;
2207 ti.gain1 = 0;
2208 ti.freq1 = 0;
2209 ixj_init_tone(j, &ti);
2210 ti.tone_index = 15;
2211 ti.gain0 = 1;
2212 ti.freq0 = hz1250;
2213 ti.gain1 = 0;
2214 ti.freq1 = 0;
2215 ixj_init_tone(j, &ti);
2216 ti.tone_index = 16;
2217 ti.gain0 = 1;
2218 ti.freq0 = hz950;
2219 ti.gain1 = 0;
2220 ti.freq1 = 0;
2221 ixj_init_tone(j, &ti);
2222 ti.tone_index = 17;
2223 ti.gain0 = 1;
2224 ti.freq0 = hz1100;
2225 ti.gain1 = 0;
2226 ti.freq1 = 0;
2227 ixj_init_tone(j, &ti);
2228 ti.tone_index = 18;
2229 ti.gain0 = 1;
2230 ti.freq0 = hz1400;
2231 ti.gain1 = 0;
2232 ti.freq1 = 0;
2233 ixj_init_tone(j, &ti);
2234 ti.tone_index = 19;
2235 ti.gain0 = 1;
2236 ti.freq0 = hz1500;
2237 ti.gain1 = 0;
2238 ti.freq1 = 0;
2239 ixj_init_tone(j, &ti);
2240 ti.tone_index = 20;
2241 ti.gain0 = 1;
2242 ti.freq0 = hz1600;
2243 ti.gain1 = 0;
2244 ti.freq1 = 0;
2245 ixj_init_tone(j, &ti);
2246 ti.tone_index = 21;
2247 ti.gain0 = 1;
2248 ti.freq0 = hz1800;
2249 ti.gain1 = 0;
2250 ti.freq1 = 0;
2251 ixj_init_tone(j, &ti);
2252 ti.tone_index = 22;
2253 ti.gain0 = 1;
2254 ti.freq0 = hz2100;
2255 ti.gain1 = 0;
2256 ti.freq1 = 0;
2257 ixj_init_tone(j, &ti);
2258 ti.tone_index = 23;
2259 ti.gain0 = 1;
2260 ti.freq0 = hz1300;
2261 ti.gain1 = 0;
2262 ti.freq1 = 0;
2263 ixj_init_tone(j, &ti);
2264 ti.tone_index = 24;
2265 ti.gain0 = 1;
2266 ti.freq0 = hz2450;
2267 ti.gain1 = 0;
2268 ti.freq1 = 0;
2269 ixj_init_tone(j, &ti);
2270 ti.tone_index = 25;
2271 ti.gain0 = 1;
2272 ti.freq0 = hz350;
2273 ti.gain1 = 0;
2274 ti.freq1 = hz440;
2275 ixj_init_tone(j, &ti);
2276 ti.tone_index = 26;
2277 ti.gain0 = 1;
2278 ti.freq0 = hz440;
2279 ti.gain1 = 0;
2280 ti.freq1 = hz480;
2281 ixj_init_tone(j, &ti);
2282 ti.tone_index = 27;
2283 ti.gain0 = 1;
2284 ti.freq0 = hz480;
2285 ti.gain1 = 0;
2286 ti.freq1 = hz620;
2287 ixj_init_tone(j, &ti);
2288
2289 set_rec_depth(j, 2); /* Set Record Channel Limit to 2 frames */
2290
2291 set_play_depth(j, 2); /* Set Playback Channel Limit to 2 frames */
2292
2293 j->ex.bits.dtmf_ready = 0;
2294 j->dtmf_state = 0;
2295 j->dtmf_wp = j->dtmf_rp = 0;
2296 j->rec_mode = j->play_mode = -1;
2297 j->flags.ringing = 0;
2298 j->maxrings = MAXRINGS;
2299 j->ring_cadence = USA_RING_CADENCE;
2300 if(j->cadence_f[5].enable) {
2301 j->cadence_f[5].enable = j->cadence_f[5].en_filter = j->cadence_f[5].state = 0;
2302 }
2303 j->drybuffer = 0;
2304 j->winktime = 320;
2305 j->flags.dtmf_oob = 0;
2306 for (cnt = 0; cnt < 4; cnt++)
2307 j->cadence_f[cnt].enable = 0;
2308
2309 idle(j);
2310
2311 if(j->cardtype == QTI_PHONECARD) {
2312 SLIC_SetState(PLD_SLIC_STATE_OC, j);
2313 }
2314
2315 if (file_p->f_mode & FMODE_READ)
2316 j->readers--;
2317 if (file_p->f_mode & FMODE_WRITE)
2318 j->writers--;
2319
2320 if (j->read_buffer && !j->readers) {
2321 kfree(j->read_buffer);
2322 j->read_buffer = NULL;
2323 j->read_buffer_size = 0;
2324 }
2325 if (j->write_buffer && !j->writers) {
2326 kfree(j->write_buffer);
2327 j->write_buffer = NULL;
2328 j->write_buffer_size = 0;
2329 }
2330 j->rec_codec = j->play_codec = 0;
2331 j->rec_frame_size = j->play_frame_size = 0;
2332 j->flags.cidsent = j->flags.cidring = 0;
2333 ixj_fasync(-1, file_p, 0); /* remove from list of async notification */
2334
2335 if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) {
2336 ixj_set_port(j, PORT_PSTN);
2337 daa_set_mode(j, SOP_PU_SLEEP);
2338 ixj_set_pots(j, 1);
2339 }
2340 ixj_WriteDSPCommand(0x0FE3, j); /* Put the DSP in 1/5 power mode. */
2341
2342 /* Set up the default signals for events */
2343 for (cnt = 0; cnt < 35; cnt++)
2344 j->ixj_signals[cnt] = SIGIO;
2345
2346 /* Set the excetion signal enable flags */
2347 j->ex_sig.bits.dtmf_ready = j->ex_sig.bits.hookstate = j->ex_sig.bits.flash = j->ex_sig.bits.pstn_ring =
2348 j->ex_sig.bits.caller_id = j->ex_sig.bits.pstn_wink = j->ex_sig.bits.f0 = j->ex_sig.bits.f1 = j->ex_sig.bits.f2 =
2349 j->ex_sig.bits.f3 = j->ex_sig.bits.fc0 = j->ex_sig.bits.fc1 = j->ex_sig.bits.fc2 = j->ex_sig.bits.fc3 = 1;
2350
2351 file_p->private_data = NULL;
2352 clear_bit(board, &j->busyflags);
2353 return 0;
2354 }
2355
2356 static int read_filters(IXJ *j)
2357 {
2358 unsigned short fc, cnt, trg;
2359 int var;
2360
2361 trg = 0;
2362 if (ixj_WriteDSPCommand(0x5144, j)) {
2363 if(ixjdebug & 0x0001) {
2364 printk(KERN_INFO "Read Frame Counter failed!\n");
2365 }
2366 return -1;
2367 }
2368 fc = j->ssr.high << 8 | j->ssr.low;
2369 if (fc == j->frame_count)
2370 return 1;
2371
2372 j->frame_count = fc;
2373
2374 if (j->dtmf_proc)
2375 return 1;
2376
2377 var = 10;
2378
2379 for (cnt = 0; cnt < 4; cnt++) {
2380 if (ixj_WriteDSPCommand(0x5154 + cnt, j)) {
2381 if(ixjdebug & 0x0001) {
2382 printk(KERN_INFO "Select Filter %d failed!\n", cnt);
2383 }
2384 return -1;
2385 }
2386 if (ixj_WriteDSPCommand(0x515C, j)) {
2387 if(ixjdebug & 0x0001) {
2388 printk(KERN_INFO "Read Filter History %d failed!\n", cnt);
2389 }
2390 return -1;
2391 }
2392 j->filter_hist[cnt] = j->ssr.high << 8 | j->ssr.low;
2393
2394 if (j->cadence_f[cnt].enable) {
2395 if (j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) {
2396 if (j->cadence_f[cnt].state == 0) {
2397 j->cadence_f[cnt].state = 1;
2398 j->cadence_f[cnt].on1min = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 - var)) / 10000));
2399 j->cadence_f[cnt].on1dot = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100)) / 10000));
2400 j->cadence_f[cnt].on1max = jiffies + (long)((j->cadence_f[cnt].on1 * (hertz * (100 + var)) / 10000));
2401 } else if (j->cadence_f[cnt].state == 2 &&
2402 (time_after(jiffies, j->cadence_f[cnt].off1min) &&
2403 time_before(jiffies, j->cadence_f[cnt].off1max))) {
2404 if (j->cadence_f[cnt].on2) {
2405 j->cadence_f[cnt].state = 3;
2406 j->cadence_f[cnt].on2min = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 - var)) / 10000));
2407 j->cadence_f[cnt].on2dot = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100)) / 10000));
2408 j->cadence_f[cnt].on2max = jiffies + (long)((j->cadence_f[cnt].on2 * (hertz * (100 + var)) / 10000));
2409 } else {
2410 j->cadence_f[cnt].state = 7;
2411 }
2412 } else if (j->cadence_f[cnt].state == 4 &&
2413 (time_after(jiffies, j->cadence_f[cnt].off2min) &&
2414 time_before(jiffies, j->cadence_f[cnt].off2max))) {
2415 if (j->cadence_f[cnt].on3) {
2416 j->cadence_f[cnt].state = 5;
2417 j->cadence_f[cnt].on3min = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 - var)) / 10000));
2418 j->cadence_f[cnt].on3dot = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100)) / 10000));
2419 j->cadence_f[cnt].on3max = jiffies + (long)((j->cadence_f[cnt].on3 * (hertz * (100 + var)) / 10000));
2420 } else {
2421 j->cadence_f[cnt].state = 7;
2422 }
2423 } else {
2424 j->cadence_f[cnt].state = 0;
2425 }
2426 } else if (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)) {
2427 if (j->cadence_f[cnt].state == 1) {
2428 if(!j->cadence_f[cnt].on1) {
2429 j->cadence_f[cnt].state = 7;
2430 } else if((time_after(jiffies, j->cadence_f[cnt].on1min) &&
2431 time_before(jiffies, j->cadence_f[cnt].on1max))) {
2432 if(j->cadence_f[cnt].off1) {
2433 j->cadence_f[cnt].state = 2;
2434 j->cadence_f[cnt].off1min = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 - var)) / 10000));
2435 j->cadence_f[cnt].off1dot = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100)) / 10000));
2436 j->cadence_f[cnt].off1max = jiffies + (long)((j->cadence_f[cnt].off1 * (hertz * (100 + var)) / 10000));
2437 } else {
2438 j->cadence_f[cnt].state = 7;
2439 }
2440 } else {
2441 j->cadence_f[cnt].state = 0;
2442 }
2443 } else if (j->cadence_f[cnt].state == 3) {
2444 if((time_after(jiffies, j->cadence_f[cnt].on2min) &&
2445 time_before(jiffies, j->cadence_f[cnt].on2max))) {
2446 if(j->cadence_f[cnt].off2) {
2447 j->cadence_f[cnt].state = 4;
2448 j->cadence_f[cnt].off2min = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 - var)) / 10000));
2449 j->cadence_f[cnt].off2dot = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100)) / 10000));
2450 j->cadence_f[cnt].off2max = jiffies + (long)((j->cadence_f[cnt].off2 * (hertz * (100 + var)) / 10000));
2451 } else {
2452 j->cadence_f[cnt].state = 7;
2453 }
2454 } else {
2455 j->cadence_f[cnt].state = 0;
2456 }
2457 } else if (j->cadence_f[cnt].state == 5) {
2458 if ((time_after(jiffies, j->cadence_f[cnt].on3min) &&
2459 time_before(jiffies, j->cadence_f[cnt].on3max))) {
2460 if(j->cadence_f[cnt].off3) {
2461 j->cadence_f[cnt].state = 6;
2462 j->cadence_f[cnt].off3min = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 - var)) / 10000));
2463 j->cadence_f[cnt].off3dot = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100)) / 10000));
2464 j->cadence_f[cnt].off3max = jiffies + (long)((j->cadence_f[cnt].off3 * (hertz * (100 + var)) / 10000));
2465 } else {
2466 j->cadence_f[cnt].state = 7;
2467 }
2468 } else {
2469 j->cadence_f[cnt].state = 0;
2470 }
2471 } else {
2472 j->cadence_f[cnt].state = 0;
2473 }
2474 } else {
2475 switch(j->cadence_f[cnt].state) {
2476 case 1:
2477 if(time_after(jiffies, j->cadence_f[cnt].on1dot) &&
2478 !j->cadence_f[cnt].off1 &&
2479 !j->cadence_f[cnt].on2 && !j->cadence_f[cnt].off2 &&
2480 !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2481 j->cadence_f[cnt].state = 7;
2482 }
2483 break;
2484 case 3:
2485 if(time_after(jiffies, j->cadence_f[cnt].on2dot) &&
2486 !j->cadence_f[cnt].off2 &&
2487 !j->cadence_f[cnt].on3 && !j->cadence_f[cnt].off3) {
2488 j->cadence_f[cnt].state = 7;
2489 }
2490 break;
2491 case 5:
2492 if(time_after(jiffies, j->cadence_f[cnt].on3dot) &&
2493 !j->cadence_f[cnt].off3) {
2494 j->cadence_f[cnt].state = 7;
2495 }
2496 break;
2497 }
2498 }
2499
2500 if (ixjdebug & 0x0040) {
2501 printk(KERN_INFO "IXJ Tone Cadence state = %d /dev/phone%d at %ld\n", j->cadence_f[cnt].state, j->board, jiffies);
2502 switch(j->cadence_f[cnt].state) {
2503 case 0:
2504 printk(KERN_INFO "IXJ /dev/phone%d No Tone detected\n", j->board);
2505 break;
2506 case 1:
2507 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %u %ld - %ld - %ld\n", j->board,
2508 j->cadence_f[cnt].on1, j->cadence_f[cnt].on1min, j->cadence_f[cnt].on1dot, j->cadence_f[cnt].on1max);
2509 break;
2510 case 2:
2511 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off1min,
2512 j->cadence_f[cnt].off1max);
2513 break;
2514 case 3:
2515 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on2min,
2516 j->cadence_f[cnt].on2max);
2517 break;
2518 case 4:
2519 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off2min,
2520 j->cadence_f[cnt].off2max);
2521 break;
2522 case 5:
2523 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].on3min,
2524 j->cadence_f[cnt].on3max);
2525 break;
2526 case 6:
2527 printk(KERN_INFO "IXJ /dev/phone%d Next Tone Cadence state at %ld - %ld\n", j->board, j->cadence_f[cnt].off3min,
2528 j->cadence_f[cnt].off3max);
2529 break;
2530 }
2531 }
2532 }
2533 if (j->cadence_f[cnt].state == 7) {
2534 j->cadence_f[cnt].state = 0;
2535 if (j->cadence_f[cnt].enable == 1)
2536 j->cadence_f[cnt].enable = 0;
2537 switch (cnt) {
2538 case 0:
2539 if(ixjdebug & 0x0020) {
2540 printk(KERN_INFO "Filter Cadence 0 triggered %ld\n", jiffies);
2541 }
2542 j->ex.bits.fc0 = 1;
2543 ixj_kill_fasync(j, SIG_FC0, POLL_IN);
2544 break;
2545 case 1:
2546 if(ixjdebug & 0x0020) {
2547 printk(KERN_INFO "Filter Cadence 1 triggered %ld\n", jiffies);
2548 }
2549 j->ex.bits.fc1 = 1;
2550 ixj_kill_fasync(j, SIG_FC1, POLL_IN);
2551 break;
2552 case 2:
2553 if(ixjdebug & 0x0020) {
2554 printk(KERN_INFO "Filter Cadence 2 triggered %ld\n", jiffies);
2555 }
2556 j->ex.bits.fc2 = 1;
2557 ixj_kill_fasync(j, SIG_FC2, POLL_IN);
2558 break;
2559 case 3:
2560 if(ixjdebug & 0x0020) {
2561 printk(KERN_INFO "Filter Cadence 3 triggered %ld\n", jiffies);
2562 }
2563 j->ex.bits.fc3 = 1;
2564 ixj_kill_fasync(j, SIG_FC3, POLL_IN);
2565 break;
2566 }
2567 }
2568 if (j->filter_en[cnt] && ((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12)) ||
2569 (j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3)))) {
2570 if((j->filter_hist[cnt] & 3 && !(j->filter_hist[cnt] & 12))) {
2571 trg = 1;
2572 } else if((j->filter_hist[cnt] & 12 && !(j->filter_hist[cnt] & 3))) {
2573 trg = 0;
2574 }
2575 switch (cnt) {
2576 case 0:
2577 if(ixjdebug & 0x0020) {
2578 printk(KERN_INFO "Filter 0 triggered %d at %ld\n", trg, jiffies);
2579 }
2580 j->ex.bits.f0 = 1;
2581 ixj_kill_fasync(j, SIG_F0, POLL_IN);
2582 break;
2583 case 1:
2584 if(ixjdebug & 0x0020) {
2585 printk(KERN_INFO "Filter 1 triggered %d at %ld\n", trg, jiffies);
2586 }
2587 j->ex.bits.f1 = 1;
2588 ixj_kill_fasync(j, SIG_F1, POLL_IN);
2589 break;
2590 case 2:
2591 if(ixjdebug & 0x0020) {
2592 printk(KERN_INFO "Filter 2 triggered %d at %ld\n", trg, jiffies);
2593 }
2594 j->ex.bits.f2 = 1;
2595 ixj_kill_fasync(j, SIG_F2, POLL_IN);
2596 break;
2597 case 3:
2598 if(ixjdebug & 0x0020) {
2599 printk(KERN_INFO "Filter 3 triggered %d at %ld\n", trg, jiffies);
2600 }
2601 j->ex.bits.f3 = 1;
2602 ixj_kill_fasync(j, SIG_F3, POLL_IN);
2603 break;
2604 }
2605 }
2606 }
2607 return 0;
2608 }
2609
2610 static int LineMonitor(IXJ *j)
2611 {
2612 if (j->dtmf_proc) {
2613 return -1;
2614 }
2615 j->dtmf_proc = 1;
2616
2617 if (ixj_WriteDSPCommand(0x7000, j)) /* Line Monitor */
2618 return -1;
2619
2620 j->dtmf.bytes.high = j->ssr.high;
2621 j->dtmf.bytes.low = j->ssr.low;
2622 if (!j->dtmf_state && j->dtmf.bits.dtmf_valid) {
2623 j->dtmf_state = 1;
2624 j->dtmf_current = j->dtmf.bits.digit;
2625 }
2626 if (j->dtmf_state && !j->dtmf.bits.dtmf_valid) /* && j->dtmf_wp != j->dtmf_rp) */
2627 {
2628 if(!j->cidcw_wait) {
2629 j->dtmfbuffer[j->dtmf_wp] = j->dtmf_current;
2630 j->dtmf_wp++;
2631 if (j->dtmf_wp == 79)
2632 j->dtmf_wp = 0;
2633 j->ex.bits.dtmf_ready = 1;
2634 if(j->ex_sig.bits.dtmf_ready) {
2635 ixj_kill_fasync(j, SIG_DTMF_READY, POLL_IN);
2636 }
2637 }
2638 else if(j->dtmf_current == 0x00 || j->dtmf_current == 0x0D) {
2639 if(ixjdebug & 0x0020) {
2640 printk("IXJ phone%d saw CIDCW Ack DTMF %d from display at %ld\n", j->board, j->dtmf_current, jiffies);
2641 }
2642 j->flags.cidcw_ack = 1;
2643 }
2644 j->dtmf_state = 0;
2645 }
2646 j->dtmf_proc = 0;
2647
2648 return 0;
2649 }
2650
2651 /************************************************************************
2652 *
2653 * Functions to allow alaw <-> ulaw conversions.
2654 *
2655 ************************************************************************/
2656
2657 static void ulaw2alaw(unsigned char *buff, unsigned long len)
2658 {
2659 static unsigned char table_ulaw2alaw[] =
2660 {
2661 0x2A, 0x2B, 0x28, 0x29, 0x2E, 0x2F, 0x2C, 0x2D,
2662 0x22, 0x23, 0x20, 0x21, 0x26, 0x27, 0x24, 0x25,
2663 0x3A, 0x3B, 0x38, 0x39, 0x3E, 0x3F, 0x3C, 0x3D,
2664 0x32, 0x33, 0x30, 0x31, 0x36, 0x37, 0x34, 0x35,
2665 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D, 0x02,
2666 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 0x1A,
2667 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D, 0x12,
2668 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15, 0x6B,
2669 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D, 0x62, 0x63,
2670 0x60, 0x61, 0x66, 0x67, 0x64, 0x65, 0x7B, 0x79,
2671 0x7E, 0x7F, 0x7C, 0x7D, 0x72, 0x73, 0x70, 0x71,
2672 0x76, 0x77, 0x74, 0x75, 0x4B, 0x49, 0x4F, 0x4D,
2673 0x42, 0x43, 0x40, 0x41, 0x46, 0x47, 0x44, 0x45,
2674 0x5A, 0x5B, 0x58, 0x59, 0x5E, 0x5F, 0x5C, 0x5D,
2675 0x52, 0x52, 0x53, 0x53, 0x50, 0x50, 0x51, 0x51,
2676 0x56, 0x56, 0x57, 0x57, 0x54, 0x54, 0x55, 0xD5,
2677 0xAA, 0xAB, 0xA8, 0xA9, 0xAE, 0xAF, 0xAC, 0xAD,
2678 0xA2, 0xA3, 0xA0, 0xA1, 0xA6, 0xA7, 0xA4, 0xA5,
2679 0xBA, 0xBB, 0xB8, 0xB9, 0xBE, 0xBF, 0xBC, 0xBD,
2680 0xB2, 0xB3, 0xB0, 0xB1, 0xB6, 0xB7, 0xB4, 0xB5,
2681 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D, 0x82,
2682 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85, 0x9A,
2683 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D, 0x92,
2684 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95, 0xEB,
2685 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED, 0xE2, 0xE3,
2686 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5, 0xFB, 0xF9,
2687 0xFE, 0xFF, 0xFC, 0xFD, 0xF2, 0xF3, 0xF0, 0xF1,
2688 0xF6, 0xF7, 0xF4, 0xF5, 0xCB, 0xC9, 0xCF, 0xCD,
2689 0xC2, 0xC3, 0xC0, 0xC1, 0xC6, 0xC7, 0xC4, 0xC5,
2690 0xDA, 0xDB, 0xD8, 0xD9, 0xDE, 0xDF, 0xDC, 0xDD,
2691 0xD2, 0xD2, 0xD3, 0xD3, 0xD0, 0xD0, 0xD1, 0xD1,
2692 0xD6, 0xD6, 0xD7, 0xD7, 0xD4, 0xD4, 0xD5, 0xD5
2693 };
2694
2695 while (len--)
2696 {
2697 *buff = table_ulaw2alaw[*(unsigned char *)buff];
2698 buff++;
2699 }
2700 }
2701
2702 static void alaw2ulaw(unsigned char *buff, unsigned long len)
2703 {
2704 static unsigned char table_alaw2ulaw[] =
2705 {
2706 0x29, 0x2A, 0x27, 0x28, 0x2D, 0x2E, 0x2B, 0x2C,
2707 0x21, 0x22, 0x1F, 0x20, 0x25, 0x26, 0x23, 0x24,
2708 0x39, 0x3A, 0x37, 0x38, 0x3D, 0x3E, 0x3B, 0x3C,
2709 0x31, 0x32, 0x2F, 0x30, 0x35, 0x36, 0x33, 0x34,
2710 0x0A, 0x0B, 0x08, 0x09, 0x0E, 0x0F, 0x0C, 0x0D,
2711 0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05,
2712 0x1A, 0x1B, 0x18, 0x19, 0x1E, 0x1F, 0x1C, 0x1D,
2713 0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15,
2714 0x62, 0x63, 0x60, 0x61, 0x66, 0x67, 0x64, 0x65,
2715 0x5D, 0x5D, 0x5C, 0x5C, 0x5F, 0x5F, 0x5E, 0x5E,
2716 0x74, 0x76, 0x70, 0x72, 0x7C, 0x7E, 0x78, 0x7A,
2717 0x6A, 0x6B, 0x68, 0x69, 0x6E, 0x6F, 0x6C, 0x6D,
2718 0x48, 0x49, 0x46, 0x47, 0x4C, 0x4D, 0x4A, 0x4B,
2719 0x40, 0x41, 0x3F, 0x3F, 0x44, 0x45, 0x42, 0x43,
2720 0x56, 0x57, 0x54, 0x55, 0x5A, 0x5B, 0x58, 0x59,
2721 0x4F, 0x4F, 0x4E, 0x4E, 0x52, 0x53, 0x50, 0x51,
2722 0xA9, 0xAA, 0xA7, 0xA8, 0xAD, 0xAE, 0xAB, 0xAC,
2723 0xA1, 0xA2, 0x9F, 0xA0, 0xA5, 0xA6, 0xA3, 0xA4,
2724 0xB9, 0xBA, 0xB7, 0xB8, 0xBD, 0xBE, 0xBB, 0xBC,
2725 0xB1, 0xB2, 0xAF, 0xB0, 0xB5, 0xB6, 0xB3, 0xB4,
2726 0x8A, 0x8B, 0x88, 0x89, 0x8E, 0x8F, 0x8C, 0x8D,
2727 0x82, 0x83, 0x80, 0x81, 0x86, 0x87, 0x84, 0x85,
2728 0x9A, 0x9B, 0x98, 0x99, 0x9E, 0x9F, 0x9C, 0x9D,
2729 0x92, 0x93, 0x90, 0x91, 0x96, 0x97, 0x94, 0x95,
2730 0xE2, 0xE3, 0xE0, 0xE1, 0xE6, 0xE7, 0xE4, 0xE5,
2731 0xDD, 0xDD, 0xDC, 0xDC, 0xDF, 0xDF, 0xDE, 0xDE,
2732 0xF4, 0xF6, 0xF0, 0xF2, 0xFC, 0xFE, 0xF8, 0xFA,
2733 0xEA, 0xEB, 0xE8, 0xE9, 0xEE, 0xEF, 0xEC, 0xED,
2734 0xC8, 0xC9, 0xC6, 0xC7, 0xCC, 0xCD, 0xCA, 0xCB,
2735 0xC0, 0xC1, 0xBF, 0xBF, 0xC4, 0xC5, 0xC2, 0xC3,
2736 0xD6, 0xD7, 0xD4, 0xD5, 0xDA, 0xDB, 0xD8, 0xD9,
2737 0xCF, 0xCF, 0xCE, 0xCE, 0xD2, 0xD3, 0xD0, 0xD1
2738 };
2739
2740 while (len--)
2741 {
2742 *buff = table_alaw2ulaw[*(unsigned char *)buff];
2743 buff++;
2744 }
2745 }
2746
2747 static ssize_t ixj_read(struct file * file_p, char __user *buf, size_t length, loff_t * ppos)
2748 {
2749 unsigned long i = *ppos;
2750 IXJ * j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2751
2752 DECLARE_WAITQUEUE(wait, current);
2753
2754 if (j->flags.inread)
2755 return -EALREADY;
2756
2757 j->flags.inread = 1;
2758
2759 add_wait_queue(&j->read_q, &wait);
2760 set_current_state(TASK_INTERRUPTIBLE);
2761 mb();
2762
2763 while (!j->read_buffer_ready || (j->dtmf_state && j->flags.dtmf_oob)) {
2764 ++j->read_wait;
2765 if (file_p->f_flags & O_NONBLOCK) {
2766 set_current_state(TASK_RUNNING);
2767 remove_wait_queue(&j->read_q, &wait);
2768 j->flags.inread = 0;
2769 return -EAGAIN;
2770 }
2771 if (!ixj_hookstate(j)) {
2772 set_current_state(TASK_RUNNING);
2773 remove_wait_queue(&j->read_q, &wait);
2774 j->flags.inread = 0;
2775 return 0;
2776 }
2777 interruptible_sleep_on(&j->read_q);
2778 if (signal_pending(current)) {
2779 set_current_state(TASK_RUNNING);
2780 remove_wait_queue(&j->read_q, &wait);
2781 j->flags.inread = 0;
2782 return -EINTR;
2783 }
2784 }
2785
2786 remove_wait_queue(&j->read_q, &wait);
2787 set_current_state(TASK_RUNNING);
2788 /* Don't ever copy more than the user asks */
2789 if(j->rec_codec == ALAW)
2790 ulaw2alaw(j->read_buffer, min(length, j->read_buffer_size));
2791 i = copy_to_user(buf, j->read_buffer, min(length, j->read_buffer_size));
2792 j->read_buffer_ready = 0;
2793 if (i) {
2794 j->flags.inread = 0;
2795 return -EFAULT;
2796 } else {
2797 j->flags.inread = 0;
2798 return min(length, j->read_buffer_size);
2799 }
2800 }
2801
2802 static ssize_t ixj_enhanced_read(struct file * file_p, char __user *buf, size_t length,
2803 loff_t * ppos)
2804 {
2805 int pre_retval;
2806 ssize_t read_retval = 0;
2807 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2808
2809 pre_retval = ixj_PreRead(j, 0L);
2810 switch (pre_retval) {
2811 case NORMAL:
2812 read_retval = ixj_read(file_p, buf, length, ppos);
2813 ixj_PostRead(j, 0L);
2814 break;
2815 case NOPOST:
2816 read_retval = ixj_read(file_p, buf, length, ppos);
2817 break;
2818 case POSTONLY:
2819 ixj_PostRead(j, 0L);
2820 break;
2821 default:
2822 read_retval = pre_retval;
2823 }
2824 return read_retval;
2825 }
2826
2827 static ssize_t ixj_write(struct file *file_p, const char __user *buf, size_t count, loff_t * ppos)
2828 {
2829 unsigned long i = *ppos;
2830 IXJ *j = file_p->private_data;
2831
2832 DECLARE_WAITQUEUE(wait, current);
2833
2834 if (j->flags.inwrite)
2835 return -EALREADY;
2836
2837 j->flags.inwrite = 1;
2838
2839 add_wait_queue(&j->write_q, &wait);
2840 set_current_state(TASK_INTERRUPTIBLE);
2841 mb();
2842
2843
2844 while (!j->write_buffers_empty) {
2845 ++j->write_wait;
2846 if (file_p->f_flags & O_NONBLOCK) {
2847 set_current_state(TASK_RUNNING);
2848 remove_wait_queue(&j->write_q, &wait);
2849 j->flags.inwrite = 0;
2850 return -EAGAIN;
2851 }
2852 if (!ixj_hookstate(j)) {
2853 set_current_state(TASK_RUNNING);
2854 remove_wait_queue(&j->write_q, &wait);
2855 j->flags.inwrite = 0;
2856 return 0;
2857 }
2858 interruptible_sleep_on(&j->write_q);
2859 if (signal_pending(current)) {
2860 set_current_state(TASK_RUNNING);
2861 remove_wait_queue(&j->write_q, &wait);
2862 j->flags.inwrite = 0;
2863 return -EINTR;
2864 }
2865 }
2866 set_current_state(TASK_RUNNING);
2867 remove_wait_queue(&j->write_q, &wait);
2868 if (j->write_buffer_wp + count >= j->write_buffer_end)
2869 j->write_buffer_wp = j->write_buffer;
2870 i = copy_from_user(j->write_buffer_wp, buf, min(count, j->write_buffer_size));
2871 if (i) {
2872 j->flags.inwrite = 0;
2873 return -EFAULT;
2874 }
2875 if(j->play_codec == ALAW)
2876 alaw2ulaw(j->write_buffer_wp, min(count, j->write_buffer_size));
2877 j->flags.inwrite = 0;
2878 return min(count, j->write_buffer_size);
2879 }
2880
2881 static ssize_t ixj_enhanced_write(struct file * file_p, const char __user *buf, size_t count, loff_t * ppos)
2882 {
2883 int pre_retval;
2884 ssize_t write_retval = 0;
2885
2886 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
2887
2888 pre_retval = ixj_PreWrite(j, 0L);
2889 switch (pre_retval) {
2890 case NORMAL:
2891 write_retval = ixj_write(file_p, buf, count, ppos);
2892 if (write_retval > 0) {
2893 ixj_PostWrite(j, 0L);
2894 j->write_buffer_wp += write_retval;
2895 j->write_buffers_empty--;
2896 }
2897 break;
2898 case NOPOST:
2899 write_retval = ixj_write(file_p, buf, count, ppos);
2900 if (write_retval > 0) {
2901 j->write_buffer_wp += write_retval;
2902 j->write_buffers_empty--;
2903 }
2904 break;
2905 case POSTONLY:
2906 ixj_PostWrite(j, 0L);
2907 break;
2908 default:
2909 write_retval = pre_retval;
2910 }
2911 return write_retval;
2912 }
2913
2914 static void ixj_read_frame(IXJ *j)
2915 {
2916 int cnt, dly;
2917
2918 if (j->read_buffer) {
2919 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2920 if (!(cnt % 16) && !IsRxReady(j)) {
2921 dly = 0;
2922 while (!IsRxReady(j)) {
2923 if (dly++ > 5) {
2924 dly = 0;
2925 break;
2926 }
2927 udelay(10);
2928 }
2929 }
2930 /* Throw away word 0 of the 8021 compressed format to get standard G.729. */
2931 if (j->rec_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
2932 inb_p(j->DSPbase + 0x0E);
2933 inb_p(j->DSPbase + 0x0F);
2934 }
2935 *(j->read_buffer + cnt) = inb_p(j->DSPbase + 0x0E);
2936 *(j->read_buffer + cnt + 1) = inb_p(j->DSPbase + 0x0F);
2937 }
2938 ++j->framesread;
2939 if (j->intercom != -1) {
2940 if (IsTxReady(get_ixj(j->intercom))) {
2941 for (cnt = 0; cnt < j->rec_frame_size * 2; cnt += 2) {
2942 if (!(cnt % 16) && !IsTxReady(j)) {
2943 dly = 0;
2944 while (!IsTxReady(j)) {
2945 if (dly++ > 5) {
2946 dly = 0;
2947 break;
2948 }
2949 udelay(10);
2950 }
2951 }
2952 outb_p(*(j->read_buffer + cnt), get_ixj(j->intercom)->DSPbase + 0x0C);
2953 outb_p(*(j->read_buffer + cnt + 1), get_ixj(j->intercom)->DSPbase + 0x0D);
2954 }
2955 get_ixj(j->intercom)->frameswritten++;
2956 }
2957 } else {
2958 j->read_buffer_ready = 1;
2959 wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
2960
2961 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
2962
2963 if(j->ixj_signals[SIG_READ_READY])
2964 ixj_kill_fasync(j, SIG_READ_READY, POLL_OUT);
2965 }
2966 }
2967 }
2968
2969 static short fsk[][6][20] =
2970 {
2971 {
2972 {
2973 0, 17846, 29934, 32364, 24351, 8481, -10126, -25465, -32587, -29196,
2974 -16384, 1715, 19260, 30591, 32051, 23170, 6813, -11743, -26509, -32722
2975 },
2976 {
2977 -28377, -14876, 3425, 20621, 31163, 31650, 21925, 5126, -13328, -27481,
2978 -32767, -27481, -13328, 5126, 21925, 31650, 31163, 20621, 3425, -14876
2979 },
2980 {
2981 -28377, -32722, -26509, -11743, 6813, 23170, 32051, 30591, 19260, 1715,
2982 -16384, -29196, -32587, -25465, -10126, 8481, 24351, 32364, 29934, 17846
2983 },
2984 {
2985 0, -17846, -29934, -32364, -24351, -8481, 10126, 25465, 32587, 29196,
2986 16384, -1715, -19260, -30591, -32051, -23170, -6813, 11743, 26509, 32722
2987 },
2988 {
2989 28377, 14876, -3425, -20621, -31163, -31650, -21925, -5126, 13328, 27481,
2990 32767, 27481, 13328, -5126, -21925, -31650, -31163, -20621, -3425, 14876
2991 },
2992 {
2993 28377, 32722, 26509, 11743, -6813, -23170, -32051, -30591, -19260, -1715,
2994 16384, 29196, 32587, 25465, 10126, -8481, -24351, -32364, -29934, -17846
2995 }
2996 },
2997 {
2998 {
2999 0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126,
3000 0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126
3001 },
3002 {
3003 -28377, -21925, -13328, -3425, 6813, 16384, 24351, 29934, 32587, 32051,
3004 28377, 21925, 13328, 3425, -6813, -16384, -24351, -29934, -32587, -32051
3005 },
3006 {
3007 -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925,
3008 28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925
3009 },
3010 {
3011 0, -10126, -19260, -26509, -31163, -32767, -31163, -26509, -19260, -10126,
3012 0, 10126, 19260, 26509, 31163, 32767, 31163, 26509, 19260, 10126
3013 },
3014 {
3015 28377, 21925, 13328, 3425, -6813, -16383, -24351, -29934, -32587, -32051,
3016 -28377, -21925, -13328, -3425, 6813, 16383, 24351, 29934, 32587, 32051
3017 },
3018 {
3019 28377, 32051, 32587, 29934, 24351, 16384, 6813, -3425, -13328, -21925,
3020 -28377, -32051, -32587, -29934, -24351, -16384, -6813, 3425, 13328, 21925
3021 }
3022 }
3023 };
3024
3025
3026 static void ixj_write_cid_bit(IXJ *j, int bit)
3027 {
3028 while (j->fskcnt < 20) {
3029 if(j->fskdcnt < (j->fsksize - 1))
3030 j->fskdata[j->fskdcnt++] = fsk[bit][j->fskz][j->fskcnt];
3031
3032 j->fskcnt += 3;
3033 }
3034 j->fskcnt %= 20;
3035
3036 if (!bit)
3037 j->fskz++;
3038 if (j->fskz >= 6)
3039 j->fskz = 0;
3040
3041 }
3042
3043 static void ixj_write_cid_byte(IXJ *j, char byte)
3044 {
3045 IXJ_CBYTE cb;
3046
3047 cb.cbyte = byte;
3048 ixj_write_cid_bit(j, 0);
3049 ixj_write_cid_bit(j, cb.cbits.b0 ? 1 : 0);
3050 ixj_write_cid_bit(j, cb.cbits.b1 ? 1 : 0);
3051 ixj_write_cid_bit(j, cb.cbits.b2 ? 1 : 0);
3052 ixj_write_cid_bit(j, cb.cbits.b3 ? 1 : 0);
3053 ixj_write_cid_bit(j, cb.cbits.b4 ? 1 : 0);
3054 ixj_write_cid_bit(j, cb.cbits.b5 ? 1 : 0);
3055 ixj_write_cid_bit(j, cb.cbits.b6 ? 1 : 0);
3056 ixj_write_cid_bit(j, cb.cbits.b7 ? 1 : 0);
3057 ixj_write_cid_bit(j, 1);
3058 }
3059
3060 static void ixj_write_cid_seize(IXJ *j)
3061 {
3062 int cnt;
3063
3064 for (cnt = 0; cnt < 150; cnt++) {
3065 ixj_write_cid_bit(j, 0);
3066 ixj_write_cid_bit(j, 1);
3067 }
3068 for (cnt = 0; cnt < 180; cnt++) {
3069 ixj_write_cid_bit(j, 1);
3070 }
3071 }
3072
3073 static void ixj_write_cidcw_seize(IXJ *j)
3074 {
3075 int cnt;
3076
3077 for (cnt = 0; cnt < 80; cnt++) {
3078 ixj_write_cid_bit(j, 1);
3079 }
3080 }
3081
3082 static int ixj_write_cid_string(IXJ *j, char *s, int checksum)
3083 {
3084 int cnt;
3085
3086 for (cnt = 0; cnt < strlen(s); cnt++) {
3087 ixj_write_cid_byte(j, s[cnt]);
3088 checksum = (checksum + s[cnt]);
3089 }
3090 return checksum;
3091 }
3092
3093 static void ixj_pad_fsk(IXJ *j, int pad)
3094 {
3095 int cnt;
3096
3097 for (cnt = 0; cnt < pad; cnt++) {
3098 if(j->fskdcnt < (j->fsksize - 1))
3099 j->fskdata[j->fskdcnt++] = 0x0000;
3100 }
3101 for (cnt = 0; cnt < 720; cnt++) {
3102 if(j->fskdcnt < (j->fsksize - 1))
3103 j->fskdata[j->fskdcnt++] = 0x0000;
3104 }
3105 }
3106
3107 static void ixj_pre_cid(IXJ *j)
3108 {
3109 j->cid_play_codec = j->play_codec;
3110 j->cid_play_frame_size = j->play_frame_size;
3111 j->cid_play_volume = get_play_volume(j);
3112 j->cid_play_flag = j->flags.playing;
3113
3114 j->cid_rec_codec = j->rec_codec;
3115 j->cid_rec_volume = get_rec_volume(j);
3116 j->cid_rec_flag = j->flags.recording;
3117
3118 j->cid_play_aec_level = j->aec_level;
3119
3120 switch(j->baseframe.low) {
3121 case 0xA0:
3122 j->cid_base_frame_size = 20;
3123 break;
3124 case 0x50:
3125 j->cid_base_frame_size = 10;
3126 break;
3127 case 0xF0:
3128 j->cid_base_frame_size = 30;
3129 break;
3130 }
3131
3132 ixj_play_stop(j);
3133 ixj_cpt_stop(j);
3134
3135 j->flags.cidplay = 1;
3136
3137 set_base_frame(j, 30);
3138 set_play_codec(j, LINEAR16);
3139 set_play_volume(j, 0x1B);
3140 ixj_play_start(j);
3141 }
3142
3143 static void ixj_post_cid(IXJ *j)
3144 {
3145 ixj_play_stop(j);
3146
3147 if(j->cidsize > 5000) {
3148 SLIC_SetState(PLD_SLIC_STATE_STANDBY, j);
3149 }
3150 j->flags.cidplay = 0;
3151 if(ixjdebug & 0x0200) {
3152 printk("IXJ phone%d Finished Playing CallerID data %ld\n", j->board, jiffies);
3153 }
3154
3155 ixj_fsk_free(j);
3156
3157 j->fskdcnt = 0;
3158 set_base_frame(j, j->cid_base_frame_size);
3159 set_play_codec(j, j->cid_play_codec);
3160 ixj_aec_start(j, j->cid_play_aec_level);
3161 set_play_volume(j, j->cid_play_volume);
3162
3163 set_rec_codec(j, j->cid_rec_codec);
3164 set_rec_volume(j, j->cid_rec_volume);
3165
3166 if(j->cid_rec_flag)
3167 ixj_record_start(j);
3168
3169 if(j->cid_play_flag)
3170 ixj_play_start(j);
3171
3172 if(j->cid_play_flag) {
3173 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3174 }
3175 }
3176
3177 static void ixj_write_cid(IXJ *j)
3178 {
3179 char sdmf1[50];
3180 char sdmf2[50];
3181 char sdmf3[80];
3182 char mdmflen, len1, len2, len3;
3183 int pad;
3184
3185 int checksum = 0;
3186
3187 if (j->dsp.low == 0x20 || j->flags.cidplay)
3188 return;
3189
3190 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3191 j->cidsize = j->cidcnt = 0;
3192
3193 ixj_fsk_alloc(j);
3194
3195 strcpy(sdmf1, j->cid_send.month);
3196 strcat(sdmf1, j->cid_send.day);
3197 strcat(sdmf1, j->cid_send.hour);
3198 strcat(sdmf1, j->cid_send.min);
3199 strcpy(sdmf2, j->cid_send.number);
3200 strcpy(sdmf3, j->cid_send.name);
3201
3202 len1 = strlen(sdmf1);
3203 len2 = strlen(sdmf2);
3204 len3 = strlen(sdmf3);
3205 mdmflen = len1 + len2 + len3 + 6;
3206
3207 while(1){
3208 ixj_write_cid_seize(j);
3209
3210 ixj_write_cid_byte(j, 0x80);
3211 checksum = 0x80;
3212 ixj_write_cid_byte(j, mdmflen);
3213 checksum = checksum + mdmflen;
3214
3215 ixj_write_cid_byte(j, 0x01);
3216 checksum = checksum + 0x01;
3217 ixj_write_cid_byte(j, len1);
3218 checksum = checksum + len1;
3219 checksum = ixj_write_cid_string(j, sdmf1, checksum);
3220 if(ixj_hookstate(j) & 1)
3221 break;
3222
3223 ixj_write_cid_byte(j, 0x02);
3224 checksum = checksum + 0x02;
3225 ixj_write_cid_byte(j, len2);
3226 checksum = checksum + len2;
3227 checksum = ixj_write_cid_string(j, sdmf2, checksum);
3228 if(ixj_hookstate(j) & 1)
3229 break;
3230
3231 ixj_write_cid_byte(j, 0x07);
3232 checksum = checksum + 0x07;
3233 ixj_write_cid_byte(j, len3);
3234 checksum = checksum + len3;
3235 checksum = ixj_write_cid_string(j, sdmf3, checksum);
3236 if(ixj_hookstate(j) & 1)
3237 break;
3238
3239 checksum %= 256;
3240 checksum ^= 0xFF;
3241 checksum += 1;
3242
3243 ixj_write_cid_byte(j, (char) checksum);
3244
3245 pad = j->fskdcnt % 240;
3246 if (pad) {
3247 pad = 240 - pad;
3248 }
3249 ixj_pad_fsk(j, pad);
3250 break;
3251 }
3252
3253 ixj_write_frame(j);
3254 }
3255
3256 static void ixj_write_cidcw(IXJ *j)
3257 {
3258 IXJ_TONE ti;
3259
3260 char sdmf1[50];
3261 char sdmf2[50];
3262 char sdmf3[80];
3263 char mdmflen, len1, len2, len3;
3264 int pad;
3265
3266 int checksum = 0;
3267
3268 if (j->dsp.low == 0x20 || j->flags.cidplay)
3269 return;
3270
3271 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3272 j->cidsize = j->cidcnt = 0;
3273
3274 ixj_fsk_alloc(j);
3275
3276 j->flags.cidcw_ack = 0;
3277
3278 ti.tone_index = 23;
3279 ti.gain0 = 1;
3280 ti.freq0 = hz440;
3281 ti.gain1 = 0;
3282 ti.freq1 = 0;
3283 ixj_init_tone(j, &ti);
3284
3285 ixj_set_tone_on(1500, j);
3286 ixj_set_tone_off(32, j);
3287 if(ixjdebug & 0x0200) {
3288 printk("IXJ cidcw phone%d first tone start at %ld\n", j->board, jiffies);
3289 }
3290 ixj_play_tone(j, 23);
3291
3292 clear_bit(j->board, &j->busyflags);
3293 while(j->tone_state)
3294 schedule_timeout_interruptible(1);
3295 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3296 schedule_timeout_interruptible(1);
3297 if(ixjdebug & 0x0200) {
3298 printk("IXJ cidcw phone%d first tone end at %ld\n", j->board, jiffies);
3299 }
3300
3301 ti.tone_index = 24;
3302 ti.gain0 = 1;
3303 ti.freq0 = hz2130;
3304 ti.gain1 = 0;
3305 ti.freq1 = hz2750;
3306 ixj_init_tone(j, &ti);
3307
3308 ixj_set_tone_off(10, j);
3309 ixj_set_tone_on(600, j);
3310 if(ixjdebug & 0x0200) {
3311 printk("IXJ cidcw phone%d second tone start at %ld\n", j->board, jiffies);
3312 }
3313 ixj_play_tone(j, 24);
3314
3315 clear_bit(j->board, &j->busyflags);
3316 while(j->tone_state)
3317 schedule_timeout_interruptible(1);
3318 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3319 schedule_timeout_interruptible(1);
3320 if(ixjdebug & 0x0200) {
3321 printk("IXJ cidcw phone%d sent second tone at %ld\n", j->board, jiffies);
3322 }
3323
3324 j->cidcw_wait = jiffies + ((50 * hertz) / 100);
3325
3326 clear_bit(j->board, &j->busyflags);
3327 while(!j->flags.cidcw_ack && time_before(jiffies, j->cidcw_wait))
3328 schedule_timeout_interruptible(1);
3329 while(test_and_set_bit(j->board, (void *)&j->busyflags) != 0)
3330 schedule_timeout_interruptible(1);
3331 j->cidcw_wait = 0;
3332 if(!j->flags.cidcw_ack) {
3333 if(ixjdebug & 0x0200) {
3334 printk("IXJ cidcw phone%d did not receive ACK from display %ld\n", j->board, jiffies);
3335 }
3336 ixj_post_cid(j);
3337 if(j->cid_play_flag) {
3338 wake_up_interruptible(&j->write_q); /* Wake any blocked readers */
3339 }
3340 return;
3341 } else {
3342 ixj_pre_cid(j);
3343 }
3344 j->flags.cidcw_ack = 0;
3345 strcpy(sdmf1, j->cid_send.month);
3346 strcat(sdmf1, j->cid_send.day);
3347 strcat(sdmf1, j->cid_send.hour);
3348 strcat(sdmf1, j->cid_send.min);
3349 strcpy(sdmf2, j->cid_send.number);
3350 strcpy(sdmf3, j->cid_send.name);
3351
3352 len1 = strlen(sdmf1);
3353 len2 = strlen(sdmf2);
3354 len3 = strlen(sdmf3);
3355 mdmflen = len1 + len2 + len3 + 6;
3356
3357 ixj_write_cidcw_seize(j);
3358
3359 ixj_write_cid_byte(j, 0x80);
3360 checksum = 0x80;
3361 ixj_write_cid_byte(j, mdmflen);
3362 checksum = checksum + mdmflen;
3363
3364 ixj_write_cid_byte(j, 0x01);
3365 checksum = checksum + 0x01;
3366 ixj_write_cid_byte(j, len1);
3367 checksum = checksum + len1;
3368 checksum = ixj_write_cid_string(j, sdmf1, checksum);
3369
3370 ixj_write_cid_byte(j, 0x02);
3371 checksum = checksum + 0x02;
3372 ixj_write_cid_byte(j, len2);
3373 checksum = checksum + len2;
3374 checksum = ixj_write_cid_string(j, sdmf2, checksum);
3375
3376 ixj_write_cid_byte(j, 0x07);
3377 checksum = checksum + 0x07;
3378 ixj_write_cid_byte(j, len3);
3379 checksum = checksum + len3;
3380 checksum = ixj_write_cid_string(j, sdmf3, checksum);
3381
3382 checksum %= 256;
3383 checksum ^= 0xFF;
3384 checksum += 1;
3385
3386 ixj_write_cid_byte(j, (char) checksum);
3387
3388 pad = j->fskdcnt % 240;
3389 if (pad) {
3390 pad = 240 - pad;
3391 }
3392 ixj_pad_fsk(j, pad);
3393 if(ixjdebug & 0x0200) {
3394 printk("IXJ cidcw phone%d sent FSK data at %ld\n", j->board, jiffies);
3395 }
3396 }
3397
3398 static void ixj_write_vmwi(IXJ *j, int msg)
3399 {
3400 char mdmflen;
3401 int pad;
3402
3403 int checksum = 0;
3404
3405 if (j->dsp.low == 0x20 || j->flags.cidplay)
3406 return;
3407
3408 j->fskz = j->fskphase = j->fskcnt = j->fskdcnt = 0;
3409 j->cidsize = j->cidcnt = 0;
3410
3411 ixj_fsk_alloc(j);
3412
3413 mdmflen = 3;
3414
3415 if (j->port == PORT_POTS)
3416 SLIC_SetState(PLD_SLIC_STATE_OHT, j);
3417
3418 ixj_write_cid_seize(j);
3419
3420 ixj_write_cid_byte(j, 0x82);
3421 checksum = 0x82;
3422 ixj_write_cid_byte(j, mdmflen);
3423 checksum = checksum + mdmflen;
3424
3425 ixj_write_cid_byte(j, 0x0B);
3426 checksum = checksum + 0x0B;
3427 ixj_write_cid_byte(j, 1);
3428 checksum = checksum + 1;
3429
3430 if(msg) {
3431 ixj_write_cid_byte(j, 0xFF);
3432 checksum = checksum + 0xFF;
3433 }
3434 else {
3435 ixj_write_cid_byte(j, 0x00);
3436 checksum = checksum + 0x00;
3437 }
3438
3439 checksum %= 256;
3440 checksum ^= 0xFF;
3441 checksum += 1;
3442
3443 ixj_write_cid_byte(j, (char) checksum);
3444
3445 pad = j->fskdcnt % 240;
3446 if (pad) {
3447 pad = 240 - pad;
3448 }
3449 ixj_pad_fsk(j, pad);
3450 }
3451
3452 static void ixj_write_frame(IXJ *j)
3453 {
3454 int cnt, frame_count, dly;
3455 IXJ_WORD dat;
3456
3457 frame_count = 0;
3458 if(j->flags.cidplay) {
3459 for(cnt = 0; cnt < 480; cnt++) {
3460 if (!(cnt % 16) && !IsTxReady(j)) {
3461 dly = 0;
3462 while (!IsTxReady(j)) {
3463 if (dly++ > 5) {
3464 dly = 0;
3465 break;
3466 }
3467 udelay(10);
3468 }
3469 }
3470 dat.word = j->fskdata[j->cidcnt++];
3471 outb_p(dat.bytes.low, j->DSPbase + 0x0C);
3472 outb_p(dat.bytes.high, j->DSPbase + 0x0D);
3473 cnt++;
3474 }
3475 if(j->cidcnt >= j->fskdcnt) {
3476 ixj_post_cid(j);
3477 }
3478 /* This may seem rude, but if we just played one frame of FSK data for CallerID
3479 and there is real audio data in the buffer, we need to throw it away because
3480 we just used it's time slot */
3481 if (j->write_buffer_rp > j->write_buffer_wp) {
3482 j->write_buffer_rp += j->cid_play_frame_size * 2;
3483 if (j->write_buffer_rp >= j->write_buffer_end) {
3484 j->write_buffer_rp = j->write_buffer;
3485 }
3486 j->write_buffers_empty++;
3487 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3488
3489 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
3490 }
3491 } else if (j->write_buffer && j->write_buffers_empty < 1) {
3492 if (j->write_buffer_wp > j->write_buffer_rp) {
3493 frame_count =
3494 (j->write_buffer_wp - j->write_buffer_rp) / (j->play_frame_size * 2);
3495 }
3496 if (j->write_buffer_rp > j->write_buffer_wp) {
3497 frame_count =
3498 (j->write_buffer_wp - j->write_buffer) / (j->play_frame_size * 2) +
3499 (j->write_buffer_end - j->write_buffer_rp) / (j->play_frame_size * 2);
3500 }
3501 if (frame_count >= 1) {
3502 if (j->ver.low == 0x12 && j->play_mode && j->flags.play_first_frame) {
3503 BYTES blankword;
3504
3505 switch (j->play_mode) {
3506 case PLAYBACK_MODE_ULAW:
3507 case PLAYBACK_MODE_ALAW:
3508 blankword.low = blankword.high = 0xFF;
3509 break;
3510 case PLAYBACK_MODE_8LINEAR:
3511 case PLAYBACK_MODE_16LINEAR:
3512 default:
3513 blankword.low = blankword.high = 0x00;
3514 break;
3515 case PLAYBACK_MODE_8LINEAR_WSS:
3516 blankword.low = blankword.high = 0x80;
3517 break;
3518 }
3519 for (cnt = 0; cnt < 16; cnt++) {
3520 if (!(cnt % 16) && !IsTxReady(j)) {
3521 dly = 0;
3522 while (!IsTxReady(j)) {
3523 if (dly++ > 5) {
3524 dly = 0;
3525 break;
3526 }
3527 udelay(10);
3528 }
3529 }
3530 outb_p((blankword.low), j->DSPbase + 0x0C);
3531 outb_p((blankword.high), j->DSPbase + 0x0D);
3532 }
3533 j->flags.play_first_frame = 0;
3534 } else if (j->play_codec == G723_63 && j->flags.play_first_frame) {
3535 for (cnt = 0; cnt < 24; cnt++) {
3536 BYTES blankword;
3537
3538 if(cnt == 12) {
3539 blankword.low = 0x02;
3540 blankword.high = 0x00;
3541 }
3542 else {
3543 blankword.low = blankword.high = 0x00;
3544 }
3545 if (!(cnt % 16) && !IsTxReady(j)) {
3546 dly = 0;
3547 while (!IsTxReady(j)) {
3548 if (dly++ > 5) {
3549 dly = 0;
3550 break;
3551 }
3552 udelay(10);
3553 }
3554 }
3555 outb_p((blankword.low), j->DSPbase + 0x0C);
3556 outb_p((blankword.high), j->DSPbase + 0x0D);
3557 }
3558 j->flags.play_first_frame = 0;
3559 }
3560 for (cnt = 0; cnt < j->play_frame_size * 2; cnt += 2) {
3561 if (!(cnt % 16) && !IsTxReady(j)) {
3562 dly = 0;
3563 while (!IsTxReady(j)) {
3564 if (dly++ > 5) {
3565 dly = 0;
3566 break;
3567 }
3568 udelay(10);
3569 }
3570 }
3571 /* Add word 0 to G.729 frames for the 8021. Right now we don't do VAD/CNG */
3572 if (j->play_codec == G729 && (cnt == 0 || cnt == 10 || cnt == 20)) {
3573 if (j->write_buffer_rp[cnt] == 0 &&
3574 j->write_buffer_rp[cnt + 1] == 0 &&
3575 j->write_buffer_rp[cnt + 2] == 0 &&
3576 j->write_buffer_rp[cnt + 3] == 0 &&
3577 j->write_buffer_rp[cnt + 4] == 0 &&
3578 j->write_buffer_rp[cnt + 5] == 0 &&
3579 j->write_buffer_rp[cnt + 6] == 0 &&
3580 j->write_buffer_rp[cnt + 7] == 0 &&
3581 j->write_buffer_rp[cnt + 8] == 0 &&
3582 j->write_buffer_rp[cnt + 9] == 0) {
3583 /* someone is trying to write silence lets make this a type 0 frame. */
3584 outb_p(0x00, j->DSPbase + 0x0C);
3585 outb_p(0x00, j->DSPbase + 0x0D);
3586 } else {
3587 /* so all other frames are type 1. */
3588 outb_p(0x01, j->DSPbase + 0x0C);
3589 outb_p(0x00, j->DSPbase + 0x0D);
3590 }
3591 }
3592 outb_p(*(j->write_buffer_rp + cnt), j->DSPbase + 0x0C);
3593 outb_p(*(j->write_buffer_rp + cnt + 1), j->DSPbase + 0x0D);
3594 *(j->write_buffer_rp + cnt) = 0;
3595 *(j->write_buffer_rp + cnt + 1) = 0;
3596 }
3597 j->write_buffer_rp += j->play_frame_size * 2;
3598 if (j->write_buffer_rp >= j->write_buffer_end) {
3599 j->write_buffer_rp = j->write_buffer;
3600 }
3601 j->write_buffers_empty++;
3602 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
3603
3604 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
3605
3606 ++j->frameswritten;
3607 }
3608 } else {
3609 j->drybuffer++;
3610 }
3611 if(j->ixj_signals[SIG_WRITE_READY]) {
3612 ixj_kill_fasync(j, SIG_WRITE_READY, POLL_OUT);
3613 }
3614 }
3615
3616 static int idle(IXJ *j)
3617 {
3618 if (ixj_WriteDSPCommand(0x0000, j)) /* DSP Idle */
3619
3620 return 0;
3621
3622 if (j->ssr.high || j->ssr.low) {
3623 return 0;
3624 } else {
3625 j->play_mode = -1;
3626 j->flags.playing = 0;
3627 j->rec_mode = -1;
3628 j->flags.recording = 0;
3629 return 1;
3630 }
3631 }
3632
3633 static int set_base_frame(IXJ *j, int size)
3634 {
3635 unsigned short cmd;
3636 int cnt;
3637
3638 idle(j);
3639 j->cid_play_aec_level = j->aec_level;
3640 aec_stop(j);
3641 for (cnt = 0; cnt < 10; cnt++) {
3642 if (idle(j))
3643 break;
3644 }
3645 if (j->ssr.high || j->ssr.low)
3646 return -1;
3647 if (j->dsp.low != 0x20) {
3648 switch (size) {
3649 case 30:
3650 cmd = 0x07F0;
3651 /* Set Base Frame Size to 240 pg9-10 8021 */
3652 break;
3653 case 20:
3654 cmd = 0x07A0;
3655 /* Set Base Frame Size to 160 pg9-10 8021 */
3656 break;
3657 case 10:
3658 cmd = 0x0750;
3659 /* Set Base Frame Size to 80 pg9-10 8021 */
3660 break;
3661 default:
3662 return -1;
3663 }
3664 } else {
3665 if (size == 30)
3666 return size;
3667 else
3668 return -1;
3669 }
3670 if (ixj_WriteDSPCommand(cmd, j)) {
3671 j->baseframe.high = j->baseframe.low = 0xFF;
3672 return -1;
3673 } else {
3674 j->baseframe.high = j->ssr.high;
3675 j->baseframe.low = j->ssr.low;
3676 /* If the status returned is 0x0000 (pg9-9 8021) the call failed */
3677 if(j->baseframe.high == 0x00 && j->baseframe.low == 0x00) {
3678 return -1;
3679 }
3680 }
3681 ixj_aec_start(j, j->cid_play_aec_level);
3682 return size;
3683 }
3684
3685 static int set_rec_codec(IXJ *j, int rate)
3686 {
3687 int retval = 0;
3688
3689 j->rec_codec = rate;
3690
3691 switch (rate) {
3692 case G723_63:
3693 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3694 j->rec_frame_size = 12;
3695 j->rec_mode = 0;
3696 } else {
3697 retval = 1;
3698 }
3699 break;
3700 case G723_53:
3701 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3702 j->rec_frame_size = 10;
3703 j->rec_mode = 0;
3704 } else {
3705 retval = 1;
3706 }
3707 break;
3708 case TS85:
3709 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
3710 j->rec_frame_size = 16;
3711 j->rec_mode = 0;
3712 } else {
3713 retval = 1;
3714 }
3715 break;
3716 case TS48:
3717 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3718 j->rec_frame_size = 9;
3719 j->rec_mode = 0;
3720 } else {
3721 retval = 1;
3722 }
3723 break;
3724 case TS41:
3725 if (j->ver.low != 0x12 || ixj_convert_loaded) {
3726 j->rec_frame_size = 8;
3727 j->rec_mode = 0;
3728 } else {
3729 retval = 1;
3730 }
3731 break;
3732 case G728:
3733 if (j->dsp.low != 0x20) {
3734 j->rec_frame_size = 48;
3735 j->rec_mode = 0;
3736 } else {
3737 retval = 1;
3738 }
3739 break;
3740 case G729:
3741 if (j->dsp.low != 0x20) {
3742 if (!j->flags.g729_loaded) {
3743 retval = 1;
3744 break;
3745 }
3746 switch (j->baseframe.low) {
3747 case 0xA0:
3748 j->rec_frame_size = 10;
3749 break;
3750 case 0x50:
3751 j->rec_frame_size = 5;
3752 break;
3753 default:
3754 j->rec_frame_size = 15;
3755 break;
3756 }
3757 j->rec_mode = 0;
3758 } else {
3759 retval = 1;
3760 }
3761 break;
3762 case G729B:
3763 if (j->dsp.low != 0x20) {
3764 if (!j->flags.g729_loaded) {
3765 retval = 1;
3766 break;
3767 }
3768 switch (j->baseframe.low) {
3769 case 0xA0:
3770 j->rec_frame_size = 12;
3771 break;
3772 case 0x50:
3773 j->rec_frame_size = 6;
3774 break;
3775 default:
3776 j->rec_frame_size = 18;
3777 break;
3778 }
3779 j->rec_mode = 0;
3780 } else {
3781 retval = 1;
3782 }
3783 break;
3784 case ULAW:
3785 switch (j->baseframe.low) {
3786 case 0xA0:
3787 j->rec_frame_size = 80;
3788 break;
3789 case 0x50:
3790 j->rec_frame_size = 40;
3791 break;
3792 default:
3793 j->rec_frame_size = 120;
3794 break;
3795 }
3796 j->rec_mode = 4;
3797 break;
3798 case ALAW:
3799 switch (j->baseframe.low) {
3800 case 0xA0:
3801 j->rec_frame_size = 80;
3802 break;
3803 case 0x50:
3804 j->rec_frame_size = 40;
3805 break;
3806 default:
3807 j->rec_frame_size = 120;
3808 break;
3809 }
3810 j->rec_mode = 4;
3811 break;
3812 case LINEAR16:
3813 switch (j->baseframe.low) {
3814 case 0xA0:
3815 j->rec_frame_size = 160;
3816 break;
3817 case 0x50:
3818 j->rec_frame_size = 80;
3819 break;
3820 default:
3821 j->rec_frame_size = 240;
3822 break;
3823 }
3824 j->rec_mode = 5;
3825 break;
3826 case LINEAR8:
3827 switch (j->baseframe.low) {
3828 case 0xA0:
3829 j->rec_frame_size = 80;
3830 break;
3831 case 0x50:
3832 j->rec_frame_size = 40;
3833 break;
3834 default:
3835 j->rec_frame_size = 120;
3836 break;
3837 }
3838 j->rec_mode = 6;
3839 break;
3840 case WSS:
3841 switch (j->baseframe.low) {
3842 case 0xA0:
3843 j->rec_frame_size = 80;
3844 break;
3845 case 0x50:
3846 j->rec_frame_size = 40;
3847 break;
3848 default:
3849 j->rec_frame_size = 120;
3850 break;
3851 }
3852 j->rec_mode = 7;
3853 break;
3854 default:
3855 kfree(j->read_buffer);
3856 j->rec_frame_size = 0;
3857 j->rec_mode = -1;
3858 j->read_buffer = NULL;
3859 j->read_buffer_size = 0;
3860 retval = 1;
3861 break;
3862 }
3863 return retval;
3864 }
3865
3866 static int ixj_record_start(IXJ *j)
3867 {
3868 unsigned short cmd = 0x0000;
3869
3870 if (j->read_buffer) {
3871 ixj_record_stop(j);
3872 }
3873 j->flags.recording = 1;
3874 ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
3875
3876 if(ixjdebug & 0x0002)
3877 printk("IXJ %d Starting Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3878
3879 if (!j->rec_mode) {
3880 switch (j->rec_codec) {
3881 case G723_63:
3882 cmd = 0x5131;
3883 break;
3884 case G723_53:
3885 cmd = 0x5132;
3886 break;
3887 case TS85:
3888 cmd = 0x5130; /* TrueSpeech 8.5 */
3889
3890 break;
3891 case TS48:
3892 cmd = 0x5133; /* TrueSpeech 4.8 */
3893
3894 break;
3895 case TS41:
3896 cmd = 0x5134; /* TrueSpeech 4.1 */
3897
3898 break;
3899 case G728:
3900 cmd = 0x5135;
3901 break;
3902 case G729:
3903 case G729B:
3904 cmd = 0x5136;
3905 break;
3906 default:
3907 return 1;
3908 }
3909 if (ixj_WriteDSPCommand(cmd, j))
3910 return -1;
3911 }
3912 if (!j->read_buffer) {
3913 if (!j->read_buffer)
3914 j->read_buffer = kmalloc(j->rec_frame_size * 2, GFP_ATOMIC);
3915 if (!j->read_buffer) {
3916 printk("Read buffer allocation for ixj board %d failed!\n", j->board);
3917 return -ENOMEM;
3918 }
3919 }
3920 j->read_buffer_size = j->rec_frame_size * 2;
3921
3922 if (ixj_WriteDSPCommand(0x5102, j)) /* Set Poll sync mode */
3923
3924 return -1;
3925
3926 switch (j->rec_mode) {
3927 case 0:
3928 cmd = 0x1C03; /* Record C1 */
3929
3930 break;
3931 case 4:
3932 if (j->ver.low == 0x12) {
3933 cmd = 0x1E03; /* Record C1 */
3934
3935 } else {
3936 cmd = 0x1E01; /* Record C1 */
3937
3938 }
3939 break;
3940 case 5:
3941 if (j->ver.low == 0x12) {
3942 cmd = 0x1E83; /* Record C1 */
3943
3944 } else {
3945 cmd = 0x1E81; /* Record C1 */
3946
3947 }
3948 break;
3949 case 6:
3950 if (j->ver.low == 0x12) {
3951 cmd = 0x1F03; /* Record C1 */
3952
3953 } else {
3954 cmd = 0x1F01; /* Record C1 */
3955
3956 }
3957 break;
3958 case 7:
3959 if (j->ver.low == 0x12) {
3960 cmd = 0x1F83; /* Record C1 */
3961 } else {
3962 cmd = 0x1F81; /* Record C1 */
3963 }
3964 break;
3965 }
3966 if (ixj_WriteDSPCommand(cmd, j))
3967 return -1;
3968
3969 if (j->flags.playing) {
3970 ixj_aec_start(j, j->aec_level);
3971 }
3972 return 0;
3973 }
3974
3975 static void ixj_record_stop(IXJ *j)
3976 {
3977 if (ixjdebug & 0x0002)
3978 printk("IXJ %d Stopping Record Codec %d at %ld\n", j->board, j->rec_codec, jiffies);
3979
3980 kfree(j->read_buffer);
3981 j->read_buffer = NULL;
3982 j->read_buffer_size = 0;
3983 if (j->rec_mode > -1) {
3984 ixj_WriteDSPCommand(0x5120, j);
3985 j->rec_mode = -1;
3986 }
3987 j->flags.recording = 0;
3988 }
3989 static void ixj_vad(IXJ *j, int arg)
3990 {
3991 if (arg)
3992 ixj_WriteDSPCommand(0x513F, j);
3993 else
3994 ixj_WriteDSPCommand(0x513E, j);
3995 }
3996
3997 static void set_rec_depth(IXJ *j, int depth)
3998 {
3999 if (depth > 60)
4000 depth = 60;
4001 if (depth < 0)
4002 depth = 0;
4003 ixj_WriteDSPCommand(0x5180 + depth, j);
4004 }
4005
4006 static void set_dtmf_prescale(IXJ *j, int volume)
4007 {
4008 ixj_WriteDSPCommand(0xCF07, j);
4009 ixj_WriteDSPCommand(volume, j);
4010 }
4011
4012 static int get_dtmf_prescale(IXJ *j)
4013 {
4014 ixj_WriteDSPCommand(0xCF05, j);
4015 return j->ssr.high << 8 | j->ssr.low;
4016 }
4017
4018 static void set_rec_volume(IXJ *j, int volume)
4019 {
4020 if(j->aec_level == AEC_AGC) {
4021 if (ixjdebug & 0x0002)
4022 printk(KERN_INFO "IXJ: /dev/phone%d Setting AGC Threshold to 0x%4.4x\n", j->board, volume);
4023 ixj_WriteDSPCommand(0xCF96, j);
4024 ixj_WriteDSPCommand(volume, j);
4025 } else {
4026 if (ixjdebug & 0x0002)
4027 printk(KERN_INFO "IXJ: /dev/phone %d Setting Record Volume to 0x%4.4x\n", j->board, volume);
4028 ixj_WriteDSPCommand(0xCF03, j);
4029 ixj_WriteDSPCommand(volume, j);
4030 }
4031 }
4032
4033 static int set_rec_volume_linear(IXJ *j, int volume)
4034 {
4035 int newvolume, dsprecmax;
4036
4037 if (ixjdebug & 0x0002)
4038 printk(KERN_INFO "IXJ: /dev/phone %d Setting Linear Record Volume to 0x%4.4x\n", j->board, volume);
4039 if(volume > 100 || volume < 0) {
4040 return -1;
4041 }
4042
4043 /* This should normalize the perceived volumes between the different cards caused by differences in the hardware */
4044 switch (j->cardtype) {
4045 case QTI_PHONEJACK:
4046 dsprecmax = 0x440;
4047 break;
4048 case QTI_LINEJACK:
4049 dsprecmax = 0x180;
4050 ixj_mixer(0x0203, j); /*Voice Left Volume unmute 6db */
4051 ixj_mixer(0x0303, j); /*Voice Right Volume unmute 6db */
4052 ixj_mixer(0x0C00, j); /*Mono1 unmute 12db */
4053 break;
4054 case QTI_PHONEJACK_LITE:
4055 dsprecmax = 0x4C0;
4056 break;
4057 case QTI_PHONEJACK_PCI:
4058 dsprecmax = 0x100;
4059 break;
4060 case QTI_PHONECARD:
4061 dsprecmax = 0x400;
4062 break;
4063 default:
4064 return -1;
4065 }
4066 newvolume = (dsprecmax * volume) / 100;
4067 set_rec_volume(j, newvolume);
4068 return 0;
4069 }
4070
4071 static int get_rec_volume(IXJ *j)
4072 {
4073 if(j->aec_level == AEC_AGC) {
4074 if (ixjdebug & 0x0002)
4075 printk(KERN_INFO "Getting AGC Threshold\n");
4076 ixj_WriteDSPCommand(0xCF86, j);
4077 if (ixjdebug & 0x0002)
4078 printk(KERN_INFO "AGC Threshold is 0x%2.2x%2.2x\n", j->ssr.high, j->ssr.low);
4079 return j->ssr.high << 8 | j->ssr.low;
4080 } else {
4081 if (ixjdebug & 0x0002)
4082 printk(KERN_INFO "Getting Record Volume\n");
4083 ixj_WriteDSPCommand(0xCF01, j);
4084 return j->ssr.high << 8 | j->ssr.low;
4085 }
4086 }
4087
4088 static int get_rec_volume_linear(IXJ *j)
4089 {
4090 int volume, newvolume, dsprecmax;
4091
4092 switch (j->cardtype) {
4093 case QTI_PHONEJACK:
4094 dsprecmax = 0x440;
4095 break;
4096 case QTI_LINEJACK:
4097 dsprecmax = 0x180;
4098 break;
4099 case QTI_PHONEJACK_LITE:
4100 dsprecmax = 0x4C0;
4101 break;
4102 case QTI_PHONEJACK_PCI:
4103 dsprecmax = 0x100;
4104 break;
4105 case QTI_PHONECARD:
4106 dsprecmax = 0x400;
4107 break;
4108 default:
4109 return -1;
4110 }
4111 volume = get_rec_volume(j);
4112 newvolume = (volume * 100) / dsprecmax;
4113 if(newvolume > 100)
4114 newvolume = 100;
4115 return newvolume;
4116 }
4117
4118 static int get_rec_level(IXJ *j)
4119 {
4120 int retval;
4121
4122 ixj_WriteDSPCommand(0xCF88, j);
4123
4124 retval = j->ssr.high << 8 | j->ssr.low;
4125 retval = (retval * 256) / 240;
4126 return retval;
4127 }
4128
4129 static void ixj_aec_start(IXJ *j, int level)
4130 {
4131 j->aec_level = level;
4132 if (ixjdebug & 0x0002)
4133 printk(KERN_INFO "AGC set = 0x%2.2x\n", j->aec_level);
4134 if (!level) {
4135 aec_stop(j);
4136 } else {
4137 if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4138 ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer */
4139
4140 ixj_WriteDSPCommand(0x0300, j);
4141 }
4142 ixj_WriteDSPCommand(0xB001, j); /* AEC On */
4143
4144 ixj_WriteDSPCommand(0xE013, j); /* Advanced AEC C1 */
4145
4146 switch (level) {
4147 case AEC_LOW:
4148 ixj_WriteDSPCommand(0x0000, j); /* Advanced AEC C2 = off */
4149
4150 ixj_WriteDSPCommand(0xE011, j);
4151 ixj_WriteDSPCommand(0xFFFF, j);
4152
4153 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4154 ixj_WriteDSPCommand(0x0000, j); /* to off */
4155
4156 break;
4157
4158 case AEC_MED:
4159 ixj_WriteDSPCommand(0x0600, j); /* Advanced AEC C2 = on medium */
4160
4161 ixj_WriteDSPCommand(0xE011, j);
4162 ixj_WriteDSPCommand(0x0080, j);
4163
4164 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4165 ixj_WriteDSPCommand(0x0000, j); /* to off */
4166
4167 break;
4168
4169 case AEC_HIGH:
4170 ixj_WriteDSPCommand(0x0C00, j); /* Advanced AEC C2 = on high */
4171
4172 ixj_WriteDSPCommand(0xE011, j);
4173 ixj_WriteDSPCommand(0x0080, j);
4174
4175 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4176 ixj_WriteDSPCommand(0x0000, j); /* to off */
4177
4178 break;
4179
4180 case AEC_AGC:
4181 /* First we have to put the AEC into advance auto mode so that AGC will not conflict with it */
4182 ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4183
4184 ixj_WriteDSPCommand(0xE011, j);
4185 ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4186
4187 ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4188
4189 if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4190 ixj_WriteDSPCommand(0x0224, j);
4191 else
4192 ixj_WriteDSPCommand(0x1224, j);
4193
4194 ixj_WriteDSPCommand(0xE014, j);
4195 ixj_WriteDSPCommand(0x0003, j); /* Lock threashold at 3dB */
4196
4197 ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4198
4199 /* Now we can set the AGC initial parameters and turn it on */
4200 ixj_WriteDSPCommand(0xCF90, j); /* Set AGC Minumum gain */
4201 ixj_WriteDSPCommand(0x0020, j); /* to 0.125 (-18dB) */
4202
4203 ixj_WriteDSPCommand(0xCF91, j); /* Set AGC Maximum gain */
4204 ixj_WriteDSPCommand(0x1000, j); /* to 16 (24dB) */
4205
4206 ixj_WriteDSPCommand(0xCF92, j); /* Set AGC start gain */
4207 ixj_WriteDSPCommand(0x0800, j); /* to 8 (+18dB) */
4208
4209 ixj_WriteDSPCommand(0xCF93, j); /* Set AGC hold time */
4210 ixj_WriteDSPCommand(0x1F40, j); /* to 2 seconds (units are 250us) */
4211
4212 ixj_WriteDSPCommand(0xCF94, j); /* Set AGC Attack Time Constant */
4213 ixj_WriteDSPCommand(0x0005, j); /* to 8ms */
4214
4215 ixj_WriteDSPCommand(0xCF95, j); /* Set AGC Decay Time Constant */
4216 ixj_WriteDSPCommand(0x000D, j); /* to 4096ms */
4217
4218 ixj_WriteDSPCommand(0xCF96, j); /* Set AGC Attack Threshold */
4219 ixj_WriteDSPCommand(0x1200, j); /* to 25% */
4220
4221 ixj_WriteDSPCommand(0xCF97, j); /* Set AGC Enable */
4222 ixj_WriteDSPCommand(0x0001, j); /* to on */
4223
4224 break;
4225
4226 case AEC_AUTO:
4227 ixj_WriteDSPCommand(0x0002, j); /* Attenuation scaling factor of 2 */
4228
4229 ixj_WriteDSPCommand(0xE011, j);
4230 ixj_WriteDSPCommand(0x0100, j); /* Higher Threshold Floor */
4231
4232 ixj_WriteDSPCommand(0xE012, j); /* Set Train and Lock */
4233
4234 if(j->cardtype == QTI_LINEJACK || j->cardtype == QTI_PHONECARD)
4235 ixj_WriteDSPCommand(0x0224, j);
4236 else
4237 ixj_WriteDSPCommand(0x1224, j);
4238
4239 ixj_WriteDSPCommand(0xE014, j);
4240 ixj_WriteDSPCommand(0x0003, j); /* Lock threashold at 3dB */
4241
4242 ixj_WriteDSPCommand(0xE338, j); /* Set Echo Suppresser Attenuation to 0dB */
4243
4244 break;
4245 }
4246 }
4247 }
4248
4249 static void aec_stop(IXJ *j)
4250 {
4251 j->aec_level = AEC_OFF;
4252 if (j->rec_codec == G729 || j->play_codec == G729 || j->rec_codec == G729B || j->play_codec == G729B) {
4253 ixj_WriteDSPCommand(0xE022, j); /* Move AEC filter buffer back */
4254
4255 ixj_WriteDSPCommand(0x0700, j);
4256 }
4257 if (j->play_mode != -1 && j->rec_mode != -1)
4258 {
4259 ixj_WriteDSPCommand(0xB002, j); /* AEC Stop */
4260 }
4261 }
4262
4263 static int set_play_codec(IXJ *j, int rate)
4264 {
4265 int retval = 0;
4266
4267 j->play_codec = rate;
4268
4269 switch (rate) {
4270 case G723_63:
4271 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4272 j->play_frame_size = 12;
4273 j->play_mode = 0;
4274 } else {
4275 retval = 1;
4276 }
4277 break;
4278 case G723_53:
4279 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4280 j->play_frame_size = 10;
4281 j->play_mode = 0;
4282 } else {
4283 retval = 1;
4284 }
4285 break;
4286 case TS85:
4287 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
4288 j->play_frame_size = 16;
4289 j->play_mode = 0;
4290 } else {
4291 retval = 1;
4292 }
4293 break;
4294 case TS48:
4295 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4296 j->play_frame_size = 9;
4297 j->play_mode = 0;
4298 } else {
4299 retval = 1;
4300 }
4301 break;
4302 case TS41:
4303 if (j->ver.low != 0x12 || ixj_convert_loaded) {
4304 j->play_frame_size = 8;
4305 j->play_mode = 0;
4306 } else {
4307 retval = 1;
4308 }
4309 break;
4310 case G728:
4311 if (j->dsp.low != 0x20) {
4312 j->play_frame_size = 48;
4313 j->play_mode = 0;
4314 } else {
4315 retval = 1;
4316 }
4317 break;
4318 case G729:
4319 if (j->dsp.low != 0x20) {
4320 if (!j->flags.g729_loaded) {
4321 retval = 1;
4322 break;
4323 }
4324 switch (j->baseframe.low) {
4325 case 0xA0:
4326 j->play_frame_size = 10;
4327 break;
4328 case 0x50:
4329 j->play_frame_size = 5;
4330 break;
4331 default:
4332 j->play_frame_size = 15;
4333 break;
4334 }
4335 j->play_mode = 0;
4336 } else {
4337 retval = 1;
4338 }
4339 break;
4340 case G729B:
4341 if (j->dsp.low != 0x20) {
4342 if (!j->flags.g729_loaded) {
4343 retval = 1;
4344 break;
4345 }
4346 switch (j->baseframe.low) {
4347 case 0xA0:
4348 j->play_frame_size = 12;
4349 break;
4350 case 0x50:
4351 j->play_frame_size = 6;
4352 break;
4353 default:
4354 j->play_frame_size = 18;
4355 break;
4356 }
4357 j->play_mode = 0;
4358 } else {
4359 retval = 1;
4360 }
4361 break;
4362 case ULAW:
4363 switch (j->baseframe.low) {
4364 case 0xA0:
4365 j->play_frame_size = 80;
4366 break;
4367 case 0x50:
4368 j->play_frame_size = 40;
4369 break;
4370 default:
4371 j->play_frame_size = 120;
4372 break;
4373 }
4374 j->play_mode = 2;
4375 break;
4376 case ALAW:
4377 switch (j->baseframe.low) {
4378 case 0xA0:
4379 j->play_frame_size = 80;
4380 break;
4381 case 0x50:
4382 j->play_frame_size = 40;
4383 break;
4384 default:
4385 j->play_frame_size = 120;
4386 break;
4387 }
4388 j->play_mode = 2;
4389 break;
4390 case LINEAR16:
4391 switch (j->baseframe.low) {
4392 case 0xA0:
4393 j->play_frame_size = 160;
4394 break;
4395 case 0x50:
4396 j->play_frame_size = 80;
4397 break;
4398 default:
4399 j->play_frame_size = 240;
4400 break;
4401 }
4402 j->play_mode = 6;
4403 break;
4404 case LINEAR8:
4405 switch (j->baseframe.low) {
4406 case 0xA0:
4407 j->play_frame_size = 80;
4408 break;
4409 case 0x50:
4410 j->play_frame_size = 40;
4411 break;
4412 default:
4413 j->play_frame_size = 120;
4414 break;
4415 }
4416 j->play_mode = 4;
4417 break;
4418 case WSS:
4419 switch (j->baseframe.low) {
4420 case 0xA0:
4421 j->play_frame_size = 80;
4422 break;
4423 case 0x50:
4424 j->play_frame_size = 40;
4425 break;
4426 default:
4427 j->play_frame_size = 120;
4428 break;
4429 }
4430 j->play_mode = 5;
4431 break;
4432 default:
4433 kfree(j->write_buffer);
4434 j->play_frame_size = 0;
4435 j->play_mode = -1;
4436 j->write_buffer = NULL;
4437 j->write_buffer_size = 0;
4438 retval = 1;
4439 break;
4440 }
4441 return retval;
4442 }
4443
4444 static int ixj_play_start(IXJ *j)
4445 {
4446 unsigned short cmd = 0x0000;
4447
4448 if (j->write_buffer) {
4449 ixj_play_stop(j);
4450 }
4451
4452 if(ixjdebug & 0x0002)
4453 printk("IXJ %d Starting Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4454
4455 j->flags.playing = 1;
4456 ixj_WriteDSPCommand(0x0FE0, j); /* Put the DSP in full power mode. */
4457
4458 j->flags.play_first_frame = 1;
4459 j->drybuffer = 0;
4460
4461 if (!j->play_mode) {
4462 switch (j->play_codec) {
4463 case G723_63:
4464 cmd = 0x5231;
4465 break;
4466 case G723_53:
4467 cmd = 0x5232;
4468 break;
4469 case TS85:
4470 cmd = 0x5230; /* TrueSpeech 8.5 */
4471
4472 break;
4473 case TS48:
4474 cmd = 0x5233; /* TrueSpeech 4.8 */
4475
4476 break;
4477 case TS41:
4478 cmd = 0x5234; /* TrueSpeech 4.1 */
4479
4480 break;
4481 case G728:
4482 cmd = 0x5235;
4483 break;
4484 case G729:
4485 case G729B:
4486 cmd = 0x5236;
4487 break;
4488 default:
4489 return 1;
4490 }
4491 if (ixj_WriteDSPCommand(cmd, j))
4492 return -1;
4493 }
4494 j->write_buffer = kmalloc(j->play_frame_size * 2, GFP_ATOMIC);
4495 if (!j->write_buffer) {
4496 printk("Write buffer allocation for ixj board %d failed!\n", j->board);
4497 return -ENOMEM;
4498 }
4499 /* j->write_buffers_empty = 2; */
4500 j->write_buffers_empty = 1;
4501 j->write_buffer_size = j->play_frame_size * 2;
4502 j->write_buffer_end = j->write_buffer + j->play_frame_size * 2;
4503 j->write_buffer_rp = j->write_buffer_wp = j->write_buffer;
4504
4505 if (ixj_WriteDSPCommand(0x5202, j)) /* Set Poll sync mode */
4506
4507 return -1;
4508
4509 switch (j->play_mode) {
4510 case 0:
4511 cmd = 0x2C03;
4512 break;
4513 case 2:
4514 if (j->ver.low == 0x12) {
4515 cmd = 0x2C23;
4516 } else {
4517 cmd = 0x2C21;
4518 }
4519 break;
4520 case 4:
4521 if (j->ver.low == 0x12) {
4522 cmd = 0x2C43;
4523 } else {
4524 cmd = 0x2C41;
4525 }
4526 break;
4527 case 5:
4528 if (j->ver.low == 0x12) {
4529 cmd = 0x2C53;
4530 } else {
4531 cmd = 0x2C51;
4532 }
4533 break;
4534 case 6:
4535 if (j->ver.low == 0x12) {
4536 cmd = 0x2C63;
4537 } else {
4538 cmd = 0x2C61;
4539 }
4540 break;
4541 }
4542 if (ixj_WriteDSPCommand(cmd, j))
4543 return -1;
4544
4545 if (ixj_WriteDSPCommand(0x2000, j)) /* Playback C2 */
4546 return -1;
4547
4548 if (ixj_WriteDSPCommand(0x2000 + j->play_frame_size, j)) /* Playback C3 */
4549 return -1;
4550
4551 if (j->flags.recording) {
4552 ixj_aec_start(j, j->aec_level);
4553 }
4554
4555 return 0;
4556 }
4557
4558 static void ixj_play_stop(IXJ *j)
4559 {
4560 if (ixjdebug & 0x0002)
4561 printk("IXJ %d Stopping Play Codec %d at %ld\n", j->board, j->play_codec, jiffies);
4562
4563 kfree(j->write_buffer);
4564 j->write_buffer = NULL;
4565 j->write_buffer_size = 0;
4566 if (j->play_mode > -1) {
4567 ixj_WriteDSPCommand(0x5221, j); /* Stop playback and flush buffers. 8022 reference page 9-40 */
4568
4569 j->play_mode = -1;
4570 }
4571 j->flags.playing = 0;
4572 }
4573
4574 static inline int get_play_level(IXJ *j)
4575 {
4576 int retval;
4577
4578 ixj_WriteDSPCommand(0xCF8F, j); /* 8022 Reference page 9-38 */
4579 return j->ssr.high << 8 | j->ssr.low;
4580 retval = j->ssr.high << 8 | j->ssr.low;
4581 retval = (retval * 256) / 240;
4582 return retval;
4583 }
4584
4585 static unsigned int ixj_poll(struct file *file_p, poll_table * wait)
4586 {
4587 unsigned int mask = 0;
4588
4589 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
4590
4591 poll_wait(file_p, &(j->poll_q), wait);
4592 if (j->read_buffer_ready > 0)
4593 mask |= POLLIN | POLLRDNORM; /* readable */
4594 if (j->write_buffers_empty > 0)
4595 mask |= POLLOUT | POLLWRNORM; /* writable */
4596 if (j->ex.bytes)
4597 mask |= POLLPRI;
4598 return mask;
4599 }
4600
4601 static int ixj_play_tone(IXJ *j, char tone)
4602 {
4603 if (!j->tone_state) {
4604 if(ixjdebug & 0x0002) {
4605 printk("IXJ %d starting tone %d at %ld\n", j->board, tone, jiffies);
4606 }
4607 if (j->dsp.low == 0x20) {
4608 idle(j);
4609 }
4610 j->tone_start_jif = jiffies;
4611
4612 j->tone_state = 1;
4613 }
4614
4615 j->tone_index = tone;
4616 if (ixj_WriteDSPCommand(0x6000 + j->tone_index, j))
4617 return -1;
4618
4619 return 0;
4620 }
4621
4622 static int ixj_set_tone_on(unsigned short arg, IXJ *j)
4623 {
4624 j->tone_on_time = arg;
4625
4626 if (ixj_WriteDSPCommand(0x6E04, j)) /* Set Tone On Period */
4627
4628 return -1;
4629
4630 if (ixj_WriteDSPCommand(arg, j))
4631 return -1;
4632
4633 return 0;
4634 }
4635
4636 static int SCI_WaitHighSCI(IXJ *j)
4637 {
4638 int cnt;
4639
4640 j->pld_scrr.byte = inb_p(j->XILINXbase);
4641 if (!j->pld_scrr.bits.sci) {
4642 for (cnt = 0; cnt < 10; cnt++) {
4643 udelay(32);
4644 j->pld_scrr.byte = inb_p(j->XILINXbase);
4645
4646 if ((j->pld_scrr.bits.sci))
4647 return 1;
4648 }
4649 if (ixjdebug & 0x0001)
4650 printk(KERN_INFO "SCI Wait High failed %x\n", j->pld_scrr.byte);
4651 return 0;
4652 } else
4653 return 1;
4654 }
4655
4656 static int SCI_WaitLowSCI(IXJ *j)
4657 {
4658 int cnt;
4659
4660 j->pld_scrr.byte = inb_p(j->XILINXbase);
4661 if (j->pld_scrr.bits.sci) {
4662 for (cnt = 0; cnt < 10; cnt++) {
4663 udelay(32);
4664 j->pld_scrr.byte = inb_p(j->XILINXbase);
4665
4666 if (!(j->pld_scrr.bits.sci))
4667 return 1;
4668 }
4669 if (ixjdebug & 0x0001)
4670 printk(KERN_INFO "SCI Wait Low failed %x\n", j->pld_scrr.byte);
4671 return 0;
4672 } else
4673 return 1;
4674 }
4675
4676 static int SCI_Control(IXJ *j, int control)
4677 {
4678 switch (control) {
4679 case SCI_End:
4680 j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
4681
4682 j->pld_scrw.bits.c1 = 0; /* to no selection */
4683
4684 break;
4685 case SCI_Enable_DAA:
4686 j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
4687
4688 j->pld_scrw.bits.c1 = 0; /* to write to DAA */
4689
4690 break;
4691 case SCI_Enable_Mixer:
4692 j->pld_scrw.bits.c0 = 0; /* Set PLD Serial control interface */
4693
4694 j->pld_scrw.bits.c1 = 1; /* to write to mixer */
4695
4696 break;
4697 case SCI_Enable_EEPROM:
4698 j->pld_scrw.bits.c0 = 1; /* Set PLD Serial control interface */
4699
4700 j->pld_scrw.bits.c1 = 1; /* to write to EEPROM */
4701
4702 break;
4703 default:
4704 return 0;
4705 break;
4706 }
4707 outb_p(j->pld_scrw.byte, j->XILINXbase);
4708
4709 switch (control) {
4710 case SCI_End:
4711 return 1;
4712 break;
4713 case SCI_Enable_DAA:
4714 case SCI_Enable_Mixer:
4715 case SCI_Enable_EEPROM:
4716 if (!SCI_WaitHighSCI(j))
4717 return 0;
4718 break;
4719 default:
4720 return 0;
4721 break;
4722 }
4723 return 1;
4724 }
4725
4726 static int SCI_Prepare(IXJ *j)
4727 {
4728 if (!SCI_Control(j, SCI_End))
4729 return 0;
4730
4731 if (!SCI_WaitLowSCI(j))
4732 return 0;
4733
4734 return 1;
4735 }
4736
4737 static int ixj_get_mixer(long val, IXJ *j)
4738 {
4739 int reg = (val & 0x1F00) >> 8;
4740 return j->mix.vol[reg];
4741 }
4742
4743 static int ixj_mixer(long val, IXJ *j)
4744 {
4745 BYTES bytes;
4746
4747 bytes.high = (val & 0x1F00) >> 8;
4748 bytes.low = val & 0x00FF;
4749
4750 /* save mixer value so we can get back later on */
4751 j->mix.vol[bytes.high] = bytes.low;
4752
4753 outb_p(bytes.high & 0x1F, j->XILINXbase + 0x03); /* Load Mixer Address */
4754
4755 outb_p(bytes.low, j->XILINXbase + 0x02); /* Load Mixer Data */
4756
4757 SCI_Control(j, SCI_Enable_Mixer);
4758
4759 SCI_Control(j, SCI_End);
4760
4761 return 0;
4762 }
4763
4764 static int daa_load(BYTES * p_bytes, IXJ *j)
4765 {
4766 outb_p(p_bytes->high, j->XILINXbase + 0x03);
4767 outb_p(p_bytes->low, j->XILINXbase + 0x02);
4768 if (!SCI_Control(j, SCI_Enable_DAA))
4769 return 0;
4770 else
4771 return 1;
4772 }
4773
4774 static int ixj_daa_cr4(IXJ *j, char reg)
4775 {
4776 BYTES bytes;
4777
4778 switch (j->daa_mode) {
4779 case SOP_PU_SLEEP:
4780 bytes.high = 0x14;
4781 break;
4782 case SOP_PU_RINGING:
4783 bytes.high = 0x54;
4784 break;
4785 case SOP_PU_CONVERSATION:
4786 bytes.high = 0x94;
4787 break;
4788 case SOP_PU_PULSEDIALING:
4789 bytes.high = 0xD4;
4790 break;
4791 }
4792
4793 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = reg;
4794
4795 switch (j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGX) {
4796 case 0:
4797 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 0;
4798 break;
4799 case 1:
4800 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 2;
4801 break;
4802 case 2:
4803 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 1;
4804 break;
4805 case 3:
4806 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.bitreg.AGR_Z = 3;
4807 break;
4808 }
4809
4810 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
4811
4812 if (!daa_load(&bytes, j))
4813 return 0;
4814
4815 if (!SCI_Prepare(j))
4816 return 0;
4817
4818 return 1;
4819 }
4820
4821 static char daa_int_read(IXJ *j)
4822 {
4823 BYTES bytes;
4824
4825 if (!SCI_Prepare(j))
4826 return 0;
4827
4828 bytes.high = 0x38;
4829 bytes.low = 0x00;
4830 outb_p(bytes.high, j->XILINXbase + 0x03);
4831 outb_p(bytes.low, j->XILINXbase + 0x02);
4832
4833 if (!SCI_Control(j, SCI_Enable_DAA))
4834 return 0;
4835
4836 bytes.high = inb_p(j->XILINXbase + 0x03);
4837 bytes.low = inb_p(j->XILINXbase + 0x02);
4838 if (bytes.low != ALISDAA_ID_BYTE) {
4839 if (ixjdebug & 0x0001)
4840 printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
4841 return 0;
4842 }
4843 if (!SCI_Control(j, SCI_Enable_DAA))
4844 return 0;
4845 if (!SCI_Control(j, SCI_End))
4846 return 0;
4847
4848 bytes.high = inb_p(j->XILINXbase + 0x03);
4849 bytes.low = inb_p(j->XILINXbase + 0x02);
4850
4851 j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.reg = bytes.high;
4852
4853 return 1;
4854 }
4855
4856 static char daa_CR_read(IXJ *j, int cr)
4857 {
4858 IXJ_WORD wdata;
4859 BYTES bytes;
4860
4861 if (!SCI_Prepare(j))
4862 return 0;
4863
4864 switch (j->daa_mode) {
4865 case SOP_PU_SLEEP:
4866 bytes.high = 0x30 + cr;
4867 break;
4868 case SOP_PU_RINGING:
4869 bytes.high = 0x70 + cr;
4870 break;
4871 case SOP_PU_CONVERSATION:
4872 bytes.high = 0xB0 + cr;
4873 break;
4874 case SOP_PU_PULSEDIALING:
4875 default:
4876 bytes.high = 0xF0 + cr;
4877 break;
4878 }
4879
4880 bytes.low = 0x00;
4881
4882 outb_p(bytes.high, j->XILINXbase + 0x03);
4883 outb_p(bytes.low, j->XILINXbase + 0x02);
4884
4885 if (!SCI_Control(j, SCI_Enable_DAA))
4886 return 0;
4887
4888 bytes.high = inb_p(j->XILINXbase + 0x03);
4889 bytes.low = inb_p(j->XILINXbase + 0x02);
4890 if (bytes.low != ALISDAA_ID_BYTE) {
4891 if (ixjdebug & 0x0001)
4892 printk("Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
4893 return 0;
4894 }
4895 if (!SCI_Control(j, SCI_Enable_DAA))
4896 return 0;
4897 if (!SCI_Control(j, SCI_End))
4898 return 0;
4899
4900 wdata.word = inw_p(j->XILINXbase + 0x02);
4901
4902 switch(cr){
4903 case 5:
4904 j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = wdata.bytes.high;
4905 break;
4906 case 4:
4907 j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg = wdata.bytes.high;
4908 break;
4909 case 3:
4910 j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg = wdata.bytes.high;
4911 break;
4912 case 2:
4913 j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg = wdata.bytes.high;
4914 break;
4915 case 1:
4916 j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg = wdata.bytes.high;
4917 break;
4918 case 0:
4919 j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg = wdata.bytes.high;
4920 break;
4921 default:
4922 return 0;
4923 }
4924 return 1;
4925 }
4926
4927 static int ixj_daa_cid_reset(IXJ *j)
4928 {
4929 int i;
4930 BYTES bytes;
4931
4932 if (ixjdebug & 0x0002)
4933 printk("DAA Clearing CID ram\n");
4934
4935 if (!SCI_Prepare(j))
4936 return 0;
4937
4938 bytes.high = 0x58;
4939 bytes.low = 0x00;
4940 outb_p(bytes.high, j->XILINXbase + 0x03);
4941 outb_p(bytes.low, j->XILINXbase + 0x02);
4942
4943 if (!SCI_Control(j, SCI_Enable_DAA))
4944 return 0;
4945
4946 if (!SCI_WaitHighSCI(j))
4947 return 0;
4948
4949 for (i = 0; i < ALISDAA_CALLERID_SIZE - 1; i += 2) {
4950 bytes.high = bytes.low = 0x00;
4951 outb_p(bytes.high, j->XILINXbase + 0x03);
4952
4953 if (i < ALISDAA_CALLERID_SIZE - 1)
4954 outb_p(bytes.low, j->XILINXbase + 0x02);
4955
4956 if (!SCI_Control(j, SCI_Enable_DAA))
4957 return 0;
4958
4959 if (!SCI_WaitHighSCI(j))
4960 return 0;
4961
4962 }
4963
4964 if (!SCI_Control(j, SCI_End))
4965 return 0;
4966
4967 if (ixjdebug & 0x0002)
4968 printk("DAA CID ram cleared\n");
4969
4970 return 1;
4971 }
4972
4973 static int ixj_daa_cid_read(IXJ *j)
4974 {
4975 int i;
4976 BYTES bytes;
4977 char CID[ALISDAA_CALLERID_SIZE];
4978 bool mContinue;
4979 char *pIn, *pOut;
4980
4981 if (!SCI_Prepare(j))
4982 return 0;
4983
4984 bytes.high = 0x78;
4985 bytes.low = 0x00;
4986 outb_p(bytes.high, j->XILINXbase + 0x03);
4987 outb_p(bytes.low, j->XILINXbase + 0x02);
4988
4989 if (!SCI_Control(j, SCI_Enable_DAA))
4990 return 0;
4991
4992 if (!SCI_WaitHighSCI(j))
4993 return 0;
4994
4995 bytes.high = inb_p(j->XILINXbase + 0x03);
4996 bytes.low = inb_p(j->XILINXbase + 0x02);
4997 if (bytes.low != ALISDAA_ID_BYTE) {
4998 if (ixjdebug & 0x0001)
4999 printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
5000 return 0;
5001 }
5002 for (i = 0; i < ALISDAA_CALLERID_SIZE; i += 2) {
5003 bytes.high = bytes.low = 0x00;
5004 outb_p(bytes.high, j->XILINXbase + 0x03);
5005 outb_p(bytes.low, j->XILINXbase + 0x02);
5006
5007 if (!SCI_Control(j, SCI_Enable_DAA))
5008 return 0;
5009
5010 if (!SCI_WaitHighSCI(j))
5011 return 0;
5012
5013 CID[i + 0] = inb_p(j->XILINXbase + 0x03);
5014 CID[i + 1] = inb_p(j->XILINXbase + 0x02);
5015 }
5016
5017 if (!SCI_Control(j, SCI_End))
5018 return 0;
5019
5020 pIn = CID;
5021 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
5022 mContinue = true;
5023 while (mContinue) {
5024 if ((pIn[1] & 0x03) == 0x01) {
5025 pOut[0] = pIn[0];
5026 }
5027 if ((pIn[2] & 0x0c) == 0x04) {
5028 pOut[1] = ((pIn[2] & 0x03) << 6) | ((pIn[1] & 0xfc) >> 2);
5029 }
5030 if ((pIn[3] & 0x30) == 0x10) {
5031 pOut[2] = ((pIn[3] & 0x0f) << 4) | ((pIn[2] & 0xf0) >> 4);
5032 }
5033 if ((pIn[4] & 0xc0) == 0x40) {
5034 pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6);
5035 } else {
5036 mContinue = false;
5037 }
5038 pIn += 5, pOut += 4;
5039 }
5040 memset(&j->cid, 0, sizeof(PHONE_CID));
5041 pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID;
5042 pOut += 4;
5043 strncpy(j->cid.month, pOut, 2);
5044 pOut += 2;
5045 strncpy(j->cid.day, pOut, 2);
5046 pOut += 2;
5047 strncpy(j->cid.hour, pOut, 2);
5048 pOut += 2;
5049 strncpy(j->cid.min, pOut, 2);
5050 pOut += 3;
5051 j->cid.numlen = *pOut;
5052 pOut += 1;
5053 strncpy(j->cid.number, pOut, j->cid.numlen);
5054 pOut += j->cid.numlen + 1;
5055 j->cid.namelen = *pOut;
5056 pOut += 1;
5057 strncpy(j->cid.name, pOut, j->cid.namelen);
5058
5059 ixj_daa_cid_reset(j);
5060 return 1;
5061 }
5062
5063 static char daa_get_version(IXJ *j)
5064 {
5065 BYTES bytes;
5066
5067 if (!SCI_Prepare(j))
5068 return 0;
5069
5070 bytes.high = 0x35;
5071 bytes.low = 0x00;
5072 outb_p(bytes.high, j->XILINXbase + 0x03);
5073 outb_p(bytes.low, j->XILINXbase + 0x02);
5074
5075 if (!SCI_Control(j, SCI_Enable_DAA))
5076 return 0;
5077
5078 bytes.high = inb_p(j->XILINXbase + 0x03);
5079 bytes.low = inb_p(j->XILINXbase + 0x02);
5080 if (bytes.low != ALISDAA_ID_BYTE) {
5081 if (ixjdebug & 0x0001)
5082 printk("DAA Get Version Cannot read DAA ID Byte high = %d low = %d\n", bytes.high, bytes.low);
5083 return 0;
5084 }
5085 if (!SCI_Control(j, SCI_Enable_DAA))
5086 return 0;
5087
5088 if (!SCI_Control(j, SCI_End))
5089 return 0;
5090
5091 bytes.high = inb_p(j->XILINXbase + 0x03);
5092 bytes.low = inb_p(j->XILINXbase + 0x02);
5093 if (ixjdebug & 0x0002)
5094 printk("DAA CR5 Byte high = 0x%x low = 0x%x\n", bytes.high, bytes.low);
5095 j->m_DAAShadowRegs.SOP_REGS.SOP.cr5.reg = bytes.high;
5096 return bytes.high;
5097 }
5098
5099 static int daa_set_mode(IXJ *j, int mode)
5100 {
5101 /* NOTE:
5102 The DAA *MUST* be in the conversation mode if the
5103 PSTN line is to be seized (PSTN line off-hook).
5104 Taking the PSTN line off-hook while the DAA is in
5105 a mode other than conversation mode will cause a
5106 hardware failure of the ALIS-A part.
5107
5108 NOTE:
5109 The DAA can only go to SLEEP, RINGING or PULSEDIALING modes
5110 if the PSTN line is on-hook. Failure to have the PSTN line
5111 in the on-hook state WILL CAUSE A HARDWARE FAILURE OF THE
5112 ALIS-A part.
5113 */
5114
5115 BYTES bytes;
5116
5117 j->flags.pstn_rmr = 0;
5118
5119 if (!SCI_Prepare(j))
5120 return 0;
5121
5122 switch (mode) {
5123 case SOP_PU_RESET:
5124 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5125
5126 outb_p(j->pld_scrw.byte, j->XILINXbase);
5127 j->pld_slicw.bits.rly2 = 0;
5128 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5129 bytes.high = 0x10;
5130 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5131 daa_load(&bytes, j);
5132 if (!SCI_Prepare(j))
5133 return 0;
5134
5135 j->daa_mode = SOP_PU_SLEEP;
5136 break;
5137 case SOP_PU_SLEEP:
5138 if(j->daa_mode == SOP_PU_SLEEP)
5139 {
5140 break;
5141 }
5142 if (ixjdebug & 0x0008)
5143 printk(KERN_INFO "phone DAA: SOP_PU_SLEEP at %ld\n", jiffies);
5144 /* if(j->daa_mode == SOP_PU_CONVERSATION) */
5145 {
5146 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5147
5148 outb_p(j->pld_scrw.byte, j->XILINXbase);
5149 j->pld_slicw.bits.rly2 = 0;
5150 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5151 bytes.high = 0x10;
5152 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5153 daa_load(&bytes, j);
5154 if (!SCI_Prepare(j))
5155 return 0;
5156 }
5157 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5158
5159 outb_p(j->pld_scrw.byte, j->XILINXbase);
5160 j->pld_slicw.bits.rly2 = 0;
5161 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5162 bytes.high = 0x10;
5163 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5164 daa_load(&bytes, j);
5165 if (!SCI_Prepare(j))
5166 return 0;
5167
5168 j->daa_mode = SOP_PU_SLEEP;
5169 j->flags.pstn_ringing = 0;
5170 j->ex.bits.pstn_ring = 0;
5171 j->pstn_sleeptil = jiffies + (hertz / 4);
5172 wake_up_interruptible(&j->read_q); /* Wake any blocked readers */
5173 wake_up_interruptible(&j->write_q); /* Wake any blocked writers */
5174 wake_up_interruptible(&j->poll_q); /* Wake any blocked selects */
5175 break;
5176 case SOP_PU_RINGING:
5177 if (ixjdebug & 0x0008)
5178 printk(KERN_INFO "phone DAA: SOP_PU_RINGING at %ld\n", jiffies);
5179 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5180
5181 outb_p(j->pld_scrw.byte, j->XILINXbase);
5182 j->pld_slicw.bits.rly2 = 0;
5183 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5184 bytes.high = 0x50;
5185 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5186 daa_load(&bytes, j);
5187 if (!SCI_Prepare(j))
5188 return 0;
5189 j->daa_mode = SOP_PU_RINGING;
5190 break;
5191 case SOP_PU_CONVERSATION:
5192 if (ixjdebug & 0x0008)
5193 printk(KERN_INFO "phone DAA: SOP_PU_CONVERSATION at %ld\n", jiffies);
5194 bytes.high = 0x90;
5195 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5196 daa_load(&bytes, j);
5197 if (!SCI_Prepare(j))
5198 return 0;
5199 j->pld_slicw.bits.rly2 = 1;
5200 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5201 j->pld_scrw.bits.daafsyncen = 1; /* Turn on DAA Frame Sync */
5202
5203 outb_p(j->pld_scrw.byte, j->XILINXbase);
5204 j->daa_mode = SOP_PU_CONVERSATION;
5205 j->flags.pstn_ringing = 0;
5206 j->ex.bits.pstn_ring = 0;
5207 j->pstn_sleeptil = jiffies;
5208 j->pstn_ring_start = j->pstn_ring_stop = j->pstn_ring_int = 0;
5209 break;
5210 case SOP_PU_PULSEDIALING:
5211 if (ixjdebug & 0x0008)
5212 printk(KERN_INFO "phone DAA: SOP_PU_PULSEDIALING at %ld\n", jiffies);
5213 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
5214
5215 outb_p(j->pld_scrw.byte, j->XILINXbase);
5216 j->pld_slicw.bits.rly2 = 0;
5217 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
5218 bytes.high = 0xD0;
5219 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5220 daa_load(&bytes, j);
5221 if (!SCI_Prepare(j))
5222 return 0;
5223 j->daa_mode = SOP_PU_PULSEDIALING;
5224 break;
5225 default:
5226 break;
5227 }
5228 return 1;
5229 }
5230
5231 static int ixj_daa_write(IXJ *j)
5232 {
5233 BYTES bytes;
5234
5235 j->flags.pstncheck = 1;
5236
5237 daa_set_mode(j, SOP_PU_SLEEP);
5238
5239 if (!SCI_Prepare(j))
5240 return 0;
5241
5242 outb_p(j->pld_scrw.byte, j->XILINXbase);
5243
5244 bytes.high = 0x14;
5245 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr4.reg;
5246 if (!daa_load(&bytes, j))
5247 return 0;
5248
5249 bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr3.reg;
5250 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr2.reg;
5251 if (!daa_load(&bytes, j))
5252 return 0;
5253
5254 bytes.high = j->m_DAAShadowRegs.SOP_REGS.SOP.cr1.reg;
5255 bytes.low = j->m_DAAShadowRegs.SOP_REGS.SOP.cr0.reg;
5256 if (!daa_load(&bytes, j))
5257 return 0;
5258
5259 if (!SCI_Prepare(j))
5260 return 0;
5261
5262 bytes.high = 0x1F;
5263 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr7.reg;
5264 if (!daa_load(&bytes, j))
5265 return 0;
5266
5267 bytes.high = j->m_DAAShadowRegs.XOP_xr6_W.reg;
5268 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr5.reg;
5269 if (!daa_load(&bytes, j))
5270 return 0;
5271
5272 bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr4.reg;
5273 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr3.reg;
5274 if (!daa_load(&bytes, j))
5275 return 0;
5276
5277 bytes.high = j->m_DAAShadowRegs.XOP_REGS.XOP.xr2.reg;
5278 bytes.low = j->m_DAAShadowRegs.XOP_REGS.XOP.xr1.reg;
5279 if (!daa_load(&bytes, j))
5280 return 0;
5281
5282 bytes.high = j->m_DAAShadowRegs.XOP_xr0_W.reg;
5283 bytes.low = 0x00;
5284 if (!daa_load(&bytes, j))
5285 return 0;
5286
5287 if (!SCI_Prepare(j))
5288 return 0;
5289
5290 bytes.high = 0x00;
5291 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[7];
5292 if (!daa_load(&bytes, j))
5293 return 0;
5294
5295 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[6];
5296 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[5];
5297 if (!daa_load(&bytes, j))
5298 return 0;
5299
5300 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[4];
5301 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[3];
5302 if (!daa_load(&bytes, j))
5303 return 0;
5304
5305 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[2];
5306 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[1];
5307 if (!daa_load(&bytes, j))
5308 return 0;
5309
5310 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_1[0];
5311 bytes.low = 0x00;
5312 if (!daa_load(&bytes, j))
5313 return 0;
5314
5315 if (!SCI_Control(j, SCI_End))
5316 return 0;
5317 if (!SCI_WaitLowSCI(j))
5318 return 0;
5319
5320 bytes.high = 0x01;
5321 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[7];
5322 if (!daa_load(&bytes, j))
5323 return 0;
5324
5325 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[6];
5326 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[5];
5327 if (!daa_load(&bytes, j))
5328 return 0;
5329
5330 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[4];
5331 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[3];
5332 if (!daa_load(&bytes, j))
5333 return 0;
5334
5335 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[2];
5336 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[1];
5337 if (!daa_load(&bytes, j))
5338 return 0;
5339
5340 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_2[0];
5341 bytes.low = 0x00;
5342 if (!daa_load(&bytes, j))
5343 return 0;
5344
5345 if (!SCI_Control(j, SCI_End))
5346 return 0;
5347 if (!SCI_WaitLowSCI(j))
5348 return 0;
5349
5350 bytes.high = 0x02;
5351 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[7];
5352 if (!daa_load(&bytes, j))
5353 return 0;
5354
5355 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[6];
5356 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[5];
5357 if (!daa_load(&bytes, j))
5358 return 0;
5359
5360 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[4];
5361 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[3];
5362 if (!daa_load(&bytes, j))
5363 return 0;
5364
5365 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[2];
5366 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[1];
5367 if (!daa_load(&bytes, j))
5368 return 0;
5369
5370 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.THFilterCoeff_3[0];
5371 bytes.low = 0x00;
5372 if (!daa_load(&bytes, j))
5373 return 0;
5374
5375 if (!SCI_Control(j, SCI_End))
5376 return 0;
5377 if (!SCI_WaitLowSCI(j))
5378 return 0;
5379
5380 bytes.high = 0x03;
5381 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[7];
5382 if (!daa_load(&bytes, j))
5383 return 0;
5384
5385 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[6];
5386 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[5];
5387 if (!daa_load(&bytes, j))
5388 return 0;
5389
5390 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[4];
5391 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[3];
5392 if (!daa_load(&bytes, j))
5393 return 0;
5394
5395 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[2];
5396 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[1];
5397 if (!daa_load(&bytes, j))
5398 return 0;
5399
5400 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_1[0];
5401 bytes.low = 0x00;
5402 if (!daa_load(&bytes, j))
5403 return 0;
5404
5405 if (!SCI_Control(j, SCI_End))
5406 return 0;
5407 if (!SCI_WaitLowSCI(j))
5408 return 0;
5409
5410 bytes.high = 0x04;
5411 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[7];
5412 if (!daa_load(&bytes, j))
5413 return 0;
5414
5415 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[6];
5416 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[5];
5417 if (!daa_load(&bytes, j))
5418 return 0;
5419
5420 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[4];
5421 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[3];
5422 if (!daa_load(&bytes, j))
5423 return 0;
5424
5425 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[2];
5426 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[1];
5427 if (!daa_load(&bytes, j))
5428 return 0;
5429
5430 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_1[0];
5431 bytes.low = 0x00;
5432 if (!daa_load(&bytes, j))
5433 return 0;
5434
5435 if (!SCI_Control(j, SCI_End))
5436 return 0;
5437 if (!SCI_WaitLowSCI(j))
5438 return 0;
5439
5440 bytes.high = 0x05;
5441 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[7];
5442 if (!daa_load(&bytes, j))
5443 return 0;
5444
5445 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[6];
5446 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[5];
5447 if (!daa_load(&bytes, j))
5448 return 0;
5449
5450 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[4];
5451 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[3];
5452 if (!daa_load(&bytes, j))
5453 return 0;
5454
5455 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[2];
5456 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[1];
5457 if (!daa_load(&bytes, j))
5458 return 0;
5459
5460 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.IMFilterCoeff_2[0];
5461 bytes.low = 0x00;
5462 if (!daa_load(&bytes, j))
5463 return 0;
5464
5465 if (!SCI_Control(j, SCI_End))
5466 return 0;
5467 if (!SCI_WaitLowSCI(j))
5468 return 0;
5469
5470 bytes.high = 0x06;
5471 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[7];
5472 if (!daa_load(&bytes, j))
5473 return 0;
5474
5475 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[6];
5476 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[5];
5477 if (!daa_load(&bytes, j))
5478 return 0;
5479
5480 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[4];
5481 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[3];
5482 if (!daa_load(&bytes, j))
5483 return 0;
5484
5485 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[2];
5486 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[1];
5487 if (!daa_load(&bytes, j))
5488 return 0;
5489
5490 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.RingerImpendance_2[0];
5491 bytes.low = 0x00;
5492 if (!daa_load(&bytes, j))
5493 return 0;
5494
5495 if (!SCI_Control(j, SCI_End))
5496 return 0;
5497 if (!SCI_WaitLowSCI(j))
5498 return 0;
5499
5500 bytes.high = 0x07;
5501 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[7];
5502 if (!daa_load(&bytes, j))
5503 return 0;
5504
5505 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[6];
5506 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[5];
5507 if (!daa_load(&bytes, j))
5508 return 0;
5509
5510 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[4];
5511 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[3];
5512 if (!daa_load(&bytes, j))
5513 return 0;
5514
5515 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[2];
5516 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[1];
5517 if (!daa_load(&bytes, j))
5518 return 0;
5519
5520 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRRFilterCoeff[0];
5521 bytes.low = 0x00;
5522 if (!daa_load(&bytes, j))
5523 return 0;
5524
5525 if (!SCI_Control(j, SCI_End))
5526 return 0;
5527 if (!SCI_WaitLowSCI(j))
5528 return 0;
5529
5530 bytes.high = 0x08;
5531 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[7];
5532 if (!daa_load(&bytes, j))
5533 return 0;
5534
5535 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[6];
5536 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[5];
5537 if (!daa_load(&bytes, j))
5538 return 0;
5539
5540 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[4];
5541 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[3];
5542 if (!daa_load(&bytes, j))
5543 return 0;
5544
5545 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[2];
5546 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[1];
5547 if (!daa_load(&bytes, j))
5548 return 0;
5549
5550 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.FRXFilterCoeff[0];
5551 bytes.low = 0x00;
5552 if (!daa_load(&bytes, j))
5553 return 0;
5554
5555 if (!SCI_Control(j, SCI_End))
5556 return 0;
5557 if (!SCI_WaitLowSCI(j))
5558 return 0;
5559
5560 bytes.high = 0x09;
5561 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[3];
5562 if (!daa_load(&bytes, j))
5563 return 0;
5564
5565 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[2];
5566 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[1];
5567 if (!daa_load(&bytes, j))
5568 return 0;
5569
5570 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.ARFilterCoeff[0];
5571 bytes.low = 0x00;
5572 if (!daa_load(&bytes, j))
5573 return 0;
5574
5575 if (!SCI_Control(j, SCI_End))
5576 return 0;
5577 if (!SCI_WaitLowSCI(j))
5578 return 0;
5579
5580 bytes.high = 0x0A;
5581 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[3];
5582 if (!daa_load(&bytes, j))
5583 return 0;
5584
5585 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[2];
5586 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[1];
5587 if (!daa_load(&bytes, j))
5588 return 0;
5589
5590 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.AXFilterCoeff[0];
5591 bytes.low = 0x00;
5592 if (!daa_load(&bytes, j))
5593 return 0;
5594
5595 if (!SCI_Control(j, SCI_End))
5596 return 0;
5597 if (!SCI_WaitLowSCI(j))
5598 return 0;
5599
5600 bytes.high = 0x0B;
5601 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[3];
5602 if (!daa_load(&bytes, j))
5603 return 0;
5604
5605 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[2];
5606 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[1];
5607 if (!daa_load(&bytes, j))
5608 return 0;
5609
5610 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone1Coeff[0];
5611 bytes.low = 0x00;
5612 if (!daa_load(&bytes, j))
5613 return 0;
5614
5615 if (!SCI_Control(j, SCI_End))
5616 return 0;
5617 if (!SCI_WaitLowSCI(j))
5618 return 0;
5619
5620 bytes.high = 0x0C;
5621 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[3];
5622 if (!daa_load(&bytes, j))
5623 return 0;
5624
5625 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[2];
5626 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[1];
5627 if (!daa_load(&bytes, j))
5628 return 0;
5629
5630 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.Tone2Coeff[0];
5631 bytes.low = 0x00;
5632 if (!daa_load(&bytes, j))
5633 return 0;
5634
5635 if (!SCI_Control(j, SCI_End))
5636 return 0;
5637 if (!SCI_WaitLowSCI(j))
5638 return 0;
5639
5640 bytes.high = 0x0D;
5641 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[3];
5642 if (!daa_load(&bytes, j))
5643 return 0;
5644
5645 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[2];
5646 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[1];
5647 if (!daa_load(&bytes, j))
5648 return 0;
5649
5650 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.LevelmeteringRinging[0];
5651 bytes.low = 0x00;
5652 if (!daa_load(&bytes, j))
5653 return 0;
5654
5655 if (!SCI_Control(j, SCI_End))
5656 return 0;
5657 if (!SCI_WaitLowSCI(j))
5658 return 0;
5659
5660 bytes.high = 0x0E;
5661 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[7];
5662 if (!daa_load(&bytes, j))
5663 return 0;
5664
5665 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[6];
5666 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[5];
5667 if (!daa_load(&bytes, j))
5668 return 0;
5669
5670 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[4];
5671 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[3];
5672 if (!daa_load(&bytes, j))
5673 return 0;
5674
5675 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[2];
5676 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[1];
5677 if (!daa_load(&bytes, j))
5678 return 0;
5679
5680 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID1stTone[0];
5681 bytes.low = 0x00;
5682 if (!daa_load(&bytes, j))
5683 return 0;
5684
5685 if (!SCI_Control(j, SCI_End))
5686 return 0;
5687 if (!SCI_WaitLowSCI(j))
5688 return 0;
5689
5690 bytes.high = 0x0F;
5691 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[7];
5692 if (!daa_load(&bytes, j))
5693 return 0;
5694
5695 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[6];
5696 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[5];
5697 if (!daa_load(&bytes, j))
5698 return 0;
5699
5700 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[4];
5701 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[3];
5702 if (!daa_load(&bytes, j))
5703 return 0;
5704
5705 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[2];
5706 bytes.low = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[1];
5707 if (!daa_load(&bytes, j))
5708 return 0;
5709
5710 bytes.high = j->m_DAAShadowRegs.COP_REGS.COP.CallerID2ndTone[0];
5711 bytes.low = 0x00;
5712 if (!daa_load(&bytes, j))
5713 return 0;
5714
5715 udelay(32);
5716 j->pld_scrr.byte = inb_p(j->XILINXbase);
5717 if (!SCI_Control(j, SCI_End))
5718 return 0;
5719
5720 outb_p(j->pld_scrw.byte, j->XILINXbase);
5721
5722 if (ixjdebug & 0x0002)
5723 printk("DAA Coefficients Loaded\n");
5724
5725 j->flags.pstncheck = 0;
5726 return 1;
5727 }
5728
5729 static int ixj_set_tone_off(unsigned short arg, IXJ *j)
5730 {
5731 j->tone_off_time = arg;
5732 if (ixj_WriteDSPCommand(0x6E05, j)) /* Set Tone Off Period */
5733
5734 return -1;
5735 if (ixj_WriteDSPCommand(arg, j))
5736 return -1;
5737 return 0;
5738 }
5739
5740 static int ixj_get_tone_on(IXJ *j)
5741 {
5742 if (ixj_WriteDSPCommand(0x6E06, j)) /* Get Tone On Period */
5743
5744 return -1;
5745 return 0;
5746 }
5747
5748 static int ixj_get_tone_off(IXJ *j)
5749 {
5750 if (ixj_WriteDSPCommand(0x6E07, j)) /* Get Tone Off Period */
5751
5752 return -1;
5753 return 0;
5754 }
5755
5756 static void ixj_busytone(IXJ *j)
5757 {
5758 j->flags.ringback = 0;
5759 j->flags.dialtone = 0;
5760 j->flags.busytone = 1;
5761 ixj_set_tone_on(0x07D0, j);
5762 ixj_set_tone_off(0x07D0, j);
5763 ixj_play_tone(j, 27);
5764 }
5765
5766 static void ixj_dialtone(IXJ *j)
5767 {
5768 j->flags.ringback = 0;
5769 j->flags.dialtone = 1;
5770 j->flags.busytone = 0;
5771 if (j->dsp.low == 0x20) {
5772 return;
5773 } else {
5774 ixj_set_tone_on(0xFFFF, j);
5775 ixj_set_tone_off(0x0000, j);
5776 ixj_play_tone(j, 25);
5777 }
5778 }
5779
5780 static void ixj_cpt_stop(IXJ *j)
5781 {
5782 if(j->tone_state || j->tone_cadence_state)
5783 {
5784 j->flags.dialtone = 0;
5785 j->flags.busytone = 0;
5786 j->flags.ringback = 0;
5787 ixj_set_tone_on(0x0001, j);
5788 ixj_set_tone_off(0x0000, j);
5789 ixj_play_tone(j, 0);
5790 j->tone_state = j->tone_cadence_state = 0;
5791 if (j->cadence_t) {
5792 kfree(j->cadence_t->ce);
5793 kfree(j->cadence_t);
5794 j->cadence_t = NULL;
5795 }
5796 }
5797 if (j->play_mode == -1 && j->rec_mode == -1)
5798 idle(j);
5799 if (j->play_mode != -1 && j->dsp.low == 0x20)
5800 ixj_play_start(j);
5801 if (j->rec_mode != -1 && j->dsp.low == 0x20)
5802 ixj_record_start(j);
5803 }
5804
5805 static void ixj_ringback(IXJ *j)
5806 {
5807 j->flags.busytone = 0;
5808 j->flags.dialtone = 0;
5809 j->flags.ringback = 1;
5810 ixj_set_tone_on(0x0FA0, j);
5811 ixj_set_tone_off(0x2EE0, j);
5812 ixj_play_tone(j, 26);
5813 }
5814
5815 static void ixj_testram(IXJ *j)
5816 {
5817 ixj_WriteDSPCommand(0x3001, j); /* Test External SRAM */
5818 }
5819
5820 static int ixj_build_cadence(IXJ *j, IXJ_CADENCE __user * cp)
5821 {
5822 ixj_cadence *lcp;
5823 IXJ_CADENCE_ELEMENT __user *cep;
5824 IXJ_CADENCE_ELEMENT *lcep;
5825 IXJ_TONE ti;
5826 int err;
5827
5828 lcp = kmalloc(sizeof(ixj_cadence), GFP_KERNEL);
5829 if (lcp == NULL)
5830 return -ENOMEM;
5831
5832 err = -EFAULT;
5833 if (copy_from_user(&lcp->elements_used,
5834 &cp->elements_used, sizeof(int)))
5835 goto out;
5836 if (copy_from_user(&lcp->termination,
5837 &cp->termination, sizeof(IXJ_CADENCE_TERM)))
5838 goto out;
5839 if (get_user(cep, &cp->ce))
5840 goto out;
5841
5842 err = -EINVAL;
5843 if ((unsigned)lcp->elements_used >= ~0U/sizeof(IXJ_CADENCE_ELEMENT))
5844 goto out;
5845
5846 err = -ENOMEM;
5847 lcep = kmalloc(sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used, GFP_KERNEL);
5848 if (!lcep)
5849 goto out;
5850
5851 err = -EFAULT;
5852 if (copy_from_user(lcep, cep, sizeof(IXJ_CADENCE_ELEMENT) * lcp->elements_used))
5853 goto out1;
5854
5855 if (j->cadence_t) {
5856 kfree(j->cadence_t->ce);
5857 kfree(j->cadence_t);
5858 }
5859 lcp->ce = (void *) lcep;
5860 j->cadence_t = lcp;
5861 j->tone_cadence_state = 0;
5862 ixj_set_tone_on(lcp->ce[0].tone_on_time, j);
5863 ixj_set_tone_off(lcp->ce[0].tone_off_time, j);
5864 if (j->cadence_t->ce[j->tone_cadence_state].freq0) {
5865 ti.tone_index = j->cadence_t->ce[j->tone_cadence_state].index;
5866 ti.freq0 = j->cadence_t->ce[j->tone_cadence_state].freq0;
5867 ti.gain0 = j->cadence_t->ce[j->tone_cadence_state].gain0;
5868 ti.freq1 = j->cadence_t->ce[j->tone_cadence_state].freq1;
5869 ti.gain1 = j->cadence_t->ce[j->tone_cadence_state].gain1;
5870 ixj_init_tone(j, &ti);
5871 }
5872 ixj_play_tone(j, lcp->ce[0].index);
5873 return 1;
5874 out1:
5875 kfree(lcep);
5876 out:
5877 kfree(lcp);
5878 return err;
5879 }
5880
5881 static int ixj_build_filter_cadence(IXJ *j, IXJ_FILTER_CADENCE __user * cp)
5882 {
5883 IXJ_FILTER_CADENCE *lcp;
5884 lcp = kmalloc(sizeof(IXJ_FILTER_CADENCE), GFP_KERNEL);
5885 if (lcp == NULL) {
5886 if(ixjdebug & 0x0001) {
5887 printk(KERN_INFO "Could not allocate memory for cadence\n");
5888 }
5889 return -ENOMEM;
5890 }
5891 if (copy_from_user(lcp, cp, sizeof(IXJ_FILTER_CADENCE))) {
5892 if(ixjdebug & 0x0001) {
5893 printk(KERN_INFO "Could not copy cadence to kernel\n");
5894 }
5895 kfree(lcp);
5896 return -EFAULT;
5897 }
5898 if (lcp->filter > 5) {
5899 if(ixjdebug & 0x0001) {
5900 printk(KERN_INFO "Cadence out of range\n");
5901 }
5902 kfree(lcp);
5903 return -1;
5904 }
5905 j->cadence_f[lcp->filter].state = 0;
5906 j->cadence_f[lcp->filter].enable = lcp->enable;
5907 j->filter_en[lcp->filter] = j->cadence_f[lcp->filter].en_filter = lcp->en_filter;
5908 j->cadence_f[lcp->filter].on1 = lcp->on1;
5909 j->cadence_f[lcp->filter].on1min = 0;
5910 j->cadence_f[lcp->filter].on1max = 0;
5911 j->cadence_f[lcp->filter].off1 = lcp->off1;
5912 j->cadence_f[lcp->filter].off1min = 0;
5913 j->cadence_f[lcp->filter].off1max = 0;
5914 j->cadence_f[lcp->filter].on2 = lcp->on2;
5915 j->cadence_f[lcp->filter].on2min = 0;
5916 j->cadence_f[lcp->filter].on2max = 0;
5917 j->cadence_f[lcp->filter].off2 = lcp->off2;
5918 j->cadence_f[lcp->filter].off2min = 0;
5919 j->cadence_f[lcp->filter].off2max = 0;
5920 j->cadence_f[lcp->filter].on3 = lcp->on3;
5921 j->cadence_f[lcp->filter].on3min = 0;
5922 j->cadence_f[lcp->filter].on3max = 0;
5923 j->cadence_f[lcp->filter].off3 = lcp->off3;
5924 j->cadence_f[lcp->filter].off3min = 0;
5925 j->cadence_f[lcp->filter].off3max = 0;
5926 if(ixjdebug & 0x0002) {
5927 printk(KERN_INFO "Cadence %d loaded\n", lcp->filter);
5928 }
5929 kfree(lcp);
5930 return 0;
5931 }
5932
5933 static void add_caps(IXJ *j)
5934 {
5935 j->caps = 0;
5936 j->caplist[j->caps].cap = PHONE_VENDOR_QUICKNET;
5937 strcpy(j->caplist[j->caps].desc, "Quicknet Technologies, Inc. (www.quicknet.net)");
5938 j->caplist[j->caps].captype = vendor;
5939 j->caplist[j->caps].handle = j->caps++;
5940 j->caplist[j->caps].captype = device;
5941 switch (j->cardtype) {
5942 case QTI_PHONEJACK:
5943 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK");
5944 break;
5945 case QTI_LINEJACK:
5946 strcpy(j->caplist[j->caps].desc, "Quicknet Internet LineJACK");
5947 break;
5948 case QTI_PHONEJACK_LITE:
5949 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK Lite");
5950 break;
5951 case QTI_PHONEJACK_PCI:
5952 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneJACK PCI");
5953 break;
5954 case QTI_PHONECARD:
5955 strcpy(j->caplist[j->caps].desc, "Quicknet Internet PhoneCARD");
5956 break;
5957 }
5958 j->caplist[j->caps].cap = j->cardtype;
5959 j->caplist[j->caps].handle = j->caps++;
5960 strcpy(j->caplist[j->caps].desc, "POTS");
5961 j->caplist[j->caps].captype = port;
5962 j->caplist[j->caps].cap = pots;
5963 j->caplist[j->caps].handle = j->caps++;
5964
5965 /* add devices that can do speaker/mic */
5966 switch (j->cardtype) {
5967 case QTI_PHONEJACK:
5968 case QTI_LINEJACK:
5969 case QTI_PHONEJACK_PCI:
5970 case QTI_PHONECARD:
5971 strcpy(j->caplist[j->caps].desc, "SPEAKER");
5972 j->caplist[j->caps].captype = port;
5973 j->caplist[j->caps].cap = speaker;
5974 j->caplist[j->caps].handle = j->caps++;
5975 default:
5976 break;
5977 }
5978
5979 /* add devices that can do handset */
5980 switch (j->cardtype) {
5981 case QTI_PHONEJACK:
5982 strcpy(j->caplist[j->caps].desc, "HANDSET");
5983 j->caplist[j->caps].captype = port;
5984 j->caplist[j->caps].cap = handset;
5985 j->caplist[j->caps].handle = j->caps++;
5986 break;
5987 default:
5988 break;
5989 }
5990
5991 /* add devices that can do PSTN */
5992 switch (j->cardtype) {
5993 case QTI_LINEJACK:
5994 strcpy(j->caplist[j->caps].desc, "PSTN");
5995 j->caplist[j->caps].captype = port;
5996 j->caplist[j->caps].cap = pstn;
5997 j->caplist[j->caps].handle = j->caps++;
5998 break;
5999 default:
6000 break;
6001 }
6002
6003 /* add codecs - all cards can do uLaw, linear 8/16, and Windows sound system */
6004 strcpy(j->caplist[j->caps].desc, "ULAW");
6005 j->caplist[j->caps].captype = codec;
6006 j->caplist[j->caps].cap = ULAW;
6007 j->caplist[j->caps].handle = j->caps++;
6008
6009 strcpy(j->caplist[j->caps].desc, "LINEAR 16 bit");
6010 j->caplist[j->caps].captype = codec;
6011 j->caplist[j->caps].cap = LINEAR16;
6012 j->caplist[j->caps].handle = j->caps++;
6013
6014 strcpy(j->caplist[j->caps].desc, "LINEAR 8 bit");
6015 j->caplist[j->caps].captype = codec;
6016 j->caplist[j->caps].cap = LINEAR8;
6017 j->caplist[j->caps].handle = j->caps++;
6018
6019 strcpy(j->caplist[j->caps].desc, "Windows Sound System");
6020 j->caplist[j->caps].captype = codec;
6021 j->caplist[j->caps].cap = WSS;
6022 j->caplist[j->caps].handle = j->caps++;
6023
6024 /* software ALAW codec, made from ULAW */
6025 strcpy(j->caplist[j->caps].desc, "ALAW");
6026 j->caplist[j->caps].captype = codec;
6027 j->caplist[j->caps].cap = ALAW;
6028 j->caplist[j->caps].handle = j->caps++;
6029
6030 /* version 12 of the 8020 does the following codecs in a broken way */
6031 if (j->dsp.low != 0x20 || j->ver.low != 0x12) {
6032 strcpy(j->caplist[j->caps].desc, "G.723.1 6.3kbps");
6033 j->caplist[j->caps].captype = codec;
6034 j->caplist[j->caps].cap = G723_63;
6035 j->caplist[j->caps].handle = j->caps++;
6036
6037 strcpy(j->caplist[j->caps].desc, "G.723.1 5.3kbps");
6038 j->caplist[j->caps].captype = codec;
6039 j->caplist[j->caps].cap = G723_53;
6040 j->caplist[j->caps].handle = j->caps++;
6041
6042 strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.8kbps");
6043 j->caplist[j->caps].captype = codec;
6044 j->caplist[j->caps].cap = TS48;
6045 j->caplist[j->caps].handle = j->caps++;
6046
6047 strcpy(j->caplist[j->caps].desc, "TrueSpeech 4.1kbps");
6048 j->caplist[j->caps].captype = codec;
6049 j->caplist[j->caps].cap = TS41;
6050 j->caplist[j->caps].handle = j->caps++;
6051 }
6052
6053 /* 8020 chips can do TS8.5 native, and 8021/8022 can load it */
6054 if (j->dsp.low == 0x20 || j->flags.ts85_loaded) {
6055 strcpy(j->caplist[j->caps].desc, "TrueSpeech 8.5kbps");
6056 j->caplist[j->caps].captype = codec;
6057 j->caplist[j->caps].cap = TS85;
6058 j->caplist[j->caps].handle = j->caps++;
6059 }
6060
6061 /* 8021 chips can do G728 */
6062 if (j->dsp.low == 0x21) {
6063 strcpy(j->caplist[j->caps].desc, "G.728 16kbps");
6064 j->caplist[j->caps].captype = codec;
6065 j->caplist[j->caps].cap = G728;
6066 j->caplist[j->caps].handle = j->caps++;
6067 }
6068
6069 /* 8021/8022 chips can do G729 if loaded */
6070 if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
6071 strcpy(j->caplist[j->caps].desc, "G.729A 8kbps");
6072 j->caplist[j->caps].captype = codec;
6073 j->caplist[j->caps].cap = G729;
6074 j->caplist[j->caps].handle = j->caps++;
6075 }
6076 if (j->dsp.low != 0x20 && j->flags.g729_loaded) {
6077 strcpy(j->caplist[j->caps].desc, "G.729B 8kbps");
6078 j->caplist[j->caps].captype = codec;
6079 j->caplist[j->caps].cap = G729B;
6080 j->caplist[j->caps].handle = j->caps++;
6081 }
6082 }
6083
6084 static int capabilities_check(IXJ *j, struct phone_capability *pcreq)
6085 {
6086 int cnt;
6087 int retval = 0;
6088 for (cnt = 0; cnt < j->caps; cnt++) {
6089 if (pcreq->captype == j->caplist[cnt].captype
6090 && pcreq->cap == j->caplist[cnt].cap) {
6091 retval = 1;
6092 break;
6093 }
6094 }
6095 return retval;
6096 }
6097
6098 static int ixj_ioctl(struct inode *inode, struct file *file_p, unsigned int cmd, unsigned long arg)
6099 {
6100 IXJ_TONE ti;
6101 IXJ_FILTER jf;
6102 IXJ_FILTER_RAW jfr;
6103 void __user *argp = (void __user *)arg;
6104
6105 unsigned int raise, mant;
6106 unsigned int minor = iminor(inode);
6107 int board = NUM(inode);
6108
6109 IXJ *j = get_ixj(NUM(inode));
6110
6111 int retval = 0;
6112
6113 /*
6114 * Set up locks to ensure that only one process is talking to the DSP at a time.
6115 * This is necessary to keep the DSP from locking up.
6116 */
6117 while(test_and_set_bit(board, (void *)&j->busyflags) != 0)
6118 schedule_timeout_interruptible(1);
6119 if (ixjdebug & 0x0040)
6120 printk("phone%d ioctl, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
6121 if (minor >= IXJMAX) {
6122 clear_bit(board, &j->busyflags);
6123 return -ENODEV;
6124 }
6125 /*
6126 * Check ioctls only root can use.
6127 */
6128 if (!capable(CAP_SYS_ADMIN)) {
6129 switch (cmd) {
6130 case IXJCTL_TESTRAM:
6131 case IXJCTL_HZ:
6132 retval = -EPERM;
6133 }
6134 }
6135 switch (cmd) {
6136 case IXJCTL_TESTRAM:
6137 ixj_testram(j);
6138 retval = (j->ssr.high << 8) + j->ssr.low;
6139 break;
6140 case IXJCTL_CARDTYPE:
6141 retval = j->cardtype;
6142 break;
6143 case IXJCTL_SERIAL:
6144 retval = j->serial;
6145 break;
6146 case IXJCTL_VERSION:
6147 {
6148 char arg_str[100];
6149 snprintf(arg_str, sizeof(arg_str),
6150 "\nDriver version %i.%i.%i", IXJ_VER_MAJOR,
6151 IXJ_VER_MINOR, IXJ_BLD_VER);
6152 if (copy_to_user(argp, arg_str, strlen(arg_str)))
6153 retval = -EFAULT;
6154 }
6155 break;
6156 case PHONE_RING_CADENCE:
6157 j->ring_cadence = arg;
6158 break;
6159 case IXJCTL_CIDCW:
6160 if(arg) {
6161 if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
6162 retval = -EFAULT;
6163 break;
6164 }
6165 } else {
6166 memset(&j->cid_send, 0, sizeof(PHONE_CID));
6167 }
6168 ixj_write_cidcw(j);
6169 break;
6170 /* Binary compatbility */
6171 case OLD_PHONE_RING_START:
6172 arg = 0;
6173 /* Fall through */
6174 case PHONE_RING_START:
6175 if(arg) {
6176 if (copy_from_user(&j->cid_send, argp, sizeof(PHONE_CID))) {
6177 retval = -EFAULT;
6178 break;
6179 }
6180 ixj_write_cid(j);
6181 } else {
6182 memset(&j->cid_send, 0, sizeof(PHONE_CID));
6183 }
6184 ixj_ring_start(j);
6185 break;
6186 case PHONE_RING_STOP:
6187 j->flags.cringing = 0;
6188 if(j->cadence_f[5].enable) {
6189 j->cadence_f[5].state = 0;
6190 }
6191 ixj_ring_off(j);
6192 break;
6193 case PHONE_RING:
6194 retval = ixj_ring(j);
6195 break;
6196 case PHONE_EXCEPTION:
6197 retval = j->ex.bytes;
6198 if(j->ex.bits.flash) {
6199 j->flash_end = 0;
6200 j->ex.bits.flash = 0;
6201 }
6202 j->ex.bits.pstn_ring = 0;
6203 j->ex.bits.caller_id = 0;
6204 j->ex.bits.pstn_wink = 0;
6205 j->ex.bits.f0 = 0;
6206 j->ex.bits.f1 = 0;
6207 j->ex.bits.f2 = 0;
6208 j->ex.bits.f3 = 0;
6209 j->ex.bits.fc0 = 0;
6210 j->ex.bits.fc1 = 0;
6211 j->ex.bits.fc2 = 0;
6212 j->ex.bits.fc3 = 0;
6213 j->ex.bits.reserved = 0;
6214 break;
6215 case PHONE_HOOKSTATE:
6216 j->ex.bits.hookstate = 0;
6217 retval = j->hookstate; //j->r_hook;
6218 break;
6219 case IXJCTL_SET_LED:
6220 LED_SetState(arg, j);
6221 break;
6222 case PHONE_FRAME:
6223 retval = set_base_frame(j, arg);
6224 break;
6225 case PHONE_REC_CODEC:
6226 retval = set_rec_codec(j, arg);
6227 break;
6228 case PHONE_VAD:
6229 ixj_vad(j, arg);
6230 break;
6231 case PHONE_REC_START:
6232 ixj_record_start(j);
6233 break;
6234 case PHONE_REC_STOP:
6235 ixj_record_stop(j);
6236 break;
6237 case PHONE_REC_DEPTH:
6238 set_rec_depth(j, arg);
6239 break;
6240 case PHONE_REC_VOLUME:
6241 if(arg == -1) {
6242 retval = get_rec_volume(j);
6243 }
6244 else {
6245 set_rec_volume(j, arg);
6246 retval = arg;
6247 }
6248 break;
6249 case PHONE_REC_VOLUME_LINEAR:
6250 if(arg == -1) {
6251 retval = get_rec_volume_linear(j);
6252 }
6253 else {
6254 set_rec_volume_linear(j, arg);
6255 retval = arg;
6256 }
6257 break;
6258 case IXJCTL_DTMF_PRESCALE:
6259 if(arg == -1) {
6260 retval = get_dtmf_prescale(j);
6261 }
6262 else {
6263 set_dtmf_prescale(j, arg);
6264 retval = arg;
6265 }
6266 break;
6267 case PHONE_REC_LEVEL:
6268 retval = get_rec_level(j);
6269 break;
6270 case IXJCTL_SC_RXG:
6271 retval = ixj_siadc(j, arg);
6272 break;
6273 case IXJCTL_SC_TXG:
6274 retval = ixj_sidac(j, arg);
6275 break;
6276 case IXJCTL_AEC_START:
6277 ixj_aec_start(j, arg);
6278 break;
6279 case IXJCTL_AEC_STOP:
6280 aec_stop(j);
6281 break;
6282 case IXJCTL_AEC_GET_LEVEL:
6283 retval = j->aec_level;
6284 break;
6285 case PHONE_PLAY_CODEC:
6286 retval = set_play_codec(j, arg);
6287 break;
6288 case PHONE_PLAY_START:
6289 retval = ixj_play_start(j);
6290 break;
6291 case PHONE_PLAY_STOP:
6292 ixj_play_stop(j);
6293 break;
6294 case PHONE_PLAY_DEPTH:
6295 set_play_depth(j, arg);
6296 break;
6297 case PHONE_PLAY_VOLUME:
6298 if(arg == -1) {
6299 retval = get_play_volume(j);
6300 }
6301 else {
6302 set_play_volume(j, arg);
6303 retval = arg;
6304 }
6305 break;
6306 case PHONE_PLAY_VOLUME_LINEAR:
6307 if(arg == -1) {
6308 retval = get_play_volume_linear(j);
6309 }
6310 else {
6311 set_play_volume_linear(j, arg);
6312 retval = arg;
6313 }
6314 break;
6315 case PHONE_PLAY_LEVEL:
6316 retval = get_play_level(j);
6317 break;
6318 case IXJCTL_DSP_TYPE:
6319 retval = (j->dsp.high << 8) + j->dsp.low;
6320 break;
6321 case IXJCTL_DSP_VERSION:
6322 retval = (j->ver.high << 8) + j->ver.low;
6323 break;
6324 case IXJCTL_HZ:
6325 hertz = arg;
6326 break;
6327 case IXJCTL_RATE:
6328 if (arg > hertz)
6329 retval = -1;
6330 else
6331 samplerate = arg;
6332 break;
6333 case IXJCTL_DRYBUFFER_READ:
6334 put_user(j->drybuffer, (unsigned long __user *) argp);
6335 break;
6336 case IXJCTL_DRYBUFFER_CLEAR:
6337 j->drybuffer = 0;
6338 break;
6339 case IXJCTL_FRAMES_READ:
6340 put_user(j->framesread, (unsigned long __user *) argp);
6341 break;
6342 case IXJCTL_FRAMES_WRITTEN:
6343 put_user(j->frameswritten, (unsigned long __user *) argp);
6344 break;
6345 case IXJCTL_READ_WAIT:
6346 put_user(j->read_wait, (unsigned long __user *) argp);
6347 break;
6348 case IXJCTL_WRITE_WAIT:
6349 put_user(j->write_wait, (unsigned long __user *) argp);
6350 break;
6351 case PHONE_MAXRINGS:
6352 j->maxrings = arg;
6353 break;
6354 case PHONE_SET_TONE_ON_TIME:
6355 ixj_set_tone_on(arg, j);
6356 break;
6357 case PHONE_SET_TONE_OFF_TIME:
6358 ixj_set_tone_off(arg, j);
6359 break;
6360 case PHONE_GET_TONE_ON_TIME:
6361 if (ixj_get_tone_on(j)) {
6362 retval = -1;
6363 } else {
6364 retval = (j->ssr.high << 8) + j->ssr.low;
6365 }
6366 break;
6367 case PHONE_GET_TONE_OFF_TIME:
6368 if (ixj_get_tone_off(j)) {
6369 retval = -1;
6370 } else {
6371 retval = (j->ssr.high << 8) + j->ssr.low;
6372 }
6373 break;
6374 case PHONE_PLAY_TONE:
6375 if (!j->tone_state)
6376 retval = ixj_play_tone(j, arg);
6377 else
6378 retval = -1;
6379 break;
6380 case PHONE_GET_TONE_STATE:
6381 retval = j->tone_state;
6382 break;
6383 case PHONE_DTMF_READY:
6384 retval = j->ex.bits.dtmf_ready;
6385 break;
6386 case PHONE_GET_DTMF:
6387 if (ixj_hookstate(j)) {
6388 if (j->dtmf_rp != j->dtmf_wp) {
6389 retval = j->dtmfbuffer[j->dtmf_rp];
6390 j->dtmf_rp++;
6391 if (j->dtmf_rp == 79)
6392 j->dtmf_rp = 0;
6393 if (j->dtmf_rp == j->dtmf_wp) {
6394 j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
6395 }
6396 }
6397 }
6398 break;
6399 case PHONE_GET_DTMF_ASCII:
6400 if (ixj_hookstate(j)) {
6401 if (j->dtmf_rp != j->dtmf_wp) {
6402 switch (j->dtmfbuffer[j->dtmf_rp]) {
6403 case 10:
6404 retval = 42; /* '*'; */
6405
6406 break;
6407 case 11:
6408 retval = 48; /*''; */
6409
6410 break;
6411 case 12:
6412 retval = 35; /*'#'; */
6413
6414 break;
6415 case 28:
6416 retval = 65; /*'A'; */
6417
6418 break;
6419 case 29:
6420 retval = 66; /*'B'; */
6421
6422 break;
6423 case 30:
6424 retval = 67; /*'C'; */
6425
6426 break;
6427 case 31:
6428 retval = 68; /*'D'; */
6429
6430 break;
6431 default:
6432 retval = 48 + j->dtmfbuffer[j->dtmf_rp];
6433 break;
6434 }
6435 j->dtmf_rp++;
6436 if (j->dtmf_rp == 79)
6437 j->dtmf_rp = 0;
6438 if(j->dtmf_rp == j->dtmf_wp)
6439 {
6440 j->ex.bits.dtmf_ready = j->dtmf_rp = j->dtmf_wp = 0;
6441 }
6442 }
6443 }
6444 break;
6445 case PHONE_DTMF_OOB:
6446 j->flags.dtmf_oob = arg;
6447 break;
6448 case PHONE_DIALTONE:
6449 ixj_dialtone(j);
6450 break;
6451 case PHONE_BUSY:
6452 ixj_busytone(j);
6453 break;
6454 case PHONE_RINGBACK:
6455 ixj_ringback(j);
6456 break;
6457 case PHONE_WINK:
6458 if(j->cardtype == QTI_PHONEJACK)
6459 retval = -1;
6460 else
6461 retval = ixj_wink(j);
6462 break;
6463 case PHONE_CPT_STOP:
6464 ixj_cpt_stop(j);
6465 break;
6466 case PHONE_QUERY_CODEC:
6467 {
6468 struct phone_codec_data pd;
6469 int val;
6470 int proto_size[] = {
6471 -1,
6472 12, 10, 16, 9, 8, 48, 5,
6473 40, 40, 80, 40, 40, 6
6474 };
6475 if(copy_from_user(&pd, argp, sizeof(pd))) {
6476 retval = -EFAULT;
6477 break;
6478 }
6479 if(pd.type<1 || pd.type>13) {
6480 retval = -EPROTONOSUPPORT;
6481 break;
6482 }
6483 if(pd.type<G729)
6484 val=proto_size[pd.type];
6485 else switch(j->baseframe.low)
6486 {
6487 case 0xA0:val=2*proto_size[pd.type];break;
6488 case 0x50:val=proto_size[pd.type];break;
6489 default:val=proto_size[pd.type]*3;break;
6490 }
6491 pd.buf_min=pd.buf_max=pd.buf_opt=val;
6492 if(copy_to_user(argp, &pd, sizeof(pd)))
6493 retval = -EFAULT;
6494 break;
6495 }
6496 case IXJCTL_DSP_IDLE:
6497 idle(j);
6498 break;
6499 case IXJCTL_MIXER:
6500 if ((arg & 0xff) == 0xff)
6501 retval = ixj_get_mixer(arg, j);
6502 else
6503 ixj_mixer(arg, j);
6504 break;
6505 case IXJCTL_DAA_COEFF_SET:
6506 switch (arg) {
6507 case DAA_US:
6508 DAA_Coeff_US(j);
6509 retval = ixj_daa_write(j);
6510 break;
6511 case DAA_UK:
6512 DAA_Coeff_UK(j);
6513 retval = ixj_daa_write(j);
6514 break;
6515 case DAA_FRANCE:
6516 DAA_Coeff_France(j);
6517 retval = ixj_daa_write(j);
6518 break;
6519 case DAA_GERMANY:
6520 DAA_Coeff_Germany(j);
6521 retval = ixj_daa_write(j);
6522 break;
6523 case DAA_AUSTRALIA:
6524 DAA_Coeff_Australia(j);
6525 retval = ixj_daa_write(j);
6526 break;
6527 case DAA_JAPAN:
6528 DAA_Coeff_Japan(j);
6529 retval = ixj_daa_write(j);
6530 break;
6531 default:
6532 retval = 1;
6533 break;
6534 }
6535 break;
6536 case IXJCTL_DAA_AGAIN:
6537 ixj_daa_cr4(j, arg | 0x02);
6538 break;
6539 case IXJCTL_PSTN_LINETEST:
6540 retval = ixj_linetest(j);
6541 break;
6542 case IXJCTL_VMWI:
6543 ixj_write_vmwi(j, arg);
6544 break;
6545 case IXJCTL_CID:
6546 if (copy_to_user(argp, &j->cid, sizeof(PHONE_CID)))
6547 retval = -EFAULT;
6548 j->ex.bits.caller_id = 0;
6549 break;
6550 case IXJCTL_WINK_DURATION:
6551 j->winktime = arg;
6552 break;
6553 case IXJCTL_PORT:
6554 if (arg)
6555 retval = ixj_set_port(j, arg);
6556 else
6557 retval = j->port;
6558 break;
6559 case IXJCTL_POTS_PSTN:
6560 retval = ixj_set_pots(j, arg);
6561 break;
6562 case PHONE_CAPABILITIES:
6563 add_caps(j);
6564 retval = j->caps;
6565 break;
6566 case PHONE_CAPABILITIES_LIST:
6567 add_caps(j);
6568 if (copy_to_user(argp, j->caplist, sizeof(struct phone_capability) * j->caps))
6569 retval = -EFAULT;
6570 break;
6571 case PHONE_CAPABILITIES_CHECK:
6572 {
6573 struct phone_capability cap;
6574 if (copy_from_user(&cap, argp, sizeof(cap)))
6575 retval = -EFAULT;
6576 else {
6577 add_caps(j);
6578 retval = capabilities_check(j, &cap);
6579 }
6580 }
6581 break;
6582 case PHONE_PSTN_SET_STATE:
6583 daa_set_mode(j, arg);
6584 break;
6585 case PHONE_PSTN_GET_STATE:
6586 retval = j->daa_mode;
6587 j->ex.bits.pstn_ring = 0;
6588 break;
6589 case IXJCTL_SET_FILTER:
6590 if (copy_from_user(&jf, argp, sizeof(jf)))
6591 retval = -EFAULT;
6592 retval = ixj_init_filter(j, &jf);
6593 break;
6594 case IXJCTL_SET_FILTER_RAW:
6595 if (copy_from_user(&jfr, argp, sizeof(jfr)))
6596 retval = -EFAULT;
6597 else
6598 retval = ixj_init_filter_raw(j, &jfr);
6599 break;
6600 case IXJCTL_GET_FILTER_HIST:
6601 if(arg<0||arg>3)
6602 retval = -EINVAL;
6603 else
6604 retval = j->filter_hist[arg];
6605 break;
6606 case IXJCTL_INIT_TONE:
6607 if (copy_from_user(&ti, argp, sizeof(ti)))
6608 retval = -EFAULT;
6609 else
6610 retval = ixj_init_tone(j, &ti);
6611 break;
6612 case IXJCTL_TONE_CADENCE:
6613 retval = ixj_build_cadence(j, argp);
6614 break;
6615 case IXJCTL_FILTER_CADENCE:
6616 retval = ixj_build_filter_cadence(j, argp);
6617 break;
6618 case IXJCTL_SIGCTL:
6619 if (copy_from_user(&j->sigdef, argp, sizeof(IXJ_SIGDEF))) {
6620 retval = -EFAULT;
6621 break;
6622 }
6623 j->ixj_signals[j->sigdef.event] = j->sigdef.signal;
6624 if(j->sigdef.event < 33) {
6625 raise = 1;
6626 for(mant = 0; mant < j->sigdef.event; mant++){
6627 raise *= 2;
6628 }
6629 if(j->sigdef.signal)
6630 j->ex_sig.bytes |= raise;
6631 else
6632 j->ex_sig.bytes &= (raise^0xffff);
6633 }
6634 break;
6635 case IXJCTL_INTERCOM_STOP:
6636 if(arg < 0 || arg >= IXJMAX)
6637 return -EINVAL;
6638 j->intercom = -1;
6639 ixj_record_stop(j);
6640 ixj_play_stop(j);
6641 idle(j);
6642 get_ixj(arg)->intercom = -1;
6643 ixj_record_stop(get_ixj(arg));
6644 ixj_play_stop(get_ixj(arg));
6645 idle(get_ixj(arg));
6646 break;
6647 case IXJCTL_INTERCOM_START:
6648 if(arg < 0 || arg >= IXJMAX)
6649 return -EINVAL;
6650 j->intercom = arg;
6651 ixj_record_start(j);
6652 ixj_play_start(j);
6653 get_ixj(arg)->intercom = board;
6654 ixj_play_start(get_ixj(arg));
6655 ixj_record_start(get_ixj(arg));
6656 break;
6657 }
6658 if (ixjdebug & 0x0040)
6659 printk("phone%d ioctl end, cmd: 0x%x, arg: 0x%lx\n", minor, cmd, arg);
6660 clear_bit(board, &j->busyflags);
6661 return retval;
6662 }
6663
6664 static int ixj_fasync(int fd, struct file *file_p, int mode)
6665 {
6666 IXJ *j = get_ixj(NUM(file_p->f_path.dentry->d_inode));
6667
6668 return fasync_helper(fd, file_p, mode, &j->async_queue);
6669 }
6670
6671 static const struct file_operations ixj_fops =
6672 {
6673 .owner = THIS_MODULE,
6674 .read = ixj_enhanced_read,
6675 .write = ixj_enhanced_write,
6676 .poll = ixj_poll,
6677 .ioctl = ixj_ioctl,
6678 .release = ixj_release,
6679 .fasync = ixj_fasync
6680 };
6681
6682 static int ixj_linetest(IXJ *j)
6683 {
6684 j->flags.pstncheck = 1; /* Testing */
6685 j->flags.pstn_present = 0; /* Assume the line is not there */
6686
6687 daa_int_read(j); /*Clear DAA Interrupt flags */
6688 /* */
6689 /* Hold all relays in the normally de-energized position. */
6690 /* */
6691
6692 j->pld_slicw.bits.rly1 = 0;
6693 j->pld_slicw.bits.rly2 = 0;
6694 j->pld_slicw.bits.rly3 = 0;
6695 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6696 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
6697
6698 outb_p(j->pld_scrw.byte, j->XILINXbase);
6699 j->pld_slicr.byte = inb_p(j->XILINXbase + 0x01);
6700 if (j->pld_slicr.bits.potspstn) {
6701 j->flags.pots_pstn = 1;
6702 j->flags.pots_correct = 0;
6703 LED_SetState(0x4, j);
6704 } else {
6705 j->flags.pots_pstn = 0;
6706 j->pld_slicw.bits.rly1 = 0;
6707 j->pld_slicw.bits.rly2 = 0;
6708 j->pld_slicw.bits.rly3 = 1;
6709 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6710 j->pld_scrw.bits.daafsyncen = 0; /* Turn off DAA Frame Sync */
6711
6712 outb_p(j->pld_scrw.byte, j->XILINXbase);
6713 daa_set_mode(j, SOP_PU_CONVERSATION);
6714 msleep(1000);
6715 daa_int_read(j);
6716 daa_set_mode(j, SOP_PU_RESET);
6717 if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
6718 j->flags.pots_correct = 0; /* Should not be line voltage on POTS port. */
6719 LED_SetState(0x4, j);
6720 j->pld_slicw.bits.rly3 = 0;
6721 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6722 } else {
6723 j->flags.pots_correct = 1;
6724 LED_SetState(0x8, j);
6725 j->pld_slicw.bits.rly1 = 1;
6726 j->pld_slicw.bits.rly2 = 0;
6727 j->pld_slicw.bits.rly3 = 0;
6728 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6729 }
6730 }
6731 j->pld_slicw.bits.rly3 = 0;
6732 outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01);
6733 daa_set_mode(j, SOP_PU_CONVERSATION);
6734 msleep(1000);
6735 daa_int_read(j);
6736 daa_set_mode(j, SOP_PU_RESET);
6737 if (j->m_DAAShadowRegs.XOP_REGS.XOP.xr0.bitreg.VDD_OK) {
6738 j->pstn_sleeptil = jiffies + (hertz / 4);
6739 j->flags.pstn_present = 1;
6740 } else {
6741 j->flags.pstn_present = 0;
6742 }
6743 if (j->flags.pstn_present) {
6744 if (j->flags.pots_correct) {
6745 LED_SetState(0xA, j);
6746 } else {
6747 LED_SetState(0x6, j);
6748 }
6749 } else {
6750 if (j->flags.pots_correct) {
6751 LED_SetState(0x9, j);