1 /*
2 * Copyright (c) 2007-2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16 #ifndef _PERFORMANCE_H
17 #define _PERFORMANCE_H
18
19 #ifdef ZM_ENABLE_PERFORMANCE_EVALUATION
20
21 struct zsSummary
22 {
23 u32_t tx_msdu_count;
24 u32_t tx_mpdu_count;
25 u32_t rx_msdu_count;
26 u32_t rx_mpdu_count;
27 u32_t tick_base;
28 u16_t rx_seq_base;
29 u16_t rx_broken_seq;
30 u16_t rx_broken_sum;
31 u16_t rx_broken_seq_dis;
32 u16_t rx_duplicate_seq;
33 u16_t rx_duplicate_error;
34 u16_t rx_old_seq;
35 u16_t rx_lost_sum;
36 u16_t tx_idle_count;
37 u16_t rx_idle_count;
38 u16_t reset_count;
39 u16_t reset_sum;
40 u16_t rx_free;
41 u16_t rx_amsdu_len;
42 u16_t rx_flush;
43 u16_t rx_clear;
44 u32_t rx_reorder;
45 };
46
47 struct zsVariation
48 {
49 u32_t tx_msdu_tick[100];
50 u32_t tx_mpdu_tick[100];
51 u32_t rx_msdu_tick[100];
52 u32_t rx_mpdu_tick[100];
53
54 u32_t tx_msdu_mean;
55 u32_t tx_mpdu_mean;
56 u32_t rx_msdu_mean;
57 u32_t rx_mpdu_mean;
58
59 u32_t tx_msdu_sum;
60 u32_t tx_mpdu_sum;
61 u32_t rx_msdu_sum;
62 u32_t rx_mpdu_sum;
63
64 u32_t tx_msdu_var;
65 u32_t tx_mpdu_var;
66 u32_t rx_msdu_var;
67 u32_t rx_mpdu_var;
68 };
69
70 struct zsThroughput
71 {
72 u32_t tx[50];
73 u32_t rx[50];
74 u16_t head;
75 u16_t tail;
76 u16_t size;
77 LARGE_INTEGER sys_time;
78 LARGE_INTEGER freq;
79 };
80
81 void zfiPerformanceInit(zdev_t* dev);
82 void zfiPerformanceRefresh(zdev_t* dev);
83
84 void zfiTxPerformanceMSDU(zdev_t* dev, u32_t tick);
85 void zfiRxPerformanceMSDU(zdev_t* dev, u32_t tick);
86 void zfiTxPerformanceMPDU(zdev_t* dev, u32_t tick);
87 void zfiRxPerformanceMPDU(zdev_t* dev, zbuf_t* buf);
88 void zfiRxPerformanceSeq(zdev_t* dev, zbuf_t* buf);
89 void zfiRxPerformanceReg(zdev_t* dev, u32_t reg, u32_t rsp);
90 void zfiRxPerformanceDup(zdev_t* dev, zbuf_t* buf1, zbuf_t* buf2);
91 void zfiRxPerformanceFree(zdev_t* dev, zbuf_t* buf);
92 void zfiRxPerformanceAMSDU(zdev_t* dev, zbuf_t* buf, u16_t len);
93 void zfiRxPerformanceFlush(zdev_t* dev);
94 void zfiRxPerformanceClear(zdev_t* dev);
95 void zfiRxPerformanceReorder(zdev_t* dev);
96 #endif /* end of ZM_ENABLE_PERFORMANCE_EVALUATION */
97 #endif /* end of _PERFORMANCE_H */
98
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