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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * Register definitions for Atmel Serial Peripheral Interface (SPI)
  3  *
  4  * Copyright (C) 2006 Atmel Corporation
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  */
 10 #ifndef __ATMEL_SPI_H__
 11 #define __ATMEL_SPI_H__
 12 
 13 /* SPI register offsets */
 14 #define SPI_CR                                  0x0000
 15 #define SPI_MR                                  0x0004
 16 #define SPI_RDR                                 0x0008
 17 #define SPI_TDR                                 0x000c
 18 #define SPI_SR                                  0x0010
 19 #define SPI_IER                                 0x0014
 20 #define SPI_IDR                                 0x0018
 21 #define SPI_IMR                                 0x001c
 22 #define SPI_CSR0                                0x0030
 23 #define SPI_CSR1                                0x0034
 24 #define SPI_CSR2                                0x0038
 25 #define SPI_CSR3                                0x003c
 26 #define SPI_RPR                                 0x0100
 27 #define SPI_RCR                                 0x0104
 28 #define SPI_TPR                                 0x0108
 29 #define SPI_TCR                                 0x010c
 30 #define SPI_RNPR                                0x0110
 31 #define SPI_RNCR                                0x0114
 32 #define SPI_TNPR                                0x0118
 33 #define SPI_TNCR                                0x011c
 34 #define SPI_PTCR                                0x0120
 35 #define SPI_PTSR                                0x0124
 36 
 37 /* Bitfields in CR */
 38 #define SPI_SPIEN_OFFSET                        0
 39 #define SPI_SPIEN_SIZE                          1
 40 #define SPI_SPIDIS_OFFSET                       1
 41 #define SPI_SPIDIS_SIZE                         1
 42 #define SPI_SWRST_OFFSET                        7
 43 #define SPI_SWRST_SIZE                          1
 44 #define SPI_LASTXFER_OFFSET                     24
 45 #define SPI_LASTXFER_SIZE                       1
 46 
 47 /* Bitfields in MR */
 48 #define SPI_MSTR_OFFSET                         0
 49 #define SPI_MSTR_SIZE                           1
 50 #define SPI_PS_OFFSET                           1
 51 #define SPI_PS_SIZE                             1
 52 #define SPI_PCSDEC_OFFSET                       2
 53 #define SPI_PCSDEC_SIZE                         1
 54 #define SPI_FDIV_OFFSET                         3
 55 #define SPI_FDIV_SIZE                           1
 56 #define SPI_MODFDIS_OFFSET                      4
 57 #define SPI_MODFDIS_SIZE                        1
 58 #define SPI_LLB_OFFSET                          7
 59 #define SPI_LLB_SIZE                            1
 60 #define SPI_PCS_OFFSET                          16
 61 #define SPI_PCS_SIZE                            4
 62 #define SPI_DLYBCS_OFFSET                       24
 63 #define SPI_DLYBCS_SIZE                         8
 64 
 65 /* Bitfields in RDR */
 66 #define SPI_RD_OFFSET                           0
 67 #define SPI_RD_SIZE                             16
 68 
 69 /* Bitfields in TDR */
 70 #define SPI_TD_OFFSET                           0
 71 #define SPI_TD_SIZE                             16
 72 
 73 /* Bitfields in SR */
 74 #define SPI_RDRF_OFFSET                         0
 75 #define SPI_RDRF_SIZE                           1
 76 #define SPI_TDRE_OFFSET                         1
 77 #define SPI_TDRE_SIZE                           1
 78 #define SPI_MODF_OFFSET                         2
 79 #define SPI_MODF_SIZE                           1
 80 #define SPI_OVRES_OFFSET                        3
 81 #define SPI_OVRES_SIZE                          1
 82 #define SPI_ENDRX_OFFSET                        4
 83 #define SPI_ENDRX_SIZE                          1
 84 #define SPI_ENDTX_OFFSET                        5
 85 #define SPI_ENDTX_SIZE                          1
 86 #define SPI_RXBUFF_OFFSET                       6
 87 #define SPI_RXBUFF_SIZE                         1
 88 #define SPI_TXBUFE_OFFSET                       7
 89 #define SPI_TXBUFE_SIZE                         1
 90 #define SPI_NSSR_OFFSET                         8
 91 #define SPI_NSSR_SIZE                           1
 92 #define SPI_TXEMPTY_OFFSET                      9
 93 #define SPI_TXEMPTY_SIZE                        1
 94 #define SPI_SPIENS_OFFSET                       16
 95 #define SPI_SPIENS_SIZE                         1
 96 
 97 /* Bitfields in CSR0 */
 98 #define SPI_CPOL_OFFSET                         0
 99 #define SPI_CPOL_SIZE                           1
100 #define SPI_NCPHA_OFFSET                        1
101 #define SPI_NCPHA_SIZE                          1
102 #define SPI_CSAAT_OFFSET                        3
103 #define SPI_CSAAT_SIZE                          1
104 #define SPI_BITS_OFFSET                         4
105 #define SPI_BITS_SIZE                           4
106 #define SPI_SCBR_OFFSET                         8
107 #define SPI_SCBR_SIZE                           8
108 #define SPI_DLYBS_OFFSET                        16
109 #define SPI_DLYBS_SIZE                          8
110 #define SPI_DLYBCT_OFFSET                       24
111 #define SPI_DLYBCT_SIZE                         8
112 
113 /* Bitfields in RCR */
114 #define SPI_RXCTR_OFFSET                        0
115 #define SPI_RXCTR_SIZE                          16
116 
117 /* Bitfields in TCR */
118 #define SPI_TXCTR_OFFSET                        0
119 #define SPI_TXCTR_SIZE                          16
120 
121 /* Bitfields in RNCR */
122 #define SPI_RXNCR_OFFSET                        0
123 #define SPI_RXNCR_SIZE                          16
124 
125 /* Bitfields in TNCR */
126 #define SPI_TXNCR_OFFSET                        0
127 #define SPI_TXNCR_SIZE                          16
128 
129 /* Bitfields in PTCR */
130 #define SPI_RXTEN_OFFSET                        0
131 #define SPI_RXTEN_SIZE                          1
132 #define SPI_RXTDIS_OFFSET                       1
133 #define SPI_RXTDIS_SIZE                         1
134 #define SPI_TXTEN_OFFSET                        8
135 #define SPI_TXTEN_SIZE                          1
136 #define SPI_TXTDIS_OFFSET                       9
137 #define SPI_TXTDIS_SIZE                         1
138 
139 /* Constants for BITS */
140 #define SPI_BITS_8_BPT                          0
141 #define SPI_BITS_9_BPT                          1
142 #define SPI_BITS_10_BPT                         2
143 #define SPI_BITS_11_BPT                         3
144 #define SPI_BITS_12_BPT                         4
145 #define SPI_BITS_13_BPT                         5
146 #define SPI_BITS_14_BPT                         6
147 #define SPI_BITS_15_BPT                         7
148 #define SPI_BITS_16_BPT                         8
149 
150 /* Bit manipulation macros */
151 #define SPI_BIT(name) \
152         (1 << SPI_##name##_OFFSET)
153 #define SPI_BF(name,value) \
154         (((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)
155 #define SPI_BFEXT(name,value) \
156         (((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))
157 #define SPI_BFINS(name,value,old) \
158         ( ((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) \
159           | SPI_BF(name,value))
160 
161 /* Register access macros */
162 #define spi_readl(port,reg) \
163         __raw_readl((port)->regs + SPI_##reg)
164 #define spi_writel(port,reg,value) \
165         __raw_writel((value), (port)->regs + SPI_##reg)
166 
167 #endif /* __ATMEL_SPI_H__ */
168 
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