1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 */
19
20 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
21 #define SUPPORT_SYSRQ
22 #endif
23
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/platform_device.h>
30 #include <linux/pci.h>
31 #include <linux/serial_core.h>
32 #include <linux/serial.h>
33
34 #include <asm/io.h>
35
36 static char *serial_version = "1.11";
37 static char *serial_name = "TX39/49 Serial driver";
38
39 #define PASS_LIMIT 256
40
41 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
42 /* "ttyS" is used for standard serial driver */
43 #define TXX9_TTY_NAME "ttyTX"
44 #define TXX9_TTY_MINOR_START 196
45 #define TXX9_TTY_MAJOR 204
46 #else
47 /* acts like standard serial driver */
48 #define TXX9_TTY_NAME "ttyS"
49 #define TXX9_TTY_MINOR_START 64
50 #define TXX9_TTY_MAJOR TTY_MAJOR
51 #endif
52
53 /* flag aliases */
54 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
55 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
56
57 #ifdef CONFIG_PCI
58 /* support for Toshiba TC86C001 SIO */
59 #define ENABLE_SERIAL_TXX9_PCI
60 #endif
61
62 /*
63 * Number of serial ports
64 */
65 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
66
67 struct uart_txx9_port {
68 struct uart_port port;
69 /* No additional info for now */
70 };
71
72 #define TXX9_REGION_SIZE 0x24
73
74 /* TXX9 Serial Registers */
75 #define TXX9_SILCR 0x00
76 #define TXX9_SIDICR 0x04
77 #define TXX9_SIDISR 0x08
78 #define TXX9_SICISR 0x0c
79 #define TXX9_SIFCR 0x10
80 #define TXX9_SIFLCR 0x14
81 #define TXX9_SIBGR 0x18
82 #define TXX9_SITFIFO 0x1c
83 #define TXX9_SIRFIFO 0x20
84
85 /* SILCR : Line Control */
86 #define TXX9_SILCR_SCS_MASK 0x00000060
87 #define TXX9_SILCR_SCS_IMCLK 0x00000000
88 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
89 #define TXX9_SILCR_SCS_SCLK 0x00000040
90 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
91 #define TXX9_SILCR_UEPS 0x00000010
92 #define TXX9_SILCR_UPEN 0x00000008
93 #define TXX9_SILCR_USBL_MASK 0x00000004
94 #define TXX9_SILCR_USBL_1BIT 0x00000000
95 #define TXX9_SILCR_USBL_2BIT 0x00000004
96 #define TXX9_SILCR_UMODE_MASK 0x00000003
97 #define TXX9_SILCR_UMODE_8BIT 0x00000000
98 #define TXX9_SILCR_UMODE_7BIT 0x00000001
99
100 /* SIDICR : DMA/Int. Control */
101 #define TXX9_SIDICR_TDE 0x00008000
102 #define TXX9_SIDICR_RDE 0x00004000
103 #define TXX9_SIDICR_TIE 0x00002000
104 #define TXX9_SIDICR_RIE 0x00001000
105 #define TXX9_SIDICR_SPIE 0x00000800
106 #define TXX9_SIDICR_CTSAC 0x00000600
107 #define TXX9_SIDICR_STIE_MASK 0x0000003f
108 #define TXX9_SIDICR_STIE_OERS 0x00000020
109 #define TXX9_SIDICR_STIE_CTSS 0x00000010
110 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
111 #define TXX9_SIDICR_STIE_TRDY 0x00000004
112 #define TXX9_SIDICR_STIE_TXALS 0x00000002
113 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
114
115 /* SIDISR : DMA/Int. Status */
116 #define TXX9_SIDISR_UBRK 0x00008000
117 #define TXX9_SIDISR_UVALID 0x00004000
118 #define TXX9_SIDISR_UFER 0x00002000
119 #define TXX9_SIDISR_UPER 0x00001000
120 #define TXX9_SIDISR_UOER 0x00000800
121 #define TXX9_SIDISR_ERI 0x00000400
122 #define TXX9_SIDISR_TOUT 0x00000200
123 #define TXX9_SIDISR_TDIS 0x00000100
124 #define TXX9_SIDISR_RDIS 0x00000080
125 #define TXX9_SIDISR_STIS 0x00000040
126 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
127
128 /* SICISR : Change Int. Status */
129 #define TXX9_SICISR_OERS 0x00000020
130 #define TXX9_SICISR_CTSS 0x00000010
131 #define TXX9_SICISR_RBRKD 0x00000008
132 #define TXX9_SICISR_TRDY 0x00000004
133 #define TXX9_SICISR_TXALS 0x00000002
134 #define TXX9_SICISR_UBRKD 0x00000001
135
136 /* SIFCR : FIFO Control */
137 #define TXX9_SIFCR_SWRST 0x00008000
138 #define TXX9_SIFCR_RDIL_MASK 0x00000180
139 #define TXX9_SIFCR_RDIL_1 0x00000000
140 #define TXX9_SIFCR_RDIL_4 0x00000080
141 #define TXX9_SIFCR_RDIL_8 0x00000100
142 #define TXX9_SIFCR_RDIL_12 0x00000180
143 #define TXX9_SIFCR_RDIL_MAX 0x00000180
144 #define TXX9_SIFCR_TDIL_MASK 0x00000018
145 #define TXX9_SIFCR_TDIL_MASK 0x00000018
146 #define TXX9_SIFCR_TDIL_1 0x00000000
147 #define TXX9_SIFCR_TDIL_4 0x00000001
148 #define TXX9_SIFCR_TDIL_8 0x00000010
149 #define TXX9_SIFCR_TDIL_MAX 0x00000010
150 #define TXX9_SIFCR_TFRST 0x00000004
151 #define TXX9_SIFCR_RFRST 0x00000002
152 #define TXX9_SIFCR_FRSTE 0x00000001
153 #define TXX9_SIO_TX_FIFO 8
154 #define TXX9_SIO_RX_FIFO 16
155
156 /* SIFLCR : Flow Control */
157 #define TXX9_SIFLCR_RCS 0x00001000
158 #define TXX9_SIFLCR_TES 0x00000800
159 #define TXX9_SIFLCR_RTSSC 0x00000200
160 #define TXX9_SIFLCR_RSDE 0x00000100
161 #define TXX9_SIFLCR_TSDE 0x00000080
162 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
163 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
164 #define TXX9_SIFLCR_TBRK 0x00000001
165
166 /* SIBGR : Baudrate Control */
167 #define TXX9_SIBGR_BCLK_MASK 0x00000300
168 #define TXX9_SIBGR_BCLK_T0 0x00000000
169 #define TXX9_SIBGR_BCLK_T2 0x00000100
170 #define TXX9_SIBGR_BCLK_T4 0x00000200
171 #define TXX9_SIBGR_BCLK_T6 0x00000300
172 #define TXX9_SIBGR_BRD_MASK 0x000000ff
173
174 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
175 {
176 switch (up->port.iotype) {
177 default:
178 return __raw_readl(up->port.membase + offset);
179 case UPIO_PORT:
180 return inl(up->port.iobase + offset);
181 }
182 }
183
184 static inline void
185 sio_out(struct uart_txx9_port *up, int offset, int value)
186 {
187 switch (up->port.iotype) {
188 default:
189 __raw_writel(value, up->port.membase + offset);
190 break;
191 case UPIO_PORT:
192 outl(value, up->port.iobase + offset);
193 break;
194 }
195 }
196
197 static inline void
198 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
199 {
200 sio_out(up, offset, sio_in(up, offset) & ~value);
201 }
202 static inline void
203 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
204 {
205 sio_out(up, offset, sio_in(up, offset) | value);
206 }
207
208 static inline void
209 sio_quot_set(struct uart_txx9_port *up, int quot)
210 {
211 quot >>= 1;
212 if (quot < 256)
213 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
214 else if (quot < (256 << 2))
215 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
216 else if (quot < (256 << 4))
217 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
218 else if (quot < (256 << 6))
219 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
220 else
221 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
222 }
223
224 static void serial_txx9_stop_tx(struct uart_port *port)
225 {
226 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
227 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
228 }
229
230 static void serial_txx9_start_tx(struct uart_port *port)
231 {
232 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
233 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
234 }
235
236 static void serial_txx9_stop_rx(struct uart_port *port)
237 {
238 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
239 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
240 }
241
242 static void serial_txx9_enable_ms(struct uart_port *port)
243 {
244 /* TXX9-SIO can not control DTR... */
245 }
246
247 static void serial_txx9_initialize(struct uart_port *port)
248 {
249 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
250 unsigned int tmout = 10000;
251
252 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
253 /* TX4925 BUG WORKAROUND. Accessing SIOC register
254 * immediately after soft reset causes bus error. */
255 mmiowb();
256 udelay(1);
257 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
258 udelay(1);
259 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
260 sio_set(up, TXX9_SIFCR,
261 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
262 /* initial settings */
263 sio_out(up, TXX9_SILCR,
264 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
265 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
266 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
267 sio_quot_set(up, uart_get_divisor(port, 9600));
268 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
269 sio_out(up, TXX9_SIDICR, 0);
270 }
271
272 static inline void
273 receive_chars(struct uart_txx9_port *up, unsigned int *status)
274 {
275 struct tty_struct *tty = up->port.info->port.tty;
276 unsigned char ch;
277 unsigned int disr = *status;
278 int max_count = 256;
279 char flag;
280 unsigned int next_ignore_status_mask;
281
282 do {
283 ch = sio_in(up, TXX9_SIRFIFO);
284 flag = TTY_NORMAL;
285 up->port.icount.rx++;
286
287 /* mask out RFDN_MASK bit added by previous overrun */
288 next_ignore_status_mask =
289 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
290 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
291 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
292 /*
293 * For statistics only
294 */
295 if (disr & TXX9_SIDISR_UBRK) {
296 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
297 up->port.icount.brk++;
298 /*
299 * We do the SysRQ and SAK checking
300 * here because otherwise the break
301 * may get masked by ignore_status_mask
302 * or read_status_mask.
303 */
304 if (uart_handle_break(&up->port))
305 goto ignore_char;
306 } else if (disr & TXX9_SIDISR_UPER)
307 up->port.icount.parity++;
308 else if (disr & TXX9_SIDISR_UFER)
309 up->port.icount.frame++;
310 if (disr & TXX9_SIDISR_UOER) {
311 up->port.icount.overrun++;
312 /*
313 * The receiver read buffer still hold
314 * a char which caused overrun.
315 * Ignore next char by adding RFDN_MASK
316 * to ignore_status_mask temporarily.
317 */
318 next_ignore_status_mask |=
319 TXX9_SIDISR_RFDN_MASK;
320 }
321
322 /*
323 * Mask off conditions which should be ingored.
324 */
325 disr &= up->port.read_status_mask;
326
327 if (disr & TXX9_SIDISR_UBRK) {
328 flag = TTY_BREAK;
329 } else if (disr & TXX9_SIDISR_UPER)
330 flag = TTY_PARITY;
331 else if (disr & TXX9_SIDISR_UFER)
332 flag = TTY_FRAME;
333 }
334 if (uart_handle_sysrq_char(&up->port, ch))
335 goto ignore_char;
336
337 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
338
339 ignore_char:
340 up->port.ignore_status_mask = next_ignore_status_mask;
341 disr = sio_in(up, TXX9_SIDISR);
342 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
343 spin_unlock(&up->port.lock);
344 tty_flip_buffer_push(tty);
345 spin_lock(&up->port.lock);
346 *status = disr;
347 }
348
349 static inline void transmit_chars(struct uart_txx9_port *up)
350 {
351 struct circ_buf *xmit = &up->port.info->xmit;
352 int count;
353
354 if (up->port.x_char) {
355 sio_out(up, TXX9_SITFIFO, up->port.x_char);
356 up->port.icount.tx++;
357 up->port.x_char = 0;
358 return;
359 }
360 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
361 serial_txx9_stop_tx(&up->port);
362 return;
363 }
364
365 count = TXX9_SIO_TX_FIFO;
366 do {
367 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
368 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
369 up->port.icount.tx++;
370 if (uart_circ_empty(xmit))
371 break;
372 } while (--count > 0);
373
374 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
375 uart_write_wakeup(&up->port);
376
377 if (uart_circ_empty(xmit))
378 serial_txx9_stop_tx(&up->port);
379 }
380
381 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
382 {
383 int pass_counter = 0;
384 struct uart_txx9_port *up = dev_id;
385 unsigned int status;
386
387 while (1) {
388 spin_lock(&up->port.lock);
389 status = sio_in(up, TXX9_SIDISR);
390 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
391 status &= ~TXX9_SIDISR_TDIS;
392 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
393 TXX9_SIDISR_TOUT))) {
394 spin_unlock(&up->port.lock);
395 break;
396 }
397
398 if (status & TXX9_SIDISR_RDIS)
399 receive_chars(up, &status);
400 if (status & TXX9_SIDISR_TDIS)
401 transmit_chars(up);
402 /* Clear TX/RX Int. Status */
403 sio_mask(up, TXX9_SIDISR,
404 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
405 TXX9_SIDISR_TOUT);
406 spin_unlock(&up->port.lock);
407
408 if (pass_counter++ > PASS_LIMIT)
409 break;
410 }
411
412 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
413 }
414
415 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
416 {
417 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
418 unsigned long flags;
419 unsigned int ret;
420
421 spin_lock_irqsave(&up->port.lock, flags);
422 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
423 spin_unlock_irqrestore(&up->port.lock, flags);
424
425 return ret;
426 }
427
428 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
429 {
430 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
431 unsigned int ret;
432
433 /* no modem control lines */
434 ret = TIOCM_CAR | TIOCM_DSR;
435 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
436 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
437
438 return ret;
439 }
440
441 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
442 {
443 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
444
445 if (mctrl & TIOCM_RTS)
446 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
447 else
448 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
449 }
450
451 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
452 {
453 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
454 unsigned long flags;
455
456 spin_lock_irqsave(&up->port.lock, flags);
457 if (break_state == -1)
458 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
459 else
460 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
461 spin_unlock_irqrestore(&up->port.lock, flags);
462 }
463
464 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || (CONFIG_CONSOLE_POLL)
465 /*
466 * Wait for transmitter & holding register to empty
467 */
468 static void wait_for_xmitr(struct uart_txx9_port *up)
469 {
470 unsigned int tmout = 10000;
471
472 /* Wait up to 10ms for the character(s) to be sent. */
473 while (--tmout &&
474 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
475 udelay(1);
476
477 /* Wait up to 1s for flow control if necessary */
478 if (up->port.flags & UPF_CONS_FLOW) {
479 tmout = 1000000;
480 while (--tmout &&
481 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
482 udelay(1);
483 }
484 }
485 #endif
486
487 #ifdef CONFIG_CONSOLE_POLL
488 /*
489 * Console polling routines for writing and reading from the uart while
490 * in an interrupt or debug context.
491 */
492
493 static int serial_txx9_get_poll_char(struct uart_port *port)
494 {
495 unsigned int ier;
496 unsigned char c;
497 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
498
499 /*
500 * First save the IER then disable the interrupts
501 */
502 ier = sio_in(up, TXX9_SIDICR);
503 sio_out(up, TXX9_SIDICR, 0);
504
505 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
506 ;
507
508 c = sio_in(up, TXX9_SIRFIFO);
509
510 /*
511 * Finally, clear RX interrupt status
512 * and restore the IER
513 */
514 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
515 sio_out(up, TXX9_SIDICR, ier);
516 return c;
517 }
518
519
520 static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
521 {
522 unsigned int ier;
523 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
524
525 /*
526 * First save the IER then disable the interrupts
527 */
528 ier = sio_in(up, TXX9_SIDICR);
529 sio_out(up, TXX9_SIDICR, 0);
530
531 wait_for_xmitr(up);
532 /*
533 * Send the character out.
534 * If a LF, also do CR...
535 */
536 sio_out(up, TXX9_SITFIFO, c);
537 if (c == 10) {
538 wait_for_xmitr(up);
539 sio_out(up, TXX9_SITFIFO, 13);
540 }
541
542 /*
543 * Finally, wait for transmitter to become empty
544 * and restore the IER
545 */
546 wait_for_xmitr(up);
547 sio_out(up, TXX9_SIDICR, ier);
548 }
549
550 #endif /* CONFIG_CONSOLE_POLL */
551
552 static int serial_txx9_startup(struct uart_port *port)
553 {
554 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
555 unsigned long flags;
556 int retval;
557
558 /*
559 * Clear the FIFO buffers and disable them.
560 * (they will be reenabled in set_termios())
561 */
562 sio_set(up, TXX9_SIFCR,
563 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
564 /* clear reset */
565 sio_mask(up, TXX9_SIFCR,
566 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
567 sio_out(up, TXX9_SIDICR, 0);
568
569 /*
570 * Clear the interrupt registers.
571 */
572 sio_out(up, TXX9_SIDISR, 0);
573
574 retval = request_irq(up->port.irq, serial_txx9_interrupt,
575 IRQF_SHARED, "serial_txx9", up);
576 if (retval)
577 return retval;
578
579 /*
580 * Now, initialize the UART
581 */
582 spin_lock_irqsave(&up->port.lock, flags);
583 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
584 spin_unlock_irqrestore(&up->port.lock, flags);
585
586 /* Enable RX/TX */
587 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
588
589 /*
590 * Finally, enable interrupts.
591 */
592 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
593
594 return 0;
595 }
596
597 static void serial_txx9_shutdown(struct uart_port *port)
598 {
599 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
600 unsigned long flags;
601
602 /*
603 * Disable interrupts from this port
604 */
605 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
606
607 spin_lock_irqsave(&up->port.lock, flags);
608 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
609 spin_unlock_irqrestore(&up->port.lock, flags);
610
611 /*
612 * Disable break condition
613 */
614 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
615
616 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
617 if (up->port.cons && up->port.line == up->port.cons->index) {
618 free_irq(up->port.irq, up);
619 return;
620 }
621 #endif
622 /* reset FIFOs */
623 sio_set(up, TXX9_SIFCR,
624 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
625 /* clear reset */
626 sio_mask(up, TXX9_SIFCR,
627 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
628
629 /* Disable RX/TX */
630 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
631
632 free_irq(up->port.irq, up);
633 }
634
635 static void
636 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
637 struct ktermios *old)
638 {
639 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
640 unsigned int cval, fcr = 0;
641 unsigned long flags;
642 unsigned int baud, quot;
643
644 /*
645 * We don't support modem control lines.
646 */
647 termios->c_cflag &= ~(HUPCL | CMSPAR);
648 termios->c_cflag |= CLOCAL;
649
650 cval = sio_in(up, TXX9_SILCR);
651 /* byte size and parity */
652 cval &= ~TXX9_SILCR_UMODE_MASK;
653 switch (termios->c_cflag & CSIZE) {
654 case CS7:
655 cval |= TXX9_SILCR_UMODE_7BIT;
656 break;
657 default:
658 case CS5: /* not supported */
659 case CS6: /* not supported */
660 case CS8:
661 cval |= TXX9_SILCR_UMODE_8BIT;
662 break;
663 }
664
665 cval &= ~TXX9_SILCR_USBL_MASK;
666 if (termios->c_cflag & CSTOPB)
667 cval |= TXX9_SILCR_USBL_2BIT;
668 else
669 cval |= TXX9_SILCR_USBL_1BIT;
670 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
671 if (termios->c_cflag & PARENB)
672 cval |= TXX9_SILCR_UPEN;
673 if (!(termios->c_cflag & PARODD))
674 cval |= TXX9_SILCR_UEPS;
675
676 /*
677 * Ask the core to calculate the divisor for us.
678 */
679 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
680 quot = uart_get_divisor(port, baud);
681
682 /* Set up FIFOs */
683 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
684 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
685
686 /*
687 * Ok, we're now changing the port state. Do it with
688 * interrupts disabled.
689 */
690 spin_lock_irqsave(&up->port.lock, flags);
691
692 /*
693 * Update the per-port timeout.
694 */
695 uart_update_timeout(port, termios->c_cflag, baud);
696
697 up->port.read_status_mask = TXX9_SIDISR_UOER |
698 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
699 if (termios->c_iflag & INPCK)
700 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
701 if (termios->c_iflag & (BRKINT | PARMRK))
702 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
703
704 /*
705 * Characteres to ignore
706 */
707 up->port.ignore_status_mask = 0;
708 if (termios->c_iflag & IGNPAR)
709 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
710 if (termios->c_iflag & IGNBRK) {
711 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
712 /*
713 * If we're ignoring parity and break indicators,
714 * ignore overruns too (for real raw support).
715 */
716 if (termios->c_iflag & IGNPAR)
717 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
718 }
719
720 /*
721 * ignore all characters if CREAD is not set
722 */
723 if ((termios->c_cflag & CREAD) == 0)
724 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
725
726 /* CTS flow control flag */
727 if ((termios->c_cflag & CRTSCTS) &&
728 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
729 sio_set(up, TXX9_SIFLCR,
730 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
731 } else {
732 sio_mask(up, TXX9_SIFLCR,
733 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
734 }
735
736 sio_out(up, TXX9_SILCR, cval);
737 sio_quot_set(up, quot);
738 sio_out(up, TXX9_SIFCR, fcr);
739
740 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
741 spin_unlock_irqrestore(&up->port.lock, flags);
742 }
743
744 static void
745 serial_txx9_pm(struct uart_port *port, unsigned int state,
746 unsigned int oldstate)
747 {
748 /*
749 * If oldstate was -1 this is called from
750 * uart_configure_port(). In this case do not initialize the
751 * port now, because the port was already initialized (for
752 * non-console port) or should not be initialized here (for
753 * console port). If we initialized the port here we lose
754 * serial console settings.
755 */
756 if (state == 0 && oldstate != -1)
757 serial_txx9_initialize(port);
758 }
759
760 static int serial_txx9_request_resource(struct uart_txx9_port *up)
761 {
762 unsigned int size = TXX9_REGION_SIZE;
763 int ret = 0;
764
765 switch (up->port.iotype) {
766 default:
767 if (!up->port.mapbase)
768 break;
769
770 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
771 ret = -EBUSY;
772 break;
773 }
774
775 if (up->port.flags & UPF_IOREMAP) {
776 up->port.membase = ioremap(up->port.mapbase, size);
777 if (!up->port.membase) {
778 release_mem_region(up->port.mapbase, size);
779 ret = -ENOMEM;
780 }
781 }
782 break;
783
784 case UPIO_PORT:
785 if (!request_region(up->port.iobase, size, "serial_txx9"))
786 ret = -EBUSY;
787 break;
788 }
789 return ret;
790 }
791
792 static void serial_txx9_release_resource(struct uart_txx9_port *up)
793 {
794 unsigned int size = TXX9_REGION_SIZE;
795
796 switch (up->port.iotype) {
797 default:
798 if (!up->port.mapbase)
799 break;
800
801 if (up->port.flags & UPF_IOREMAP) {
802 iounmap(up->port.membase);
803 up->port.membase = NULL;
804 }
805
806 release_mem_region(up->port.mapbase, size);
807 break;
808
809 case UPIO_PORT:
810 release_region(up->port.iobase, size);
811 break;
812 }
813 }
814
815 static void serial_txx9_release_port(struct uart_port *port)
816 {
817 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
818 serial_txx9_release_resource(up);
819 }
820
821 static int serial_txx9_request_port(struct uart_port *port)
822 {
823 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
824 return serial_txx9_request_resource(up);
825 }
826
827 static void serial_txx9_config_port(struct uart_port *port, int uflags)
828 {
829 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
830 int ret;
831
832 /*
833 * Find the region that we can probe for. This in turn
834 * tells us whether we can probe for the type of port.
835 */
836 ret = serial_txx9_request_resource(up);
837 if (ret < 0)
838 return;
839 port->type = PORT_TXX9;
840 up->port.fifosize = TXX9_SIO_TX_FIFO;
841
842 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
843 if (up->port.line == up->port.cons->index)
844 return;
845 #endif
846 serial_txx9_initialize(port);
847 }
848
849 static const char *
850 serial_txx9_type(struct uart_port *port)
851 {
852 return "txx9";
853 }
854
855 static struct uart_ops serial_txx9_pops = {
856 .tx_empty = serial_txx9_tx_empty,
857 .set_mctrl = serial_txx9_set_mctrl,
858 .get_mctrl = serial_txx9_get_mctrl,
859 .stop_tx = serial_txx9_stop_tx,
860 .start_tx = serial_txx9_start_tx,
861 .stop_rx = serial_txx9_stop_rx,
862 .enable_ms = serial_txx9_enable_ms,
863 .break_ctl = serial_txx9_break_ctl,
864 .startup = serial_txx9_startup,
865 .shutdown = serial_txx9_shutdown,
866 .set_termios = serial_txx9_set_termios,
867 .pm = serial_txx9_pm,
868 .type = serial_txx9_type,
869 .release_port = serial_txx9_release_port,
870 .request_port = serial_txx9_request_port,
871 .config_port = serial_txx9_config_port,
872 #ifdef CONFIG_CONSOLE_POLL
873 .poll_get_char = serial_txx9_get_poll_char,
874 .poll_put_char = serial_txx9_put_poll_char,
875 #endif
876 };
877
878 static struct uart_txx9_port serial_txx9_ports[UART_NR];
879
880 static void __init serial_txx9_register_ports(struct uart_driver *drv,
881 struct device *dev)
882 {
883 int i;
884
885 for (i = 0; i < UART_NR; i++) {
886 struct uart_txx9_port *up = &serial_txx9_ports[i];
887
888 up->port.line = i;
889 up->port.ops = &serial_txx9_pops;
890 up->port.dev = dev;
891 if (up->port.iobase || up->port.mapbase)
892 uart_add_one_port(drv, &up->port);
893 }
894 }
895
896 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
897
898 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
899 {
900 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
901
902 wait_for_xmitr(up);
903 sio_out(up, TXX9_SITFIFO, ch);
904 }
905
906 /*
907 * Print a string to the serial port trying not to disturb
908 * any possible real use of the port...
909 *
910 * The console_lock must be held when we get here.
911 */
912 static void
913 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
914 {
915 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
916 unsigned int ier, flcr;
917
918 /*
919 * First save the UER then disable the interrupts
920 */
921 ier = sio_in(up, TXX9_SIDICR);
922 sio_out(up, TXX9_SIDICR, 0);
923 /*
924 * Disable flow-control if enabled (and unnecessary)
925 */
926 flcr = sio_in(up, TXX9_SIFLCR);
927 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
928 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
929
930 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
931
932 /*
933 * Finally, wait for transmitter to become empty
934 * and restore the IER
935 */
936 wait_for_xmitr(up);
937 sio_out(up, TXX9_SIFLCR, flcr);
938 sio_out(up, TXX9_SIDICR, ier);
939 }
940
941 static int __init serial_txx9_console_setup(struct console *co, char *options)
942 {
943 struct uart_port *port;
944 struct uart_txx9_port *up;
945 int baud = 9600;
946 int bits = 8;
947 int parity = 'n';
948 int flow = 'n';
949
950 /*
951 * Check whether an invalid uart number has been specified, and
952 * if so, search for the first available port that does have
953 * console support.
954 */
955 if (co->index >= UART_NR)
956 co->index = 0;
957 up = &serial_txx9_ports[co->index];
958 port = &up->port;
959 if (!port->ops)
960 return -ENODEV;
961
962 serial_txx9_initialize(&up->port);
963
964 if (options)
965 uart_parse_options(options, &baud, &parity, &bits, &flow);
966
967 return uart_set_options(port, co, baud, parity, bits, flow);
968 }
969
970 static struct uart_driver serial_txx9_reg;
971 static struct console serial_txx9_console = {
972 .name = TXX9_TTY_NAME,
973 .write = serial_txx9_console_write,
974 .device = uart_console_device,
975 .setup = serial_txx9_console_setup,
976 .flags = CON_PRINTBUFFER,
977 .index = -1,
978 .data = &serial_txx9_reg,
979 };
980
981 static int __init serial_txx9_console_init(void)
982 {
983 register_console(&serial_txx9_console);
984 return 0;
985 }
986 console_initcall(serial_txx9_console_init);
987
988 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
989 #else
990 #define SERIAL_TXX9_CONSOLE NULL
991 #endif
992
993 static struct uart_driver serial_txx9_reg = {
994 .owner = THIS_MODULE,
995 .driver_name = "serial_txx9",
996 .dev_name = TXX9_TTY_NAME,
997 .major = TXX9_TTY_MAJOR,
998 .minor = TXX9_TTY_MINOR_START,
999 .nr = UART_NR,
1000 .cons = SERIAL_TXX9_CONSOLE,
1001 };
1002
1003 int __init early_serial_txx9_setup(struct uart_port *port)
1004 {
1005 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
1006 return -ENODEV;
1007
1008 serial_txx9_ports[port->line].port = *port;
1009 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
1010 serial_txx9_ports[port->line].port.flags |=
1011 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1012 return 0;
1013 }
1014
1015 static DEFINE_MUTEX(serial_txx9_mutex);
1016
1017 /**
1018 * serial_txx9_register_port - register a serial port
1019 * @port: serial port template
1020 *
1021 * Configure the serial port specified by the request.
1022 *
1023 * The port is then probed and if necessary the IRQ is autodetected
1024 * If this fails an error is returned.
1025 *
1026 * On success the port is ready to use and the line number is returned.
1027 */
1028 static int __devinit serial_txx9_register_port(struct uart_port *port)
1029 {
1030 int i;
1031 struct uart_txx9_port *uart;
1032 int ret = -ENOSPC;
1033
1034 mutex_lock(&serial_txx9_mutex);
1035 for (i = 0; i < UART_NR; i++) {
1036 uart = &serial_txx9_ports[i];
1037 if (uart_match_port(&uart->port, port)) {
1038 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1039 break;
1040 }
1041 }
1042 if (i == UART_NR) {
1043 /* Find unused port */
1044 for (i = 0; i < UART_NR; i++) {
1045 uart = &serial_txx9_ports[i];
1046 if (!(uart->port.iobase || uart->port.mapbase))
1047 break;
1048 }
1049 }
1050 if (i < UART_NR) {
1051 uart->port.iobase = port->iobase;
1052 uart->port.membase = port->membase;
1053 uart->port.irq = port->irq;
1054 uart->port.uartclk = port->uartclk;
1055 uart->port.iotype = port->iotype;
1056 uart->port.flags = port->flags
1057 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1058 uart->port.mapbase = port->mapbase;
1059 if (port->dev)
1060 uart->port.dev = port->dev;
1061 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1062 if (ret == 0)
1063 ret = uart->port.line;
1064 }
1065 mutex_unlock(&serial_txx9_mutex);
1066 return ret;
1067 }
1068
1069 /**
1070 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1071 * @line: serial line number
1072 *
1073 * Remove one serial port. This may not be called from interrupt
1074 * context. We hand the port back to the our control.
1075 */
1076 static void __devexit serial_txx9_unregister_port(int line)
1077 {
1078 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1079
1080 mutex_lock(&serial_txx9_mutex);
1081 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1082 uart->port.flags = 0;
1083 uart->port.type = PORT_UNKNOWN;
1084 uart->port.iobase = 0;
1085 uart->port.mapbase = 0;
1086 uart->port.membase = NULL;
1087 uart->port.dev = NULL;
1088 mutex_unlock(&serial_txx9_mutex);
1089 }
1090
1091 /*
1092 * Register a set of serial devices attached to a platform device.
1093 */
1094 static int __devinit serial_txx9_probe(struct platform_device *dev)
1095 {
1096 struct uart_port *p = dev->dev.platform_data;
1097 struct uart_port port;
1098 int ret, i;
1099
1100 memset(&port, 0, sizeof(struct uart_port));
1101 for (i = 0; p && p->uartclk != 0; p++, i++) {
1102 port.iobase = p->iobase;
1103 port.membase = p->membase;
1104 port.irq = p->irq;
1105 port.uartclk = p->uartclk;
1106 port.iotype = p->iotype;
1107 port.flags = p->flags;
1108 port.mapbase = p->mapbase;
1109 port.dev = &dev->dev;
1110 ret = serial_txx9_register_port(&port);
1111 if (ret < 0) {
1112 dev_err(&dev->dev, "unable to register port at index %d "
1113 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1114 p->iobase, (unsigned long long)p->mapbase,
1115 p->irq, ret);
1116 }
1117 }
1118 return 0;
1119 }
1120
1121 /*
1122 * Remove serial ports registered against a platform device.
1123 */
1124 static int __devexit serial_txx9_remove(struct platform_device *dev)
1125 {
1126 int i;
1127
1128 for (i = 0; i < UART_NR; i++) {
1129 struct uart_txx9_port *up = &serial_txx9_ports[i];
1130
1131 if (up->port.dev == &dev->dev)
1132 serial_txx9_unregister_port(i);
1133 }
1134 return 0;
1135 }
1136
1137 #ifdef CONFIG_PM
1138 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1139 {
1140 int i;
1141
1142 for (i = 0; i < UART_NR; i++) {
1143 struct uart_txx9_port *up = &serial_txx9_ports[i];
1144
1145 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1146 uart_suspend_port(&serial_txx9_reg, &up->port);
1147 }
1148
1149 return 0;
1150 }
1151
1152 static int serial_txx9_resume(struct platform_device *dev)
1153 {
1154 int i;
1155
1156 for (i = 0; i < UART_NR; i++) {
1157 struct uart_txx9_port *up = &serial_txx9_ports[i];
1158
1159 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1160 uart_resume_port(&serial_txx9_reg, &up->port);
1161 }
1162
1163 return 0;
1164 }
1165 #endif
1166
1167 static struct platform_driver serial_txx9_plat_driver = {
1168 .probe = serial_txx9_probe,
1169 .remove = __devexit_p(serial_txx9_remove),
1170 #ifdef CONFIG_PM
1171 .suspend = serial_txx9_suspend,
1172 .resume = serial_txx9_resume,
1173 #endif
1174 .driver = {
1175 .name = "serial_txx9",
1176 .owner = THIS_MODULE,
1177 },
1178 };
1179
1180 #ifdef ENABLE_SERIAL_TXX9_PCI
1181 /*
1182 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1183 * to the arrangement of serial ports on a PCI card.
1184 */
1185 static int __devinit
1186 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1187 {
1188 struct uart_port port;
1189 int line;
1190 int rc;
1191
1192 rc = pci_enable_device(dev);
1193 if (rc)
1194 return rc;
1195
1196 memset(&port, 0, sizeof(port));
1197 port.ops = &serial_txx9_pops;
1198 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1199 port.uartclk = 66670000;
1200 port.irq = dev->irq;
1201 port.iotype = UPIO_PORT;
1202 port.iobase = pci_resource_start(dev, 1);
1203 port.dev = &dev->dev;
1204 line = serial_txx9_register_port(&port);
1205 if (line < 0) {
1206 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1207 pci_disable_device(dev);
1208 return line;
1209 }
1210 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1211
1212 return 0;
1213 }
1214
1215 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1216 {
1217 struct uart_txx9_port *up = pci_get_drvdata(dev);
1218
1219 pci_set_drvdata(dev, NULL);
1220
1221 if (up) {
1222 serial_txx9_unregister_port(up->port.line);
1223 pci_disable_device(dev);
1224 }
1225 }
1226
1227 #ifdef CONFIG_PM
1228 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1229 {
1230 struct uart_txx9_port *up = pci_get_drvdata(dev);
1231
1232 if (up)
1233 uart_suspend_port(&serial_txx9_reg, &up->port);
1234 pci_save_state(dev);
1235 pci_set_power_state(dev, pci_choose_state(dev, state));
1236 return 0;
1237 }
1238
1239 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1240 {
1241 struct uart_txx9_port *up = pci_get_drvdata(dev);
1242
1243 pci_set_power_state(dev, PCI_D0);
1244 pci_restore_state(dev);
1245 if (up)
1246 uart_resume_port(&serial_txx9_reg, &up->port);
1247 return 0;
1248 }
1249 #endif
1250
1251 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1252 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1253 { 0, }
1254 };
1255
1256 static struct pci_driver serial_txx9_pci_driver = {
1257 .name = "serial_txx9",
1258 .probe = pciserial_txx9_init_one,
1259 .remove = __devexit_p(pciserial_txx9_remove_one),
1260 #ifdef CONFIG_PM
1261 .suspend = pciserial_txx9_suspend_one,
1262 .resume = pciserial_txx9_resume_one,
1263 #endif
1264 .id_table = serial_txx9_pci_tbl,
1265 };
1266
1267 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1268 #endif /* ENABLE_SERIAL_TXX9_PCI */
1269
1270 static struct platform_device *serial_txx9_plat_devs;
1271
1272 static int __init serial_txx9_init(void)
1273 {
1274 int ret;
1275
1276 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1277
1278 ret = uart_register_driver(&serial_txx9_reg);
1279 if (ret)
1280 goto out;
1281
1282 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1283 if (!serial_txx9_plat_devs) {
1284 ret = -ENOMEM;
1285 goto unreg_uart_drv;
1286 }
1287
1288 ret = platform_device_add(serial_txx9_plat_devs);
1289 if (ret)
1290 goto put_dev;
1291
1292 serial_txx9_register_ports(&serial_txx9_reg,
1293 &serial_txx9_plat_devs->dev);
1294
1295 ret = platform_driver_register(&serial_txx9_plat_driver);
1296 if (ret)
1297 goto del_dev;
1298
1299 #ifdef ENABLE_SERIAL_TXX9_PCI
1300 ret = pci_register_driver(&serial_txx9_pci_driver);
1301 #endif
1302 if (ret == 0)
1303 goto out;
1304
1305 del_dev:
1306 platform_device_del(serial_txx9_plat_devs);
1307 put_dev:
1308 platform_device_put(serial_txx9_plat_devs);
1309 unreg_uart_drv:
1310 uart_unregister_driver(&serial_txx9_reg);
1311 out:
1312 return ret;
1313 }
1314
1315 static void __exit serial_txx9_exit(void)
1316 {
1317 int i;
1318
1319 #ifdef ENABLE_SERIAL_TXX9_PCI
1320 pci_unregister_driver(&serial_txx9_pci_driver);
1321 #endif
1322 platform_driver_unregister(&serial_txx9_plat_driver);
1323 platform_device_unregister(serial_txx9_plat_devs);
1324 for (i = 0; i < UART_NR; i++) {
1325 struct uart_txx9_port *up = &serial_txx9_ports[i];
1326 if (up->port.iobase || up->port.mapbase)
1327 uart_remove_one_port(&serial_txx9_reg, &up->port);
1328 }
1329
1330 uart_unregister_driver(&serial_txx9_reg);
1331 }
1332
1333 module_init(serial_txx9_init);
1334 module_exit(serial_txx9_exit);
1335
1336 MODULE_LICENSE("GPL");
1337 MODULE_DESCRIPTION("TX39/49 serial driver");
1338
1339 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
1340
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