1 /*
2 * File: linux/drivers/serial/bfin_sport_uart.c
3 *
4 * Based on: drivers/serial/bfin_5xx.c by Aubrey Li.
5 * Author: Roy Huang <roy.huang@analog.com>
6 *
7 * Created: Nov 22, 2006
8 * Copyright: (c) 2006-2007 Analog Devices Inc.
9 * Description: this driver enable SPORTs on Blackfin emulate UART.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see the file COPYING, or write
23 * to the Free Software Foundation, Inc.,
24 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 */
26
27 /*
28 * This driver and the hardware supported are in term of EE-191 of ADI.
29 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
30 * This application note describe how to implement a UART on a Sharc DSP,
31 * but this driver is implemented on Blackfin Processor.
32 */
33
34 /* After reset, there is a prelude of low level pulse when transmit data first
35 * time. No addtional pulse in following transmit.
36 * According to document:
37 * The SPORTs are ready to start transmitting or receiving data no later than
38 * three serial clock cycles after they are enabled in the SPORTx_TCR1 or
39 * SPORTx_RCR1 register. No serial clock cycles are lost from this point on.
40 * The first internal frame sync will occur one frame sync delay after the
41 * SPORTs are ready. External frame syncs can occur as soon as the SPORT is
42 * ready.
43 */
44
45 /* Thanks to Axel Alatalo <axel@rubico.se> for fixing sport rx bug. Sometimes
46 * sport receives data incorrectly. The following is Axel's words.
47 * As EE-191, sport rx samples 3 times of the UART baudrate and takes the
48 * middle smaple of every 3 samples as the data bit. For a 8-N-1 UART setting,
49 * 30 samples will be required for a byte. If transmitter sends a 1/3 bit short
50 * byte due to buadrate drift, then the 30th sample of a byte, this sample is
51 * also the third sample of the stop bit, will happens on the immediately
52 * following start bit which will be thrown away and missed. Thus since parts
53 * of the startbit will be missed and the receiver will begin to drift, the
54 * effect accumulates over time until synchronization is lost.
55 * If only require 2 samples of the stopbit (by sampling in total 29 samples),
56 * then a to short byte as in the case above will be tolerated. Then the 1/3
57 * early startbit will trigger a framesync since the last read is complete
58 * after only 2/3 stopbit and framesync is active during the last 1/3 looking
59 * for a possible early startbit. */
60
61 //#define DEBUG
62
63 #include <linux/module.h>
64 #include <linux/ioport.h>
65 #include <linux/init.h>
66 #include <linux/console.h>
67 #include <linux/sysrq.h>
68 #include <linux/platform_device.h>
69 #include <linux/tty.h>
70 #include <linux/tty_flip.h>
71 #include <linux/serial_core.h>
72
73 #include <asm/delay.h>
74 #include <asm/portmux.h>
75
76 #include "bfin_sport_uart.h"
77
78 unsigned short bfin_uart_pin_req_sport0[] =
79 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
80 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0};
81
82 unsigned short bfin_uart_pin_req_sport1[] =
83 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
84 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0};
85
86 #define DRV_NAME "bfin-sport-uart"
87
88 struct sport_uart_port {
89 struct uart_port port;
90 char *name;
91
92 int tx_irq;
93 int rx_irq;
94 int err_irq;
95 };
96
97 static void sport_uart_tx_chars(struct sport_uart_port *up);
98 static void sport_stop_tx(struct uart_port *port);
99
100 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
101 {
102 pr_debug("%s value:%x\n", __func__, value);
103 /* Place a Start and Stop bit */
104 __asm__ __volatile__ (
105 "R2 = b#01111111100;"
106 "R3 = b#10000000001;"
107 "%0 <<= 2;"
108 "%0 = %0 & R2;"
109 "%0 = %0 | R3;"
110 : "=d"(value)
111 : "d"(value)
112 : "ASTAT", "R2", "R3"
113 );
114 pr_debug("%s value:%x\n", __func__, value);
115
116 SPORT_PUT_TX(up, value);
117 }
118
119 static inline unsigned int rx_one_byte(struct sport_uart_port *up)
120 {
121 unsigned int value, extract;
122 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
123
124 value = SPORT_GET_RX32(up);
125 pr_debug("%s value:%x\n", __func__, value);
126
127 /* Extract 8 bits data */
128 __asm__ __volatile__ (
129 "%[extr] = 0;"
130 "%[mask1] = 0x1801(Z);"
131 "%[mask2] = 0x0300(Z);"
132 "%[shift] = 0;"
133 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
134 ".Lloop_s:"
135 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
136 "%[tmp] <<= %[shift];"
137 "%[extr] = %[extr] | %[tmp];"
138 "%[mask1] = %[mask1] - %[mask2];"
139 ".Lloop_e:"
140 "%[shift] += 1;"
141 : [val]"=d"(value), [extr]"=d"(extract), [shift]"=d"(tmp_shift), [tmp]"=d"(tmp),
142 [mask1]"=d"(tmp_mask1), [mask2]"=d"(tmp_mask2)
143 : "d"(value), [lc]"a"(8)
144 : "ASTAT", "LB0", "LC0", "LT0"
145 );
146
147 pr_debug(" extract:%x\n", extract);
148 return extract;
149 }
150
151 static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate)
152 {
153 int tclkdiv, tfsdiv, rclkdiv;
154
155 /* Set TCR1 and TCR2 */
156 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
157 SPORT_PUT_TCR2(up, 10);
158 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
159
160 /* Set RCR1 and RCR2 */
161 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
162 SPORT_PUT_RCR2(up, 28);
163 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
164
165 tclkdiv = sclk/(2 * baud_rate) - 1;
166 tfsdiv = 12;
167 rclkdiv = sclk/(2 * baud_rate * 3) - 1;
168 SPORT_PUT_TCLKDIV(up, tclkdiv);
169 SPORT_PUT_TFSDIV(up, tfsdiv);
170 SPORT_PUT_RCLKDIV(up, rclkdiv);
171 SSYNC();
172 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, tfsdiv:%d, rclkdiv:%d\n",
173 __func__, sclk, baud_rate, tclkdiv, tfsdiv, rclkdiv);
174
175 return 0;
176 }
177
178 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
179 {
180 struct sport_uart_port *up = dev_id;
181 struct tty_struct *tty = up->port.info->port.tty;
182 unsigned int ch;
183
184 do {
185 ch = rx_one_byte(up);
186 up->port.icount.rx++;
187
188 if (uart_handle_sysrq_char(&up->port, ch))
189 ;
190 else
191 tty_insert_flip_char(tty, ch, TTY_NORMAL);
192 } while (SPORT_GET_STAT(up) & RXNE);
193 tty_flip_buffer_push(tty);
194
195 return IRQ_HANDLED;
196 }
197
198 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
199 {
200 sport_uart_tx_chars(dev_id);
201
202 return IRQ_HANDLED;
203 }
204
205 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
206 {
207 struct sport_uart_port *up = dev_id;
208 struct tty_struct *tty = up->port.info->port.tty;
209 unsigned int stat = SPORT_GET_STAT(up);
210
211 /* Overflow in RX FIFO */
212 if (stat & ROVF) {
213 up->port.icount.overrun++;
214 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
215 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
216 }
217 /* These should not happen */
218 if (stat & (TOVF | TUVF | RUVF)) {
219 printk(KERN_ERR "SPORT Error:%s %s %s\n",
220 (stat & TOVF)?"TX overflow":"",
221 (stat & TUVF)?"TX underflow":"",
222 (stat & RUVF)?"RX underflow":"");
223 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
224 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
225 }
226 SSYNC();
227
228 return IRQ_HANDLED;
229 }
230
231 /* Reqeust IRQ, Setup clock */
232 static int sport_startup(struct uart_port *port)
233 {
234 struct sport_uart_port *up = (struct sport_uart_port *)port;
235 char buffer[20];
236 int retval;
237
238 pr_debug("%s enter\n", __func__);
239 snprintf(buffer, 20, "%s rx", up->name);
240 retval = request_irq(up->rx_irq, sport_uart_rx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
241 if (retval) {
242 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
243 return retval;
244 }
245
246 snprintf(buffer, 20, "%s tx", up->name);
247 retval = request_irq(up->tx_irq, sport_uart_tx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
248 if (retval) {
249 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
250 goto fail1;
251 }
252
253 snprintf(buffer, 20, "%s err", up->name);
254 retval = request_irq(up->err_irq, sport_uart_err_irq, IRQF_SAMPLE_RANDOM, buffer, up);
255 if (retval) {
256 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
257 goto fail2;
258 }
259
260 if (port->line) {
261 if (peripheral_request_list(bfin_uart_pin_req_sport1, DRV_NAME))
262 goto fail3;
263 } else {
264 if (peripheral_request_list(bfin_uart_pin_req_sport0, DRV_NAME))
265 goto fail3;
266 }
267
268 sport_uart_setup(up, get_sclk(), port->uartclk);
269
270 /* Enable receive interrupt */
271 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) | RSPEN));
272 SSYNC();
273
274 return 0;
275
276
277 fail3:
278 printk(KERN_ERR DRV_NAME
279 ": Requesting Peripherals failed\n");
280
281 free_irq(up->err_irq, up);
282 fail2:
283 free_irq(up->tx_irq, up);
284 fail1:
285 free_irq(up->rx_irq, up);
286
287 return retval;
288
289 }
290
291 static void sport_uart_tx_chars(struct sport_uart_port *up)
292 {
293 struct circ_buf *xmit = &up->port.info->xmit;
294
295 if (SPORT_GET_STAT(up) & TXF)
296 return;
297
298 if (up->port.x_char) {
299 tx_one_byte(up, up->port.x_char);
300 up->port.icount.tx++;
301 up->port.x_char = 0;
302 return;
303 }
304
305 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
306 sport_stop_tx(&up->port);
307 return;
308 }
309
310 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
311 tx_one_byte(up, xmit->buf[xmit->tail]);
312 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
313 up->port.icount.tx++;
314 }
315
316 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
317 uart_write_wakeup(&up->port);
318 }
319
320 static unsigned int sport_tx_empty(struct uart_port *port)
321 {
322 struct sport_uart_port *up = (struct sport_uart_port *)port;
323 unsigned int stat;
324
325 stat = SPORT_GET_STAT(up);
326 pr_debug("%s stat:%04x\n", __func__, stat);
327 if (stat & TXHRE) {
328 return TIOCSER_TEMT;
329 } else
330 return 0;
331 }
332
333 static unsigned int sport_get_mctrl(struct uart_port *port)
334 {
335 pr_debug("%s enter\n", __func__);
336 return (TIOCM_CTS | TIOCM_CD | TIOCM_DSR);
337 }
338
339 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
340 {
341 pr_debug("%s enter\n", __func__);
342 }
343
344 static void sport_stop_tx(struct uart_port *port)
345 {
346 struct sport_uart_port *up = (struct sport_uart_port *)port;
347 unsigned int stat;
348
349 pr_debug("%s enter\n", __func__);
350
351 stat = SPORT_GET_STAT(up);
352 while(!(stat & TXHRE)) {
353 udelay(1);
354 stat = SPORT_GET_STAT(up);
355 }
356 /* Although the hold register is empty, last byte is still in shift
357 * register and not sent out yet. If baud rate is lower than default,
358 * delay should be longer. For example, if the baud rate is 9600,
359 * the delay must be at least 2ms by experience */
360 udelay(500);
361
362 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
363 SSYNC();
364
365 return;
366 }
367
368 static void sport_start_tx(struct uart_port *port)
369 {
370 struct sport_uart_port *up = (struct sport_uart_port *)port;
371
372 pr_debug("%s enter\n", __func__);
373 /* Write data into SPORT FIFO before enable SPROT to transmit */
374 sport_uart_tx_chars(up);
375
376 /* Enable transmit, then an interrupt will generated */
377 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
378 SSYNC();
379 pr_debug("%s exit\n", __func__);
380 }
381
382 static void sport_stop_rx(struct uart_port *port)
383 {
384 struct sport_uart_port *up = (struct sport_uart_port *)port;
385
386 pr_debug("%s enter\n", __func__);
387 /* Disable sport to stop rx */
388 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
389 SSYNC();
390 }
391
392 static void sport_enable_ms(struct uart_port *port)
393 {
394 pr_debug("%s enter\n", __func__);
395 }
396
397 static void sport_break_ctl(struct uart_port *port, int break_state)
398 {
399 pr_debug("%s enter\n", __func__);
400 }
401
402 static void sport_shutdown(struct uart_port *port)
403 {
404 struct sport_uart_port *up = (struct sport_uart_port *)port;
405
406 pr_debug("%s enter\n", __func__);
407
408 /* Disable sport */
409 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
410 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
411 SSYNC();
412
413 if (port->line) {
414 peripheral_free_list(bfin_uart_pin_req_sport1);
415 } else {
416 peripheral_free_list(bfin_uart_pin_req_sport0);
417 }
418
419 free_irq(up->rx_irq, up);
420 free_irq(up->tx_irq, up);
421 free_irq(up->err_irq, up);
422 }
423
424 static void sport_set_termios(struct uart_port *port,
425 struct ktermios *termios, struct ktermios *old)
426 {
427 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
428 uart_update_timeout(port, CS8 ,port->uartclk);
429 }
430
431 static const char *sport_type(struct uart_port *port)
432 {
433 struct sport_uart_port *up = (struct sport_uart_port *)port;
434
435 pr_debug("%s enter\n", __func__);
436 return up->name;
437 }
438
439 static void sport_release_port(struct uart_port *port)
440 {
441 pr_debug("%s enter\n", __func__);
442 }
443
444 static int sport_request_port(struct uart_port *port)
445 {
446 pr_debug("%s enter\n", __func__);
447 return 0;
448 }
449
450 static void sport_config_port(struct uart_port *port, int flags)
451 {
452 struct sport_uart_port *up = (struct sport_uart_port *)port;
453
454 pr_debug("%s enter\n", __func__);
455 up->port.type = PORT_BFIN_SPORT;
456 }
457
458 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
459 {
460 pr_debug("%s enter\n", __func__);
461 return 0;
462 }
463
464 struct uart_ops sport_uart_ops = {
465 .tx_empty = sport_tx_empty,
466 .set_mctrl = sport_set_mctrl,
467 .get_mctrl = sport_get_mctrl,
468 .stop_tx = sport_stop_tx,
469 .start_tx = sport_start_tx,
470 .stop_rx = sport_stop_rx,
471 .enable_ms = sport_enable_ms,
472 .break_ctl = sport_break_ctl,
473 .startup = sport_startup,
474 .shutdown = sport_shutdown,
475 .set_termios = sport_set_termios,
476 .type = sport_type,
477 .release_port = sport_release_port,
478 .request_port = sport_request_port,
479 .config_port = sport_config_port,
480 .verify_port = sport_verify_port,
481 };
482
483 static struct sport_uart_port sport_uart_ports[] = {
484 { /* SPORT 0 */
485 .name = "SPORT0",
486 .tx_irq = IRQ_SPORT0_TX,
487 .rx_irq = IRQ_SPORT0_RX,
488 .err_irq= IRQ_SPORT0_ERROR,
489 .port = {
490 .type = PORT_BFIN_SPORT,
491 .iotype = UPIO_MEM,
492 .membase = (void __iomem *)SPORT0_TCR1,
493 .mapbase = SPORT0_TCR1,
494 .irq = IRQ_SPORT0_RX,
495 .uartclk = CONFIG_SPORT_BAUD_RATE,
496 .fifosize = 8,
497 .ops = &sport_uart_ops,
498 .line = 0,
499 },
500 }, { /* SPORT 1 */
501 .name = "SPORT1",
502 .tx_irq = IRQ_SPORT1_TX,
503 .rx_irq = IRQ_SPORT1_RX,
504 .err_irq= IRQ_SPORT1_ERROR,
505 .port = {
506 .type = PORT_BFIN_SPORT,
507 .iotype = UPIO_MEM,
508 .membase = (void __iomem *)SPORT1_TCR1,
509 .mapbase = SPORT1_TCR1,
510 .irq = IRQ_SPORT1_RX,
511 .uartclk = CONFIG_SPORT_BAUD_RATE,
512 .fifosize = 8,
513 .ops = &sport_uart_ops,
514 .line = 1,
515 },
516 }
517 };
518
519 static struct uart_driver sport_uart_reg = {
520 .owner = THIS_MODULE,
521 .driver_name = "SPORT-UART",
522 .dev_name = "ttySS",
523 .major = 204,
524 .minor = 84,
525 .nr = ARRAY_SIZE(sport_uart_ports),
526 .cons = NULL,
527 };
528
529 static int sport_uart_suspend(struct platform_device *dev, pm_message_t state)
530 {
531 struct sport_uart_port *sport = platform_get_drvdata(dev);
532
533 pr_debug("%s enter\n", __func__);
534 if (sport)
535 uart_suspend_port(&sport_uart_reg, &sport->port);
536
537 return 0;
538 }
539
540 static int sport_uart_resume(struct platform_device *dev)
541 {
542 struct sport_uart_port *sport = platform_get_drvdata(dev);
543
544 pr_debug("%s enter\n", __func__);
545 if (sport)
546 uart_resume_port(&sport_uart_reg, &sport->port);
547
548 return 0;
549 }
550
551 static int sport_uart_probe(struct platform_device *dev)
552 {
553 pr_debug("%s enter\n", __func__);
554 sport_uart_ports[dev->id].port.dev = &dev->dev;
555 uart_add_one_port(&sport_uart_reg, &sport_uart_ports[dev->id].port);
556 platform_set_drvdata(dev, &sport_uart_ports[dev->id]);
557
558 return 0;
559 }
560
561 static int sport_uart_remove(struct platform_device *dev)
562 {
563 struct sport_uart_port *sport = platform_get_drvdata(dev);
564
565 pr_debug("%s enter\n", __func__);
566 platform_set_drvdata(dev, NULL);
567
568 if (sport)
569 uart_remove_one_port(&sport_uart_reg, &sport->port);
570
571 return 0;
572 }
573
574 static struct platform_driver sport_uart_driver = {
575 .probe = sport_uart_probe,
576 .remove = sport_uart_remove,
577 .suspend = sport_uart_suspend,
578 .resume = sport_uart_resume,
579 .driver = {
580 .name = DRV_NAME,
581 },
582 };
583
584 static int __init sport_uart_init(void)
585 {
586 int ret;
587
588 pr_debug("%s enter\n", __func__);
589 ret = uart_register_driver(&sport_uart_reg);
590 if (ret != 0) {
591 printk(KERN_ERR "Failed to register %s:%d\n",
592 sport_uart_reg.driver_name, ret);
593 return ret;
594 }
595
596 ret = platform_driver_register(&sport_uart_driver);
597 if (ret != 0) {
598 printk(KERN_ERR "Failed to register sport uart driver:%d\n", ret);
599 uart_unregister_driver(&sport_uart_reg);
600 }
601
602
603 pr_debug("%s exit\n", __func__);
604 return ret;
605 }
606
607 static void __exit sport_uart_exit(void)
608 {
609 pr_debug("%s enter\n", __func__);
610 platform_driver_unregister(&sport_uart_driver);
611 uart_unregister_driver(&sport_uart_reg);
612 }
613
614 module_init(sport_uart_init);
615 module_exit(sport_uart_exit);
616
617 MODULE_LICENSE("GPL");
618
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