Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  *  linux/drivers/char/8250.h
  3  *
  4  *  Driver for 8250/16550-type serial ports
  5  *
  6  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7  *
  8  *  Copyright (C) 2001 Russell King.
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License as published by
 12  * the Free Software Foundation; either version 2 of the License, or
 13  * (at your option) any later version.
 14  */
 15 
 16 #include <linux/serial_8250.h>
 17 
 18 struct old_serial_port {
 19         unsigned int uart;
 20         unsigned int baud_base;
 21         unsigned int port;
 22         unsigned int irq;
 23         unsigned int flags;
 24         unsigned char hub6;
 25         unsigned char io_type;
 26         unsigned char *iomem_base;
 27         unsigned short iomem_reg_shift;
 28 };
 29 
 30 /*
 31  * This replaces serial_uart_config in include/linux/serial.h
 32  */
 33 struct serial8250_config {
 34         const char      *name;
 35         unsigned short  fifo_size;
 36         unsigned short  tx_loadsz;
 37         unsigned char   fcr;
 38         unsigned int    flags;
 39 };
 40 
 41 #define UART_CAP_FIFO   (1 << 8)        /* UART has FIFO */
 42 #define UART_CAP_EFR    (1 << 9)        /* UART has EFR */
 43 #define UART_CAP_SLEEP  (1 << 10)       /* UART has IER sleep */
 44 #define UART_CAP_AFE    (1 << 11)       /* MCR-based hw flow control */
 45 #define UART_CAP_UUE    (1 << 12)       /* UART needs IER bit 6 set (Xscale) */
 46 
 47 #define UART_BUG_QUOT   (1 << 0)        /* UART has buggy quot LSB */
 48 #define UART_BUG_TXEN   (1 << 1)        /* UART has buggy TX IIR status */
 49 #define UART_BUG_NOMSR  (1 << 2)        /* UART has buggy MSR status bits (Au1x00) */
 50 #define UART_BUG_THRE   (1 << 3)        /* UART has buggy THRE reassertion */
 51 
 52 #define PROBE_RSA       (1 << 0)
 53 #define PROBE_ANY       (~0)
 54 
 55 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
 56 
 57 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
 58 #define SERIAL8250_SHARE_IRQS 1
 59 #else
 60 #define SERIAL8250_SHARE_IRQS 0
 61 #endif
 62 
 63 #if defined(__alpha__) && !defined(CONFIG_PCI)
 64 /*
 65  * Digital did something really horribly wrong with the OUT1 and OUT2
 66  * lines on at least some ALPHA's.  The failure mode is that if either
 67  * is cleared, the machine locks up with endless interrupts.
 68  */
 69 #define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
 70 #elif defined(CONFIG_SBC8560)
 71 /*
 72  * WindRiver did something similarly broken on their SBC8560 board. The
 73  * UART tristates its IRQ output while OUT2 is clear, but they pulled
 74  * the interrupt line _up_ instead of down, so if we register the IRQ
 75  * while the UART is in that state, we die in an IRQ storm. */
 76 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
 77 #else
 78 #define ALPHA_KLUDGE_MCR 0
 79 #endif
 80 
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