Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * linux/drivers/serial/21285.c
  3  *
  4  * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
  5  *
  6  * Based on drivers/char/serial.c
  7  *
  8  *  $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
  9  */
 10 #include <linux/module.h>
 11 #include <linux/tty.h>
 12 #include <linux/ioport.h>
 13 #include <linux/init.h>
 14 #include <linux/console.h>
 15 #include <linux/device.h>
 16 #include <linux/tty_flip.h>
 17 #include <linux/serial_core.h>
 18 #include <linux/serial.h>
 19 
 20 #include <asm/io.h>
 21 #include <asm/irq.h>
 22 #include <asm/mach-types.h>
 23 #include <asm/hardware/dec21285.h>
 24 #include <asm/hardware.h>
 25 
 26 #define BAUD_BASE               (mem_fclk_21285/64)
 27 
 28 #define SERIAL_21285_NAME       "ttyFB"
 29 #define SERIAL_21285_MAJOR      204
 30 #define SERIAL_21285_MINOR      4
 31 
 32 #define RXSTAT_DUMMY_READ       0x80000000
 33 #define RXSTAT_FRAME            (1 << 0)
 34 #define RXSTAT_PARITY           (1 << 1)
 35 #define RXSTAT_OVERRUN          (1 << 2)
 36 #define RXSTAT_ANYERR           (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
 37 
 38 #define H_UBRLCR_BREAK          (1 << 0)
 39 #define H_UBRLCR_PARENB         (1 << 1)
 40 #define H_UBRLCR_PAREVN         (1 << 2)
 41 #define H_UBRLCR_STOPB          (1 << 3)
 42 #define H_UBRLCR_FIFO           (1 << 4)
 43 
 44 static const char serial21285_name[] = "Footbridge UART";
 45 
 46 #define tx_enabled(port)        ((port)->unused[0])
 47 #define rx_enabled(port)        ((port)->unused[1])
 48 
 49 /*
 50  * The documented expression for selecting the divisor is:
 51  *  BAUD_BASE / baud - 1
 52  * However, typically BAUD_BASE is not divisible by baud, so
 53  * we want to select the divisor that gives us the minimum
 54  * error.  Therefore, we want:
 55  *  int(BAUD_BASE / baud - 0.5) ->
 56  *  int(BAUD_BASE / baud - (baud >> 1) / baud) ->
 57  *  int((BAUD_BASE - (baud >> 1)) / baud)
 58  */
 59 
 60 static void serial21285_stop_tx(struct uart_port *port)
 61 {
 62         if (tx_enabled(port)) {
 63                 disable_irq(IRQ_CONTX);
 64                 tx_enabled(port) = 0;
 65         }
 66 }
 67 
 68 static void serial21285_start_tx(struct uart_port *port)
 69 {
 70         if (!tx_enabled(port)) {
 71                 enable_irq(IRQ_CONTX);
 72                 tx_enabled(port) = 1;
 73         }
 74 }
 75 
 76 static void serial21285_stop_rx(struct uart_port *port)
 77 {
 78         if (rx_enabled(port)) {
 79                 disable_irq(IRQ_CONRX);
 80                 rx_enabled(port) = 0;
 81         }
 82 }
 83 
 84 static void serial21285_enable_ms(struct uart_port *port)
 85 {
 86 }
 87 
 88 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
 89 {
 90         struct uart_port *port = dev_id;
 91         struct tty_struct *tty = port->info->tty;
 92         unsigned int status, ch, flag, rxs, max_count = 256;
 93 
 94         status = *CSR_UARTFLG;
 95         while (!(status & 0x10) && max_count--) {
 96                 ch = *CSR_UARTDR;
 97                 flag = TTY_NORMAL;
 98                 port->icount.rx++;
 99 
100                 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
101                 if (unlikely(rxs & RXSTAT_ANYERR)) {
102                         if (rxs & RXSTAT_PARITY)
103                                 port->icount.parity++;
104                         else if (rxs & RXSTAT_FRAME)
105                                 port->icount.frame++;
106                         if (rxs & RXSTAT_OVERRUN)
107                                 port->icount.overrun++;
108 
109                         rxs &= port->read_status_mask;
110 
111                         if (rxs & RXSTAT_PARITY)
112                                 flag = TTY_PARITY;
113                         else if (rxs & RXSTAT_FRAME)
114                                 flag = TTY_FRAME;
115                 }
116 
117                 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
118 
119                 status = *CSR_UARTFLG;
120         }
121         tty_flip_buffer_push(tty);
122 
123         return IRQ_HANDLED;
124 }
125 
126 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
127 {
128         struct uart_port *port = dev_id;
129         struct circ_buf *xmit = &port->info->xmit;
130         int count = 256;
131 
132         if (port->x_char) {
133                 *CSR_UARTDR = port->x_char;
134                 port->icount.tx++;
135                 port->x_char = 0;
136                 goto out;
137         }
138         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
139                 serial21285_stop_tx(port);
140                 goto out;
141         }
142 
143         do {
144                 *CSR_UARTDR = xmit->buf[xmit->tail];
145                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
146                 port->icount.tx++;
147                 if (uart_circ_empty(xmit))
148                         break;
149         } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
150 
151         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
152                 uart_write_wakeup(port);
153 
154         if (uart_circ_empty(xmit))
155                 serial21285_stop_tx(port);
156 
157  out:
158         return IRQ_HANDLED;
159 }
160 
161 static unsigned int serial21285_tx_empty(struct uart_port *port)
162 {
163         return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
164 }
165 
166 /* no modem control lines */
167 static unsigned int serial21285_get_mctrl(struct uart_port *port)
168 {
169         return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
170 }
171 
172 static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
173 {
174 }
175 
176 static void serial21285_break_ctl(struct uart_port *port, int break_state)
177 {
178         unsigned long flags;
179         unsigned int h_lcr;
180 
181         spin_lock_irqsave(&port->lock, flags);
182         h_lcr = *CSR_H_UBRLCR;
183         if (break_state)
184                 h_lcr |= H_UBRLCR_BREAK;
185         else
186                 h_lcr &= ~H_UBRLCR_BREAK;
187         *CSR_H_UBRLCR = h_lcr;
188         spin_unlock_irqrestore(&port->lock, flags);
189 }
190 
191 static int serial21285_startup(struct uart_port *port)
192 {
193         int ret;
194 
195         tx_enabled(port) = 1;
196         rx_enabled(port) = 1;
197 
198         ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
199                           serial21285_name, port);
200         if (ret == 0) {
201                 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
202                                   serial21285_name, port);
203                 if (ret)
204                         free_irq(IRQ_CONRX, port);
205         }
206 
207         return ret;
208 }
209 
210 static void serial21285_shutdown(struct uart_port *port)
211 {
212         free_irq(IRQ_CONTX, port);
213         free_irq(IRQ_CONRX, port);
214 }
215 
216 static void
217 serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
218                         struct ktermios *old)
219 {
220         unsigned long flags;
221         unsigned int baud, quot, h_lcr;
222 
223         /*
224          * We don't support modem control lines.
225          */
226         termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
227         termios->c_cflag |= CLOCAL;
228 
229         /*
230          * We don't support BREAK character recognition.
231          */
232         termios->c_iflag &= ~(IGNBRK | BRKINT);
233 
234         /*
235          * Ask the core to calculate the divisor for us.
236          */
237         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
238         quot = uart_get_divisor(port, baud);
239 
240         if (port->info && port->info->tty) {
241                 struct tty_struct *tty = port->info->tty;
242                 unsigned int b = port->uartclk / (16 * quot);
243                 tty_encode_baud_rate(tty, b, b);
244         }
245 
246         switch (termios->c_cflag & CSIZE) {
247         case CS5:
248                 h_lcr = 0x00;
249                 break;
250         case CS6:
251                 h_lcr = 0x20;
252                 break;
253         case CS7:
254                 h_lcr = 0x40;
255                 break;
256         default: /* CS8 */
257                 h_lcr = 0x60;
258                 break;
259         }
260 
261         if (termios->c_cflag & CSTOPB)
262                 h_lcr |= H_UBRLCR_STOPB;
263         if (termios->c_cflag & PARENB) {
264                 h_lcr |= H_UBRLCR_PARENB;
265                 if (!(termios->c_cflag & PARODD))
266                         h_lcr |= H_UBRLCR_PAREVN;
267         }
268 
269         if (port->fifosize)
270                 h_lcr |= H_UBRLCR_FIFO;
271 
272         spin_lock_irqsave(&port->lock, flags);
273 
274         /*
275          * Update the per-port timeout.
276          */
277         uart_update_timeout(port, termios->c_cflag, baud);
278 
279         /*
280          * Which character status flags are we interested in?
281          */
282         port->read_status_mask = RXSTAT_OVERRUN;
283         if (termios->c_iflag & INPCK)
284                 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
285 
286         /*
287          * Which character status flags should we ignore?
288          */
289         port->ignore_status_mask = 0;
290         if (termios->c_iflag & IGNPAR)
291                 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
292         if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
293                 port->ignore_status_mask |= RXSTAT_OVERRUN;
294 
295         /*
296          * Ignore all characters if CREAD is not set.
297          */
298         if ((termios->c_cflag & CREAD) == 0)
299                 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
300 
301         quot -= 1;
302 
303         *CSR_UARTCON = 0;
304         *CSR_L_UBRLCR = quot & 0xff;
305         *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
306         *CSR_H_UBRLCR = h_lcr;
307         *CSR_UARTCON = 1;
308 
309         spin_unlock_irqrestore(&port->lock, flags);
310 }
311 
312 static const char *serial21285_type(struct uart_port *port)
313 {
314         return port->type == PORT_21285 ? "DC21285" : NULL;
315 }
316 
317 static void serial21285_release_port(struct uart_port *port)
318 {
319         release_mem_region(port->mapbase, 32);
320 }
321 
322 static int serial21285_request_port(struct uart_port *port)
323 {
324         return request_mem_region(port->mapbase, 32, serial21285_name)
325                          != NULL ? 0 : -EBUSY;
326 }
327 
328 static void serial21285_config_port(struct uart_port *port, int flags)
329 {
330         if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
331                 port->type = PORT_21285;
332 }
333 
334 /*
335  * verify the new serial_struct (for TIOCSSERIAL).
336  */
337 static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
338 {
339         int ret = 0;
340         if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
341                 ret = -EINVAL;
342         if (ser->irq != NO_IRQ)
343                 ret = -EINVAL;
344         if (ser->baud_base != port->uartclk / 16)
345                 ret = -EINVAL;
346         return ret;
347 }
348 
349 static struct uart_ops serial21285_ops = {
350         .tx_empty       = serial21285_tx_empty,
351         .get_mctrl      = serial21285_get_mctrl,
352         .set_mctrl      = serial21285_set_mctrl,
353         .stop_tx        = serial21285_stop_tx,
354         .start_tx       = serial21285_start_tx,
355         .stop_rx        = serial21285_stop_rx,
356         .enable_ms      = serial21285_enable_ms,
357         .break_ctl      = serial21285_break_ctl,
358         .startup        = serial21285_startup,
359         .shutdown       = serial21285_shutdown,
360         .set_termios    = serial21285_set_termios,
361         .type           = serial21285_type,
362         .release_port   = serial21285_release_port,
363         .request_port   = serial21285_request_port,
364         .config_port    = serial21285_config_port,
365         .verify_port    = serial21285_verify_port,
366 };
367 
368 static struct uart_port serial21285_port = {
369         .mapbase        = 0x42000160,
370         .iotype         = UPIO_MEM,
371         .irq            = NO_IRQ,
372         .fifosize       = 16,
373         .ops            = &serial21285_ops,
374         .flags          = UPF_BOOT_AUTOCONF,
375 };
376 
377 static void serial21285_setup_ports(void)
378 {
379         serial21285_port.uartclk = mem_fclk_21285 / 4;
380 }
381 
382 #ifdef CONFIG_SERIAL_21285_CONSOLE
383 static void serial21285_console_putchar(struct uart_port *port, int ch)
384 {
385         while (*CSR_UARTFLG & 0x20)
386                 barrier();
387         *CSR_UARTDR = ch;
388 }
389 
390 static void
391 serial21285_console_write(struct console *co, const char *s,
392                           unsigned int count)
393 {
394         uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
395 }
396 
397 static void __init
398 serial21285_get_options(struct uart_port *port, int *baud,
399                         int *parity, int *bits)
400 {
401         if (*CSR_UARTCON == 1) {
402                 unsigned int tmp;
403 
404                 tmp = *CSR_H_UBRLCR;
405                 switch (tmp & 0x60) {
406                 case 0x00:
407                         *bits = 5;
408                         break;
409                 case 0x20:
410                         *bits = 6;
411                         break;
412                 case 0x40:
413                         *bits = 7;
414                         break;
415                 default:
416                 case 0x60:
417                         *bits = 8;
418                         break;
419                 }
420 
421                 if (tmp & H_UBRLCR_PARENB) {
422                         *parity = 'o';
423                         if (tmp & H_UBRLCR_PAREVN)
424                                 *parity = 'e';
425                 }
426 
427                 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
428 
429                 *baud = port->uartclk / (16 * (tmp + 1));
430         }
431 }
432 
433 static int __init serial21285_console_setup(struct console *co, char *options)
434 {
435         struct uart_port *port = &serial21285_port;
436         int baud = 9600;
437         int bits = 8;
438         int parity = 'n';
439         int flow = 'n';
440 
441         if (machine_is_personal_server())
442                 baud = 57600;
443 
444         /*
445          * Check whether an invalid uart number has been specified, and
446          * if so, search for the first available port that does have
447          * console support.
448          */
449         if (options)
450                 uart_parse_options(options, &baud, &parity, &bits, &flow);
451         else
452                 serial21285_get_options(port, &baud, &parity, &bits);
453 
454         return uart_set_options(port, co, baud, parity, bits, flow);
455 }
456 
457 static struct uart_driver serial21285_reg;
458 
459 static struct console serial21285_console =
460 {
461         .name           = SERIAL_21285_NAME,
462         .write          = serial21285_console_write,
463         .device         = uart_console_device,
464         .setup          = serial21285_console_setup,
465         .flags          = CON_PRINTBUFFER,
466         .index          = -1,
467         .data           = &serial21285_reg,
468 };
469 
470 static int __init rs285_console_init(void)
471 {
472         serial21285_setup_ports();
473         register_console(&serial21285_console);
474         return 0;
475 }
476 console_initcall(rs285_console_init);
477 
478 #define SERIAL_21285_CONSOLE    &serial21285_console
479 #else
480 #define SERIAL_21285_CONSOLE    NULL
481 #endif
482 
483 static struct uart_driver serial21285_reg = {
484         .owner                  = THIS_MODULE,
485         .driver_name            = "ttyFB",
486         .dev_name               = "ttyFB",
487         .major                  = SERIAL_21285_MAJOR,
488         .minor                  = SERIAL_21285_MINOR,
489         .nr                     = 1,
490         .cons                   = SERIAL_21285_CONSOLE,
491 };
492 
493 static int __init serial21285_init(void)
494 {
495         int ret;
496 
497         printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
498 
499         serial21285_setup_ports();
500 
501         ret = uart_register_driver(&serial21285_reg);
502         if (ret == 0)
503                 uart_add_one_port(&serial21285_reg, &serial21285_port);
504 
505         return ret;
506 }
507 
508 static void __exit serial21285_exit(void)
509 {
510         uart_remove_one_port(&serial21285_reg, &serial21285_port);
511         uart_unregister_driver(&serial21285_reg);
512 }
513 
514 module_init(serial21285_init);
515 module_exit(serial21285_exit);
516 
517 MODULE_LICENSE("GPL");
518 MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
519 MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);
520 
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