1 /*
2 * linux/drivers/char/21285.c
3 *
4 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
5 *
6 * Based on drivers/char/serial.c
7 *
8 * $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
9 */
10 #include <linux/config.h>
11 #include <linux/module.h>
12 #include <linux/tty.h>
13 #include <linux/ioport.h>
14 #include <linux/init.h>
15 #include <linux/console.h>
16 #include <linux/device.h>
17 #include <linux/tty_flip.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial.h>
20
21 #include <asm/io.h>
22 #include <asm/irq.h>
23 #include <asm/mach-types.h>
24 #include <asm/hardware/dec21285.h>
25 #include <asm/hardware.h>
26
27 #define BAUD_BASE (mem_fclk_21285/64)
28
29 #define SERIAL_21285_NAME "ttyFB"
30 #define SERIAL_21285_MAJOR 204
31 #define SERIAL_21285_MINOR 4
32
33 #define RXSTAT_DUMMY_READ 0x80000000
34 #define RXSTAT_FRAME (1 << 0)
35 #define RXSTAT_PARITY (1 << 1)
36 #define RXSTAT_OVERRUN (1 << 2)
37 #define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
38
39 #define H_UBRLCR_BREAK (1 << 0)
40 #define H_UBRLCR_PARENB (1 << 1)
41 #define H_UBRLCR_PAREVN (1 << 2)
42 #define H_UBRLCR_STOPB (1 << 3)
43 #define H_UBRLCR_FIFO (1 << 4)
44
45 static const char serial21285_name[] = "Footbridge UART";
46
47 #define tx_enabled(port) ((port)->unused[0])
48 #define rx_enabled(port) ((port)->unused[1])
49
50 /*
51 * The documented expression for selecting the divisor is:
52 * BAUD_BASE / baud - 1
53 * However, typically BAUD_BASE is not divisible by baud, so
54 * we want to select the divisor that gives us the minimum
55 * error. Therefore, we want:
56 * int(BAUD_BASE / baud - 0.5) ->
57 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
58 * int((BAUD_BASE - (baud >> 1)) / baud)
59 */
60
61 static void
62 serial21285_stop_tx(struct uart_port *port, unsigned int tty_stop)
63 {
64 if (tx_enabled(port)) {
65 disable_irq(IRQ_CONTX);
66 tx_enabled(port) = 0;
67 }
68 }
69
70 static void
71 serial21285_start_tx(struct uart_port *port, unsigned int tty_start)
72 {
73 if (!tx_enabled(port)) {
74 enable_irq(IRQ_CONTX);
75 tx_enabled(port) = 1;
76 }
77 }
78
79 static void serial21285_stop_rx(struct uart_port *port)
80 {
81 if (rx_enabled(port)) {
82 disable_irq(IRQ_CONRX);
83 rx_enabled(port) = 0;
84 }
85 }
86
87 static void serial21285_enable_ms(struct uart_port *port)
88 {
89 }
90
91 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
92 {
93 struct uart_port *port = dev_id;
94 struct tty_struct *tty = port->info->tty;
95 unsigned int status, ch, flag, rxs, max_count = 256;
96
97 status = *CSR_UARTFLG;
98 while (!(status & 0x10) && max_count--) {
99 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
100 if (tty->low_latency)
101 tty_flip_buffer_push(tty);
102 /*
103 * If this failed then we will throw away the
104 * bytes but must do so to clear interrupts
105 */
106 }
107
108 ch = *CSR_UARTDR;
109 flag = TTY_NORMAL;
110 port->icount.rx++;
111
112 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
113 if (rxs & RXSTAT_ANYERR) {
114 if (rxs & RXSTAT_PARITY)
115 port->icount.parity++;
116 else if (rxs & RXSTAT_FRAME)
117 port->icount.frame++;
118 if (rxs & RXSTAT_OVERRUN)
119 port->icount.overrun++;
120
121 rxs &= port->read_status_mask;
122
123 if (rxs & RXSTAT_PARITY)
124 flag = TTY_PARITY;
125 else if (rxs & RXSTAT_FRAME)
126 flag = TTY_FRAME;
127 }
128
129 if ((rxs & port->ignore_status_mask) == 0) {
130 tty_insert_flip_char(tty, ch, flag);
131 }
132 if ((rxs & RXSTAT_OVERRUN) &&
133 tty->flip.count < TTY_FLIPBUF_SIZE) {
134 /*
135 * Overrun is special, since it's reported
136 * immediately, and doesn't affect the current
137 * character.
138 */
139 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
140 }
141 status = *CSR_UARTFLG;
142 }
143 tty_flip_buffer_push(tty);
144
145 out:
146 return IRQ_HANDLED;
147 }
148
149 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *regs)
150 {
151 struct uart_port *port = dev_id;
152 struct circ_buf *xmit = &port->info->xmit;
153 int count = 256;
154
155 if (port->x_char) {
156 *CSR_UARTDR = port->x_char;
157 port->icount.tx++;
158 port->x_char = 0;
159 goto out;
160 }
161 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
162 serial21285_stop_tx(port, 0);
163 goto out;
164 }
165
166 do {
167 *CSR_UARTDR = xmit->buf[xmit->tail];
168 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
169 port->icount.tx++;
170 if (uart_circ_empty(xmit))
171 break;
172 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
173
174 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
175 uart_write_wakeup(port);
176
177 if (uart_circ_empty(xmit))
178 serial21285_stop_tx(port, 0);
179
180 out:
181 return IRQ_HANDLED;
182 }
183
184 static unsigned int serial21285_tx_empty(struct uart_port *port)
185 {
186 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
187 }
188
189 /* no modem control lines */
190 static unsigned int serial21285_get_mctrl(struct uart_port *port)
191 {
192 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
193 }
194
195 static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
196 {
197 }
198
199 static void serial21285_break_ctl(struct uart_port *port, int break_state)
200 {
201 unsigned long flags;
202 unsigned int h_lcr;
203
204 spin_lock_irqsave(&port->lock, flags);
205 h_lcr = *CSR_H_UBRLCR;
206 if (break_state)
207 h_lcr |= H_UBRLCR_BREAK;
208 else
209 h_lcr &= ~H_UBRLCR_BREAK;
210 *CSR_H_UBRLCR = h_lcr;
211 spin_unlock_irqrestore(&port->lock, flags);
212 }
213
214 static int serial21285_startup(struct uart_port *port)
215 {
216 int ret;
217
218 tx_enabled(port) = 1;
219 rx_enabled(port) = 1;
220
221 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
222 serial21285_name, port);
223 if (ret == 0) {
224 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
225 serial21285_name, port);
226 if (ret)
227 free_irq(IRQ_CONRX, port);
228 }
229
230 return ret;
231 }
232
233 static void serial21285_shutdown(struct uart_port *port)
234 {
235 free_irq(IRQ_CONTX, port);
236 free_irq(IRQ_CONRX, port);
237 }
238
239 static void
240 serial21285_set_termios(struct uart_port *port, struct termios *termios,
241 struct termios *old)
242 {
243 unsigned long flags;
244 unsigned int baud, quot, h_lcr;
245
246 /*
247 * We don't support modem control lines.
248 */
249 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
250 termios->c_cflag |= CLOCAL;
251
252 /*
253 * We don't support BREAK character recognition.
254 */
255 termios->c_iflag &= ~(IGNBRK | BRKINT);
256
257 /*
258 * Ask the core to calculate the divisor for us.
259 */
260 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
261 quot = uart_get_divisor(port, baud);
262
263 switch (termios->c_cflag & CSIZE) {
264 case CS5:
265 h_lcr = 0x00;
266 break;
267 case CS6:
268 h_lcr = 0x20;
269 break;
270 case CS7:
271 h_lcr = 0x40;
272 break;
273 default: /* CS8 */
274 h_lcr = 0x60;
275 break;
276 }
277
278 if (termios->c_cflag & CSTOPB)
279 h_lcr |= H_UBRLCR_STOPB;
280 if (termios->c_cflag & PARENB) {
281 h_lcr |= H_UBRLCR_PARENB;
282 if (!(termios->c_cflag & PARODD))
283 h_lcr |= H_UBRLCR_PAREVN;
284 }
285
286 if (port->fifosize)
287 h_lcr |= H_UBRLCR_FIFO;
288
289 spin_lock_irqsave(&port->lock, flags);
290
291 /*
292 * Update the per-port timeout.
293 */
294 uart_update_timeout(port, termios->c_cflag, baud);
295
296 /*
297 * Which character status flags are we interested in?
298 */
299 port->read_status_mask = RXSTAT_OVERRUN;
300 if (termios->c_iflag & INPCK)
301 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
302
303 /*
304 * Which character status flags should we ignore?
305 */
306 port->ignore_status_mask = 0;
307 if (termios->c_iflag & IGNPAR)
308 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
309 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
310 port->ignore_status_mask |= RXSTAT_OVERRUN;
311
312 /*
313 * Ignore all characters if CREAD is not set.
314 */
315 if ((termios->c_cflag & CREAD) == 0)
316 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
317
318 quot -= 1;
319
320 *CSR_UARTCON = 0;
321 *CSR_L_UBRLCR = quot & 0xff;
322 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
323 *CSR_H_UBRLCR = h_lcr;
324 *CSR_UARTCON = 1;
325
326 spin_unlock_irqrestore(&port->lock, flags);
327 }
328
329 static const char *serial21285_type(struct uart_port *port)
330 {
331 return port->type == PORT_21285 ? "DC21285" : NULL;
332 }
333
334 static void serial21285_release_port(struct uart_port *port)
335 {
336 release_mem_region(port->mapbase, 32);
337 }
338
339 static int serial21285_request_port(struct uart_port *port)
340 {
341 return request_mem_region(port->mapbase, 32, serial21285_name)
342 != NULL ? 0 : -EBUSY;
343 }
344
345 static void serial21285_config_port(struct uart_port *port, int flags)
346 {
347 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
348 port->type = PORT_21285;
349 }
350
351 /*
352 * verify the new serial_struct (for TIOCSSERIAL).
353 */
354 static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
355 {
356 int ret = 0;
357 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
358 ret = -EINVAL;
359 if (ser->irq != NO_IRQ)
360 ret = -EINVAL;
361 if (ser->baud_base != port->uartclk / 16)
362 ret = -EINVAL;
363 return ret;
364 }
365
366 static struct uart_ops serial21285_ops = {
367 .tx_empty = serial21285_tx_empty,
368 .get_mctrl = serial21285_get_mctrl,
369 .set_mctrl = serial21285_set_mctrl,
370 .stop_tx = serial21285_stop_tx,
371 .start_tx = serial21285_start_tx,
372 .stop_rx = serial21285_stop_rx,
373 .enable_ms = serial21285_enable_ms,
374 .break_ctl = serial21285_break_ctl,
375 .startup = serial21285_startup,
376 .shutdown = serial21285_shutdown,
377 .set_termios = serial21285_set_termios,
378 .type = serial21285_type,
379 .release_port = serial21285_release_port,
380 .request_port = serial21285_request_port,
381 .config_port = serial21285_config_port,
382 .verify_port = serial21285_verify_port,
383 };
384
385 static struct uart_port serial21285_port = {
386 .membase = 0,
387 .mapbase = 0x42000160,
388 .iotype = SERIAL_IO_MEM,
389 .irq = NO_IRQ,
390 .uartclk = 0,
391 .fifosize = 16,
392 .ops = &serial21285_ops,
393 .flags = ASYNC_BOOT_AUTOCONF,
394 };
395
396 static void serial21285_setup_ports(void)
397 {
398 serial21285_port.uartclk = mem_fclk_21285 / 4;
399 }
400
401 #ifdef CONFIG_SERIAL_21285_CONSOLE
402
403 static void
404 serial21285_console_write(struct console *co, const char *s,
405 unsigned int count)
406 {
407 int i;
408
409 for (i = 0; i < count; i++) {
410 while (*CSR_UARTFLG & 0x20)
411 barrier();
412 *CSR_UARTDR = s[i];
413 if (s[i] == '\n') {
414 while (*CSR_UARTFLG & 0x20)
415 barrier();
416 *CSR_UARTDR = '\r';
417 }
418 }
419 }
420
421 static void __init
422 serial21285_get_options(struct uart_port *port, int *baud,
423 int *parity, int *bits)
424 {
425 if (*CSR_UARTCON == 1) {
426 unsigned int tmp;
427
428 tmp = *CSR_H_UBRLCR;
429 switch (tmp & 0x60) {
430 case 0x00:
431 *bits = 5;
432 break;
433 case 0x20:
434 *bits = 6;
435 break;
436 case 0x40:
437 *bits = 7;
438 break;
439 default:
440 case 0x60:
441 *bits = 8;
442 break;
443 }
444
445 if (tmp & H_UBRLCR_PARENB) {
446 *parity = 'o';
447 if (tmp & H_UBRLCR_PAREVN)
448 *parity = 'e';
449 }
450
451 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
452
453 *baud = port->uartclk / (16 * (tmp + 1));
454 }
455 }
456
457 static int __init serial21285_console_setup(struct console *co, char *options)
458 {
459 struct uart_port *port = &serial21285_port;
460 int baud = 9600;
461 int bits = 8;
462 int parity = 'n';
463 int flow = 'n';
464
465 if (machine_is_personal_server())
466 baud = 57600;
467
468 /*
469 * Check whether an invalid uart number has been specified, and
470 * if so, search for the first available port that does have
471 * console support.
472 */
473 if (options)
474 uart_parse_options(options, &baud, &parity, &bits, &flow);
475 else
476 serial21285_get_options(port, &baud, &parity, &bits);
477
478 return uart_set_options(port, co, baud, parity, bits, flow);
479 }
480
481 extern struct uart_driver serial21285_reg;
482
483 static struct console serial21285_console =
484 {
485 .name = SERIAL_21285_NAME,
486 .write = serial21285_console_write,
487 .device = uart_console_device,
488 .setup = serial21285_console_setup,
489 .flags = CON_PRINTBUFFER,
490 .index = -1,
491 .data = &serial21285_reg,
492 };
493
494 static int __init rs285_console_init(void)
495 {
496 serial21285_setup_ports();
497 register_console(&serial21285_console);
498 return 0;
499 }
500 console_initcall(rs285_console_init);
501
502 #define SERIAL_21285_CONSOLE &serial21285_console
503 #else
504 #define SERIAL_21285_CONSOLE NULL
505 #endif
506
507 static struct uart_driver serial21285_reg = {
508 .owner = THIS_MODULE,
509 .driver_name = "ttyFB",
510 .dev_name = "ttyFB",
511 .devfs_name = "ttyFB",
512 .major = SERIAL_21285_MAJOR,
513 .minor = SERIAL_21285_MINOR,
514 .nr = 1,
515 .cons = SERIAL_21285_CONSOLE,
516 };
517
518 static int __init serial21285_init(void)
519 {
520 int ret;
521
522 printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
523
524 serial21285_setup_ports();
525
526 ret = uart_register_driver(&serial21285_reg);
527 if (ret == 0)
528 uart_add_one_port(&serial21285_reg, &serial21285_port);
529
530 return ret;
531 }
532
533 static void __exit serial21285_exit(void)
534 {
535 uart_remove_one_port(&serial21285_reg, &serial21285_port);
536 uart_unregister_driver(&serial21285_reg);
537 }
538
539 module_init(serial21285_init);
540 module_exit(serial21285_exit);
541
542 MODULE_LICENSE("GPL");
543 MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
544 MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);
545
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