1 /*
2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
4 *
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 *
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
9 *
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
12 *
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
17 *
18 * Other major contributions:
19 *
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
22 *
23 *-----------------------------------------------------------------------------
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38 */
39
40 #ifndef SYM_GLUE_H
41 #define SYM_GLUE_H
42
43 #include <linux/config.h>
44 #include <linux/delay.h>
45 #include <linux/ioport.h>
46 #include <linux/pci.h>
47 #include <linux/string.h>
48 #include <linux/timer.h>
49 #include <linux/types.h>
50
51 #include <asm/io.h>
52 #ifdef __sparc__
53 # include <asm/irq.h>
54 #endif
55
56 #include <scsi/scsi.h>
57 #include <scsi/scsi_cmnd.h>
58 #include <scsi/scsi_device.h>
59 #include <scsi/scsi_host.h>
60
61 #include "sym_conf.h"
62 #include "sym_defs.h"
63 #include "sym_misc.h"
64
65 /*
66 * Configuration addendum for Linux.
67 */
68 #define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2)
69
70 #define SYM_OPT_HANDLE_DIR_UNKNOWN
71 #define SYM_OPT_HANDLE_DEVICE_QUEUEING
72 #define SYM_OPT_LIMIT_COMMAND_REORDERING
73 #define SYM_OPT_ANNOUNCE_TRANSFER_RATE
74
75 /*
76 * Print a message with severity.
77 */
78 #define printf_emerg(args...) printk(KERN_EMERG args)
79 #define printf_alert(args...) printk(KERN_ALERT args)
80 #define printf_crit(args...) printk(KERN_CRIT args)
81 #define printf_err(args...) printk(KERN_ERR args)
82 #define printf_warning(args...) printk(KERN_WARNING args)
83 #define printf_notice(args...) printk(KERN_NOTICE args)
84 #define printf_info(args...) printk(KERN_INFO args)
85 #define printf_debug(args...) printk(KERN_DEBUG args)
86 #define printf(args...) printk(args)
87
88 /*
89 * Insert a delay in micro-seconds
90 */
91 #define sym_udelay(us) udelay(us)
92
93 /*
94 * A 'read barrier' flushes any data that have been prefetched
95 * by the processor due to out of order execution. Such a barrier
96 * must notably be inserted prior to looking at data that have
97 * been DMAed, assuming that program does memory READs in proper
98 * order and that the device ensured proper ordering of WRITEs.
99 *
100 * A 'write barrier' prevents any previous WRITEs to pass further
101 * WRITEs. Such barriers must be inserted each time another agent
102 * relies on ordering of WRITEs.
103 *
104 * Note that, due to posting of PCI memory writes, we also must
105 * insert dummy PCI read transactions when some ordering involving
106 * both directions over the PCI does matter. PCI transactions are
107 * fully ordered in each direction.
108 */
109
110 #define MEMORY_READ_BARRIER() rmb()
111 #define MEMORY_WRITE_BARRIER() wmb()
112
113 /*
114 * Let the compiler know about driver data structure names.
115 */
116 typedef struct sym_tcb *tcb_p;
117 typedef struct sym_lcb *lcb_p;
118 typedef struct sym_ccb *ccb_p;
119
120 /*
121 * IO functions definition for big/little endian CPU support.
122 * For now, PCI chips are only supported in little endian addressing mode,
123 */
124
125 #ifdef __BIG_ENDIAN
126
127 #define inw_l2b inw
128 #define inl_l2b inl
129 #define outw_b2l outw
130 #define outl_b2l outl
131 #define readw_l2b readw
132 #define readl_l2b readl
133 #define writew_b2l writew
134 #define writel_b2l writel
135
136 #else /* little endian */
137
138 #define inw_raw inw
139 #define inl_raw inl
140 #define outw_raw outw
141 #define outl_raw outl
142
143 #define readw_raw readw
144 #define readl_raw readl
145 #define writew_raw writew
146 #define writel_raw writel
147
148 #endif /* endian */
149
150 #ifdef SYM_CONF_CHIP_BIG_ENDIAN
151 #error "Chips in BIG ENDIAN addressing mode are not (yet) supported"
152 #endif
153
154
155 /*
156 * If the chip uses big endian addressing mode over the
157 * PCI, actual io register addresses for byte and word
158 * accesses must be changed according to lane routing.
159 * Btw, sym_offb() and sym_offw() macros only apply to
160 * constants and so donnot generate bloated code.
161 */
162
163 #if defined(SYM_CONF_CHIP_BIG_ENDIAN)
164
165 #define sym_offb(o) (((o)&~3)+((~((o)&3))&3))
166 #define sym_offw(o) (((o)&~3)+((~((o)&3))&2))
167
168 #else
169
170 #define sym_offb(o) (o)
171 #define sym_offw(o) (o)
172
173 #endif
174
175 /*
176 * If the CPU and the chip use same endian-ness addressing,
177 * no byte reordering is needed for script patching.
178 * Macro cpu_to_scr() is to be used for script patching.
179 * Macro scr_to_cpu() is to be used for getting a DWORD
180 * from the script.
181 */
182
183 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
184
185 #define cpu_to_scr(dw) cpu_to_le32(dw)
186 #define scr_to_cpu(dw) le32_to_cpu(dw)
187
188 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
189
190 #define cpu_to_scr(dw) cpu_to_be32(dw)
191 #define scr_to_cpu(dw) be32_to_cpu(dw)
192
193 #else
194
195 #define cpu_to_scr(dw) (dw)
196 #define scr_to_cpu(dw) (dw)
197
198 #endif
199
200 /*
201 * Access to the controller chip.
202 *
203 * If SYM_CONF_IOMAPPED is defined, the driver will use
204 * normal IOs instead of the MEMORY MAPPED IO method
205 * recommended by PCI specifications.
206 * If all PCI bridges, host brigdes and architectures
207 * would have been correctly designed for PCI, this
208 * option would be useless.
209 *
210 * If the CPU and the chip use same endian-ness addressing,
211 * no byte reordering is needed for accessing chip io
212 * registers. Functions suffixed by '_raw' are assumed
213 * to access the chip over the PCI without doing byte
214 * reordering. Functions suffixed by '_l2b' are
215 * assumed to perform little-endian to big-endian byte
216 * reordering, those suffixed by '_b2l' blah, blah,
217 * blah, ...
218 */
219
220 #if defined(SYM_CONF_IOMAPPED)
221
222 /*
223 * IO mapped only input / ouput
224 */
225
226 #define INB_OFF(o) inb (np->s.io_port + sym_offb(o))
227 #define OUTB_OFF(o, val) outb ((val), np->s.io_port + sym_offb(o))
228
229 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
230
231 #define INW_OFF(o) inw_l2b (np->s.io_port + sym_offw(o))
232 #define INL_OFF(o) inl_l2b (np->s.io_port + (o))
233
234 #define OUTW_OFF(o, val) outw_b2l ((val), np->s.io_port + sym_offw(o))
235 #define OUTL_OFF(o, val) outl_b2l ((val), np->s.io_port + (o))
236
237 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
238
239 #define INW_OFF(o) inw_b2l (np->s.io_port + sym_offw(o))
240 #define INL_OFF(o) inl_b2l (np->s.io_port + (o))
241
242 #define OUTW_OFF(o, val) outw_l2b ((val), np->s.io_port + sym_offw(o))
243 #define OUTL_OFF(o, val) outl_l2b ((val), np->s.io_port + (o))
244
245 #else
246
247 #define INW_OFF(o) inw_raw (np->s.io_port + sym_offw(o))
248 #define INL_OFF(o) inl_raw (np->s.io_port + (o))
249
250 #define OUTW_OFF(o, val) outw_raw ((val), np->s.io_port + sym_offw(o))
251 #define OUTL_OFF(o, val) outl_raw ((val), np->s.io_port + (o))
252
253 #endif /* ENDIANs */
254
255 #else /* defined SYM_CONF_IOMAPPED */
256
257 /*
258 * MEMORY mapped IO input / output
259 */
260
261 #define INB_OFF(o) readb(np->s.mmio_va + sym_offb(o))
262 #define OUTB_OFF(o, val) writeb((val), np->s.mmio_va + sym_offb(o))
263
264 #if defined(__BIG_ENDIAN) && !defined(SYM_CONF_CHIP_BIG_ENDIAN)
265
266 #define INW_OFF(o) readw_l2b(np->s.mmio_va + sym_offw(o))
267 #define INL_OFF(o) readl_l2b(np->s.mmio_va + (o))
268
269 #define OUTW_OFF(o, val) writew_b2l((val), np->s.mmio_va + sym_offw(o))
270 #define OUTL_OFF(o, val) writel_b2l((val), np->s.mmio_va + (o))
271
272 #elif defined(__LITTLE_ENDIAN) && defined(SYM_CONF_CHIP_BIG_ENDIAN)
273
274 #define INW_OFF(o) readw_b2l(np->s.mmio_va + sym_offw(o))
275 #define INL_OFF(o) readl_b2l(np->s.mmio_va + (o))
276
277 #define OUTW_OFF(o, val) writew_l2b((val), np->s.mmio_va + sym_offw(o))
278 #define OUTL_OFF(o, val) writel_l2b((val), np->s.mmio_va + (o))
279
280 #else
281
282 #define INW_OFF(o) readw_raw(np->s.mmio_va + sym_offw(o))
283 #define INL_OFF(o) readl_raw(np->s.mmio_va + (o))
284
285 #define OUTW_OFF(o, val) writew_raw((val), np->s.mmio_va + sym_offw(o))
286 #define OUTL_OFF(o, val) writel_raw((val), np->s.mmio_va + (o))
287
288 #endif
289
290 #endif /* defined SYM_CONF_IOMAPPED */
291
292 #define OUTRAM_OFF(o, a, l) memcpy_toio(np->s.ram_va + (o), (a), (l))
293
294 /*
295 * Remap some status field values.
296 */
297 #define CAM_REQ_CMP DID_OK
298 #define CAM_SEL_TIMEOUT DID_NO_CONNECT
299 #define CAM_CMD_TIMEOUT DID_TIME_OUT
300 #define CAM_REQ_ABORTED DID_ABORT
301 #define CAM_UNCOR_PARITY DID_PARITY
302 #define CAM_SCSI_BUS_RESET DID_RESET
303 #define CAM_REQUEUE_REQ DID_SOFT_ERROR
304 #define CAM_UNEXP_BUSFREE DID_ERROR
305 #define CAM_SCSI_BUSY DID_BUS_BUSY
306
307 #define CAM_DEV_NOT_THERE DID_NO_CONNECT
308 #define CAM_REQ_INVALID DID_ERROR
309 #define CAM_REQ_TOO_BIG DID_ERROR
310
311 #define CAM_RESRC_UNAVAIL DID_ERROR
312
313 /*
314 * Remap data direction values.
315 */
316 #define CAM_DIR_NONE DMA_NONE
317 #define CAM_DIR_IN DMA_FROM_DEVICE
318 #define CAM_DIR_OUT DMA_TO_DEVICE
319 #define CAM_DIR_UNKNOWN DMA_BIDIRECTIONAL
320
321 /*
322 * These ones are used as return code from
323 * error recovery handlers under Linux.
324 */
325 #define SCSI_SUCCESS SUCCESS
326 #define SCSI_FAILED FAILED
327
328 /*
329 * System specific target data structure.
330 * None for now, under Linux.
331 */
332 /* #define SYM_HAVE_STCB */
333
334 /*
335 * System specific lun data structure.
336 */
337 #define SYM_HAVE_SLCB
338 struct sym_slcb {
339 u_short reqtags; /* Number of tags requested by user */
340 u_short scdev_depth; /* Queue depth set in select_queue_depth() */
341 };
342
343 /*
344 * System specific command data structure.
345 * Not needed under Linux.
346 */
347 /* struct sym_sccb */
348
349 /*
350 * System specific host data structure.
351 */
352 struct sym_shcb {
353 /*
354 * Chip and controller indentification.
355 */
356 int unit;
357 char inst_name[16];
358 char chip_name[8];
359 struct pci_dev *device;
360
361 struct Scsi_Host *host;
362
363 void __iomem * mmio_va; /* MMIO kernel virtual address */
364 void __iomem * ram_va; /* RAM kernel virtual address */
365 u_long io_port; /* IO port address cookie */
366 u_short io_ws; /* IO window size */
367 int irq; /* IRQ number */
368
369 struct timer_list timer; /* Timer handler link header */
370 u_long lasttime;
371 u_long settle_time; /* Resetting the SCSI BUS */
372 u_char settle_time_valid;
373 };
374
375 /*
376 * Return the name of the controller.
377 */
378 #define sym_name(np) (np)->s.inst_name
379
380 /*
381 * Data structure used as input for the NVRAM reading.
382 * Must resolve the IO macros and sym_name(), when
383 * used as sub-field 's' of another structure.
384 */
385 struct sym_slot {
386 u_long base;
387 u_long base_2;
388 u_long base_c;
389 u_long base_2_c;
390 int irq;
391 /* port and address fields to fit INB, OUTB macros */
392 u_long io_port;
393 void __iomem * mmio_va;
394 char inst_name[16];
395 };
396
397 struct sym_nvram;
398
399 struct sym_device {
400 struct pci_dev *pdev;
401 struct sym_slot s;
402 struct sym_pci_chip chip;
403 struct sym_nvram *nvram;
404 u_short device_id;
405 u_char host_id;
406 };
407
408 /*
409 * Driver host data structure.
410 */
411 struct host_data {
412 struct sym_hcb *ncb;
413 };
414
415 /*
416 * The driver definitions (sym_hipd.h) must know about a
417 * couple of things related to the memory allocator.
418 */
419 typedef u_long m_addr_t; /* Enough bits to represent any address */
420 #define SYM_MEM_PAGE_ORDER 0 /* 1 PAGE maximum */
421 #define SYM_MEM_CLUSTER_SHIFT (PAGE_SHIFT+SYM_MEM_PAGE_ORDER)
422 #ifdef MODULE
423 #define SYM_MEM_FREE_UNUSED /* Free unused pages immediately */
424 #endif
425 typedef struct pci_dev *m_pool_ident_t;
426
427 /*
428 * Include driver soft definitions.
429 */
430 #include "sym_fw.h"
431 #include "sym_hipd.h"
432
433 /*
434 * Memory allocator related stuff.
435 */
436
437 #define SYM_MEM_GFP_FLAGS GFP_ATOMIC
438 #define SYM_MEM_WARN 1 /* Warn on failed operations */
439
440 #define sym_get_mem_cluster() \
441 __get_free_pages(SYM_MEM_GFP_FLAGS, SYM_MEM_PAGE_ORDER)
442 #define sym_free_mem_cluster(p) \
443 free_pages(p, SYM_MEM_PAGE_ORDER)
444
445 void *sym_calloc(int size, char *name);
446 void sym_mfree(void *m, int size, char *name);
447
448 /*
449 * We have to provide the driver memory allocator with methods for
450 * it to maintain virtual to bus physical address translations.
451 */
452
453 #define sym_m_pool_match(mp_id1, mp_id2) (mp_id1 == mp_id2)
454
455 static __inline m_addr_t sym_m_get_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
456 {
457 void *vaddr = NULL;
458 dma_addr_t baddr = 0;
459
460 vaddr = pci_alloc_consistent(mp->dev_dmat,SYM_MEM_CLUSTER_SIZE, &baddr);
461 if (vaddr) {
462 vbp->vaddr = (m_addr_t) vaddr;
463 vbp->baddr = (m_addr_t) baddr;
464 }
465 return (m_addr_t) vaddr;
466 }
467
468 static __inline void sym_m_free_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
469 {
470 pci_free_consistent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE,
471 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr);
472 }
473
474 #define sym_m_create_dma_mem_tag(mp) (0)
475 #define sym_m_delete_dma_mem_tag(mp) do { ; } while (0)
476
477 void *__sym_calloc_dma(m_pool_ident_t dev_dmat, int size, char *name);
478 void __sym_mfree_dma(m_pool_ident_t dev_dmat, void *m, int size, char *name);
479 m_addr_t __vtobus(m_pool_ident_t dev_dmat, void *m);
480
481 /*
482 * Set the status field of a CAM CCB.
483 */
484 static __inline void
485 sym_set_cam_status(struct scsi_cmnd *ccb, int status)
486 {
487 ccb->result &= ~(0xff << 16);
488 ccb->result |= (status << 16);
489 }
490
491 /*
492 * Get the status field of a CAM CCB.
493 */
494 static __inline int
495 sym_get_cam_status(struct scsi_cmnd *ccb)
496 {
497 return ((ccb->result >> 16) & 0xff);
498 }
499
500 /*
501 * The dma mapping is mostly handled by the
502 * SCSI layer and the driver glue under Linux.
503 */
504 #define sym_data_dmamap_create(np, cp) (0)
505 #define sym_data_dmamap_destroy(np, cp) do { ; } while (0)
506 #define sym_data_dmamap_unload(np, cp) do { ; } while (0)
507 #define sym_data_dmamap_presync(np, cp) do { ; } while (0)
508 #define sym_data_dmamap_postsync(np, cp) do { ; } while (0)
509
510 /*
511 * Async handler for negotiations.
512 */
513 void sym_xpt_async_nego_wide(struct sym_hcb *np, int target);
514 #define sym_xpt_async_nego_sync(np, target) \
515 sym_announce_transfer_rate(np, target)
516 #define sym_xpt_async_nego_ppr(np, target) \
517 sym_announce_transfer_rate(np, target)
518
519 /*
520 * Build CAM result for a successful IO and for a failed IO.
521 */
522 static __inline void sym_set_cam_result_ok(struct sym_hcb *np, ccb_p cp, int resid)
523 {
524 struct scsi_cmnd *cmd = cp->cam_ccb;
525
526 cmd->resid = resid;
527 cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f));
528 }
529 void sym_set_cam_result_error(struct sym_hcb *np, ccb_p cp, int resid);
530
531 /*
532 * Other O/S specific methods.
533 */
534 #define sym_cam_target_id(ccb) (ccb)->target
535 #define sym_cam_target_lun(ccb) (ccb)->lun
536 #define sym_freeze_cam_ccb(ccb) do { ; } while (0)
537 void sym_xpt_done(struct sym_hcb *np, struct scsi_cmnd *ccb);
538 void sym_print_addr (ccb_p cp);
539 void sym_xpt_async_bus_reset(struct sym_hcb *np);
540 void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target);
541 int sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, ccb_p cp);
542 void sym_log_bus_error(struct sym_hcb *np);
543 void sym_sniff_inquiry(struct sym_hcb *np, struct scsi_cmnd *cmd, int resid);
544
545 #endif /* SYM_GLUE_H */
546
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