1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2008 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60
61 #include "mpt2sas_base.h"
62
63 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
64
65 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
66 #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
67
68 static int max_queue_depth = -1;
69 module_param(max_queue_depth, int, 0);
70 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
71
72 static int max_sgl_entries = -1;
73 module_param(max_sgl_entries, int, 0);
74 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
75
76 static int msix_disable = -1;
77 module_param(msix_disable, int, 0);
78 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
79
80 /**
81 * _base_fault_reset_work - workq handling ioc fault conditions
82 * @work: input argument, used to derive ioc
83 * Context: sleep.
84 *
85 * Return nothing.
86 */
87 static void
88 _base_fault_reset_work(struct work_struct *work)
89 {
90 struct MPT2SAS_ADAPTER *ioc =
91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
92 unsigned long flags;
93 u32 doorbell;
94 int rc;
95
96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
97 if (ioc->shost_recovery)
98 goto rearm_timer;
99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
100
101 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
104 FORCE_BIG_HAMMER);
105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
106 __func__, (rc == 0) ? "success" : "failed");
107 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
109 mpt2sas_base_fault_info(ioc, doorbell &
110 MPI2_DOORBELL_DATA_MASK);
111 }
112
113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
114 rearm_timer:
115 if (ioc->fault_reset_work_q)
116 queue_delayed_work(ioc->fault_reset_work_q,
117 &ioc->fault_reset_work,
118 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
120 }
121
122 /**
123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
124 * @ioc: pointer to scsi command object
125 * Context: sleep.
126 *
127 * Return nothing.
128 */
129 void
130 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
131 {
132 unsigned long flags;
133
134 if (ioc->fault_reset_work_q)
135 return;
136
137 /* initialize fault polling */
138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
139 snprintf(ioc->fault_reset_work_q_name,
140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
141 ioc->fault_reset_work_q =
142 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
143 if (!ioc->fault_reset_work_q) {
144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
145 ioc->name, __func__, __LINE__);
146 return;
147 }
148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
149 if (ioc->fault_reset_work_q)
150 queue_delayed_work(ioc->fault_reset_work_q,
151 &ioc->fault_reset_work,
152 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
154 }
155
156 /**
157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
158 * @ioc: pointer to scsi command object
159 * Context: sleep.
160 *
161 * Return nothing.
162 */
163 void
164 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
165 {
166 unsigned long flags;
167 struct workqueue_struct *wq;
168
169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
170 wq = ioc->fault_reset_work_q;
171 ioc->fault_reset_work_q = NULL;
172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
173 if (wq) {
174 if (!cancel_delayed_work(&ioc->fault_reset_work))
175 flush_workqueue(wq);
176 destroy_workqueue(wq);
177 }
178 }
179
180 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
181 /**
182 * _base_sas_ioc_info - verbose translation of the ioc status
183 * @ioc: pointer to scsi command object
184 * @mpi_reply: reply mf payload returned from firmware
185 * @request_hdr: request mf
186 *
187 * Return nothing.
188 */
189 static void
190 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
191 MPI2RequestHeader_t *request_hdr)
192 {
193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
194 MPI2_IOCSTATUS_MASK;
195 char *desc = NULL;
196 u16 frame_sz;
197 char *func_str = NULL;
198
199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
203 return;
204
205 switch (ioc_status) {
206
207 /****************************************************************************
208 * Common IOCStatus values for all replies
209 ****************************************************************************/
210
211 case MPI2_IOCSTATUS_INVALID_FUNCTION:
212 desc = "invalid function";
213 break;
214 case MPI2_IOCSTATUS_BUSY:
215 desc = "busy";
216 break;
217 case MPI2_IOCSTATUS_INVALID_SGL:
218 desc = "invalid sgl";
219 break;
220 case MPI2_IOCSTATUS_INTERNAL_ERROR:
221 desc = "internal error";
222 break;
223 case MPI2_IOCSTATUS_INVALID_VPID:
224 desc = "invalid vpid";
225 break;
226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
227 desc = "insufficient resources";
228 break;
229 case MPI2_IOCSTATUS_INVALID_FIELD:
230 desc = "invalid field";
231 break;
232 case MPI2_IOCSTATUS_INVALID_STATE:
233 desc = "invalid state";
234 break;
235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
236 desc = "op state not supported";
237 break;
238
239 /****************************************************************************
240 * Config IOCStatus values
241 ****************************************************************************/
242
243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
244 desc = "config invalid action";
245 break;
246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
247 desc = "config invalid type";
248 break;
249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
250 desc = "config invalid page";
251 break;
252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
253 desc = "config invalid data";
254 break;
255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
256 desc = "config no defaults";
257 break;
258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
259 desc = "config cant commit";
260 break;
261
262 /****************************************************************************
263 * SCSI IO Reply
264 ****************************************************************************/
265
266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
278 break;
279
280 /****************************************************************************
281 * For use by SCSI Initiator and SCSI Target end-to-end data protection
282 ****************************************************************************/
283
284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
285 desc = "eedp guard error";
286 break;
287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
288 desc = "eedp ref tag error";
289 break;
290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
291 desc = "eedp app tag error";
292 break;
293
294 /****************************************************************************
295 * SCSI Target values
296 ****************************************************************************/
297
298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
299 desc = "target invalid io index";
300 break;
301 case MPI2_IOCSTATUS_TARGET_ABORTED:
302 desc = "target aborted";
303 break;
304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
305 desc = "target no conn retryable";
306 break;
307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
308 desc = "target no connection";
309 break;
310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
311 desc = "target xfer count mismatch";
312 break;
313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
314 desc = "target data offset error";
315 break;
316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
317 desc = "target too much write data";
318 break;
319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
320 desc = "target iu too short";
321 break;
322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
323 desc = "target ack nak timeout";
324 break;
325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
326 desc = "target nak received";
327 break;
328
329 /****************************************************************************
330 * Serial Attached SCSI values
331 ****************************************************************************/
332
333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
334 desc = "smp request failed";
335 break;
336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
337 desc = "smp data overrun";
338 break;
339
340 /****************************************************************************
341 * Diagnostic Buffer Post / Diagnostic Release values
342 ****************************************************************************/
343
344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
345 desc = "diagnostic released";
346 break;
347 default:
348 break;
349 }
350
351 if (!desc)
352 return;
353
354 switch (request_hdr->Function) {
355 case MPI2_FUNCTION_CONFIG:
356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
357 func_str = "config_page";
358 break;
359 case MPI2_FUNCTION_SCSI_TASK_MGMT:
360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
361 func_str = "task_mgmt";
362 break;
363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
365 func_str = "sas_iounit_ctl";
366 break;
367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
368 frame_sz = sizeof(Mpi2SepRequest_t);
369 func_str = "enclosure";
370 break;
371 case MPI2_FUNCTION_IOC_INIT:
372 frame_sz = sizeof(Mpi2IOCInitRequest_t);
373 func_str = "ioc_init";
374 break;
375 case MPI2_FUNCTION_PORT_ENABLE:
376 frame_sz = sizeof(Mpi2PortEnableRequest_t);
377 func_str = "port_enable";
378 break;
379 case MPI2_FUNCTION_SMP_PASSTHROUGH:
380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
381 func_str = "smp_passthru";
382 break;
383 default:
384 frame_sz = 32;
385 func_str = "unknown";
386 break;
387 }
388
389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
391
392 _debug_dump_mf(request_hdr, frame_sz/4);
393 }
394
395 /**
396 * _base_display_event_data - verbose translation of firmware asyn events
397 * @ioc: pointer to scsi command object
398 * @mpi_reply: reply mf payload returned from firmware
399 *
400 * Return nothing.
401 */
402 static void
403 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
404 Mpi2EventNotificationReply_t *mpi_reply)
405 {
406 char *desc = NULL;
407 u16 event;
408
409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
410 return;
411
412 event = le16_to_cpu(mpi_reply->Event);
413
414 switch (event) {
415 case MPI2_EVENT_LOG_DATA:
416 desc = "Log Data";
417 break;
418 case MPI2_EVENT_STATE_CHANGE:
419 desc = "Status Change";
420 break;
421 case MPI2_EVENT_HARD_RESET_RECEIVED:
422 desc = "Hard Reset Received";
423 break;
424 case MPI2_EVENT_EVENT_CHANGE:
425 desc = "Event Change";
426 break;
427 case MPI2_EVENT_TASK_SET_FULL:
428 desc = "Task Set Full";
429 break;
430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
431 desc = "Device Status Change";
432 break;
433 case MPI2_EVENT_IR_OPERATION_STATUS:
434 desc = "IR Operation Status";
435 break;
436 case MPI2_EVENT_SAS_DISCOVERY:
437 desc = "Discovery";
438 break;
439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
440 desc = "SAS Broadcast Primitive";
441 break;
442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
443 desc = "SAS Init Device Status Change";
444 break;
445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
446 desc = "SAS Init Table Overflow";
447 break;
448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
449 desc = "SAS Topology Change List";
450 break;
451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
452 desc = "SAS Enclosure Device Status Change";
453 break;
454 case MPI2_EVENT_IR_VOLUME:
455 desc = "IR Volume";
456 break;
457 case MPI2_EVENT_IR_PHYSICAL_DISK:
458 desc = "IR Physical Disk";
459 break;
460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
461 desc = "IR Configuration Change List";
462 break;
463 case MPI2_EVENT_LOG_ENTRY_ADDED:
464 desc = "Log Entry Added";
465 break;
466 }
467
468 if (!desc)
469 return;
470
471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
472 }
473 #endif
474
475 /**
476 * _base_sas_log_info - verbose translation of firmware log info
477 * @ioc: pointer to scsi command object
478 * @log_info: log info
479 *
480 * Return nothing.
481 */
482 static void
483 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
484 {
485 union loginfo_type {
486 u32 loginfo;
487 struct {
488 u32 subcode:16;
489 u32 code:8;
490 u32 originator:4;
491 u32 bus_type:4;
492 } dw;
493 };
494 union loginfo_type sas_loginfo;
495 char *originator_str = NULL;
496
497 sas_loginfo.loginfo = log_info;
498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
499 return;
500
501 /* each nexus loss loginfo */
502 if (log_info == 0x31170000)
503 return;
504
505 /* eat the loginfos associated with task aborts */
506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
507 0x31140000 || log_info == 0x31130000))
508 return;
509
510 switch (sas_loginfo.dw.originator) {
511 case 0:
512 originator_str = "IOP";
513 break;
514 case 1:
515 originator_str = "PL";
516 break;
517 case 2:
518 originator_str = "IR";
519 break;
520 }
521
522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
524 originator_str, sas_loginfo.dw.code,
525 sas_loginfo.dw.subcode);
526 }
527
528 /**
529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
530 * @ioc: pointer to scsi command object
531 * @fault_code: fault code
532 *
533 * Return nothing.
534 */
535 void
536 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
537 {
538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
539 ioc->name, fault_code);
540 }
541
542 /**
543 * _base_display_reply_info -
544 * @ioc: pointer to scsi command object
545 * @smid: system request message index
546 * @VF_ID: virtual function id
547 * @reply: reply message frame(lower 32bit addr)
548 *
549 * Return nothing.
550 */
551 static void
552 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
553 u32 reply)
554 {
555 MPI2DefaultReply_t *mpi_reply;
556 u16 ioc_status;
557
558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
560 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
561 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
562 (ioc->logging_level & MPT_DEBUG_REPLY)) {
563 _base_sas_ioc_info(ioc , mpi_reply,
564 mpt2sas_base_get_msg_frame(ioc, smid));
565 }
566 #endif
567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
569 }
570
571 /**
572 * mpt2sas_base_done - base internal command completion routine
573 * @ioc: pointer to scsi command object
574 * @smid: system request message index
575 * @VF_ID: virtual function id
576 * @reply: reply message frame(lower 32bit addr)
577 *
578 * Return nothing.
579 */
580 void
581 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
582 {
583 MPI2DefaultReply_t *mpi_reply;
584
585 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
586 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
587 return;
588
589 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
590 return;
591
592 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
593 if (mpi_reply) {
594 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
595 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
596 }
597 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
598 complete(&ioc->base_cmds.done);
599 }
600
601 /**
602 * _base_async_event - main callback handler for firmware asyn events
603 * @ioc: pointer to scsi command object
604 * @VF_ID: virtual function id
605 * @reply: reply message frame(lower 32bit addr)
606 *
607 * Return nothing.
608 */
609 static void
610 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
611 {
612 Mpi2EventNotificationReply_t *mpi_reply;
613 Mpi2EventAckRequest_t *ack_request;
614 u16 smid;
615
616 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
617 if (!mpi_reply)
618 return;
619 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
620 return;
621 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
622 _base_display_event_data(ioc, mpi_reply);
623 #endif
624 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
625 goto out;
626 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
627 if (!smid) {
628 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
629 ioc->name, __func__);
630 goto out;
631 }
632
633 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
634 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
635 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
636 ack_request->Event = mpi_reply->Event;
637 ack_request->EventContext = mpi_reply->EventContext;
638 ack_request->VF_ID = VF_ID;
639 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
640
641 out:
642
643 /* scsih callback handler */
644 mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
645
646 /* ctl callback handler */
647 mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
648 }
649
650 /**
651 * _base_mask_interrupts - disable interrupts
652 * @ioc: pointer to scsi command object
653 *
654 * Disabling ResetIRQ, Reply and Doorbell Interrupts
655 *
656 * Return nothing.
657 */
658 static void
659 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
660 {
661 u32 him_register;
662
663 ioc->mask_interrupts = 1;
664 him_register = readl(&ioc->chip->HostInterruptMask);
665 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
666 writel(him_register, &ioc->chip->HostInterruptMask);
667 readl(&ioc->chip->HostInterruptMask);
668 }
669
670 /**
671 * _base_unmask_interrupts - enable interrupts
672 * @ioc: pointer to scsi command object
673 *
674 * Enabling only Reply Interrupts
675 *
676 * Return nothing.
677 */
678 static void
679 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
680 {
681 u32 him_register;
682
683 writel(0, &ioc->chip->HostInterruptStatus);
684 him_register = readl(&ioc->chip->HostInterruptMask);
685 him_register &= ~MPI2_HIM_RIM;
686 writel(him_register, &ioc->chip->HostInterruptMask);
687 ioc->mask_interrupts = 0;
688 }
689
690 /**
691 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
692 * @irq: irq number (not used)
693 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
694 * @r: pt_regs pointer (not used)
695 *
696 * Return IRQ_HANDLE if processed, else IRQ_NONE.
697 */
698 static irqreturn_t
699 _base_interrupt(int irq, void *bus_id)
700 {
701 union reply_descriptor {
702 u64 word;
703 struct {
704 u32 low;
705 u32 high;
706 } u;
707 };
708 union reply_descriptor rd;
709 u32 post_index, post_index_next, completed_cmds;
710 u8 request_desript_type;
711 u16 smid;
712 u8 cb_idx;
713 u32 reply;
714 u8 VF_ID;
715 int i;
716 struct MPT2SAS_ADAPTER *ioc = bus_id;
717
718 if (ioc->mask_interrupts)
719 return IRQ_NONE;
720
721 post_index = ioc->reply_post_host_index;
722 request_desript_type = ioc->reply_post_free[post_index].
723 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
724 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
725 return IRQ_NONE;
726
727 completed_cmds = 0;
728 do {
729 rd.word = ioc->reply_post_free[post_index].Words;
730 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
731 goto out;
732 reply = 0;
733 cb_idx = 0xFF;
734 smid = le16_to_cpu(ioc->reply_post_free[post_index].
735 Default.DescriptorTypeDependent1);
736 VF_ID = ioc->reply_post_free[post_index].
737 Default.VF_ID;
738 if (request_desript_type ==
739 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
740 reply = le32_to_cpu(ioc->reply_post_free[post_index].
741 AddressReply.ReplyFrameAddress);
742 } else if (request_desript_type ==
743 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
744 goto next;
745 else if (request_desript_type ==
746 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
747 goto next;
748 if (smid)
749 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
750 if (smid && cb_idx != 0xFF) {
751 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
752 if (reply)
753 _base_display_reply_info(ioc, smid, VF_ID,
754 reply);
755 mpt2sas_base_free_smid(ioc, smid);
756 }
757 if (!smid)
758 _base_async_event(ioc, VF_ID, reply);
759
760 /* reply free queue handling */
761 if (reply) {
762 ioc->reply_free_host_index =
763 (ioc->reply_free_host_index ==
764 (ioc->reply_free_queue_depth - 1)) ?
765 0 : ioc->reply_free_host_index + 1;
766 ioc->reply_free[ioc->reply_free_host_index] =
767 cpu_to_le32(reply);
768 writel(ioc->reply_free_host_index,
769 &ioc->chip->ReplyFreeHostIndex);
770 wmb();
771 }
772
773 next:
774 post_index_next = (post_index == (ioc->reply_post_queue_depth -
775 1)) ? 0 : post_index + 1;
776 request_desript_type =
777 ioc->reply_post_free[post_index_next].Default.ReplyFlags
778 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
779 completed_cmds++;
780 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
781 goto out;
782 post_index = post_index_next;
783 } while (1);
784
785 out:
786
787 if (!completed_cmds)
788 return IRQ_NONE;
789
790 /* reply post descriptor handling */
791 post_index_next = ioc->reply_post_host_index;
792 for (i = 0 ; i < completed_cmds; i++) {
793 post_index = post_index_next;
794 /* poison the reply post descriptor */
795 ioc->reply_post_free[post_index_next].Words = ULLONG_MAX;
796 post_index_next = (post_index ==
797 (ioc->reply_post_queue_depth - 1))
798 ? 0 : post_index + 1;
799 }
800 ioc->reply_post_host_index = post_index_next;
801 writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
802 wmb();
803 return IRQ_HANDLED;
804 }
805
806 /**
807 * mpt2sas_base_release_callback_handler - clear interupt callback handler
808 * @cb_idx: callback index
809 *
810 * Return nothing.
811 */
812 void
813 mpt2sas_base_release_callback_handler(u8 cb_idx)
814 {
815 mpt_callbacks[cb_idx] = NULL;
816 }
817
818 /**
819 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
820 * @cb_func: callback function
821 *
822 * Returns cb_func.
823 */
824 u8
825 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
826 {
827 u8 cb_idx;
828
829 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
830 if (mpt_callbacks[cb_idx] == NULL)
831 break;
832
833 mpt_callbacks[cb_idx] = cb_func;
834 return cb_idx;
835 }
836
837 /**
838 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
839 *
840 * Return nothing.
841 */
842 void
843 mpt2sas_base_initialize_callback_handler(void)
844 {
845 u8 cb_idx;
846
847 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
848 mpt2sas_base_release_callback_handler(cb_idx);
849 }
850
851 /**
852 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
853 * @ioc: per adapter object
854 * @paddr: virtual address for SGE
855 *
856 * Create a zero length scatter gather entry to insure the IOCs hardware has
857 * something to use if the target device goes brain dead and tries
858 * to send data even when none is asked for.
859 *
860 * Return nothing.
861 */
862 void
863 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
864 {
865 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
866 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
867 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
868 MPI2_SGE_FLAGS_SHIFT);
869 ioc->base_add_sg_single(paddr, flags_length, -1);
870 }
871
872 /**
873 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
874 * @paddr: virtual address for SGE
875 * @flags_length: SGE flags and data transfer length
876 * @dma_addr: Physical address
877 *
878 * Return nothing.
879 */
880 static void
881 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
882 {
883 Mpi2SGESimple32_t *sgel = paddr;
884
885 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
886 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
887 sgel->FlagsLength = cpu_to_le32(flags_length);
888 sgel->Address = cpu_to_le32(dma_addr);
889 }
890
891
892 /**
893 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
894 * @paddr: virtual address for SGE
895 * @flags_length: SGE flags and data transfer length
896 * @dma_addr: Physical address
897 *
898 * Return nothing.
899 */
900 static void
901 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
902 {
903 Mpi2SGESimple64_t *sgel = paddr;
904
905 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
906 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
907 sgel->FlagsLength = cpu_to_le32(flags_length);
908 sgel->Address = cpu_to_le64(dma_addr);
909 }
910
911 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
912
913 /**
914 * _base_config_dma_addressing - set dma addressing
915 * @ioc: per adapter object
916 * @pdev: PCI device struct
917 *
918 * Returns 0 for success, non-zero for failure.
919 */
920 static int
921 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
922 {
923 struct sysinfo s;
924 char *desc = NULL;
925
926 if (sizeof(dma_addr_t) > 4) {
927 const uint64_t required_mask =
928 dma_get_required_mask(&pdev->dev);
929 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
930 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
931 DMA_BIT_MASK(64))) {
932 ioc->base_add_sg_single = &_base_add_sg_single_64;
933 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
934 desc = "64";
935 goto out;
936 }
937 }
938
939 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
940 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
941 ioc->base_add_sg_single = &_base_add_sg_single_32;
942 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
943 desc = "32";
944 } else
945 return -ENODEV;
946
947 out:
948 si_meminfo(&s);
949 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
950 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
951
952 return 0;
953 }
954
955 /**
956 * _base_save_msix_table - backup msix vector table
957 * @ioc: per adapter object
958 *
959 * This address an errata where diag reset clears out the table
960 */
961 static void
962 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
963 {
964 int i;
965
966 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
967 return;
968
969 for (i = 0; i < ioc->msix_vector_count; i++)
970 ioc->msix_table_backup[i] = ioc->msix_table[i];
971 }
972
973 /**
974 * _base_restore_msix_table - this restores the msix vector table
975 * @ioc: per adapter object
976 *
977 */
978 static void
979 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
980 {
981 int i;
982
983 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
984 return;
985
986 for (i = 0; i < ioc->msix_vector_count; i++)
987 ioc->msix_table[i] = ioc->msix_table_backup[i];
988 }
989
990 /**
991 * _base_check_enable_msix - checks MSIX capabable.
992 * @ioc: per adapter object
993 *
994 * Check to see if card is capable of MSIX, and set number
995 * of avaliable msix vectors
996 */
997 static int
998 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
999 {
1000 int base;
1001 u16 message_control;
1002 u32 msix_table_offset;
1003
1004 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1005 if (!base) {
1006 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1007 "supported\n", ioc->name));
1008 return -EINVAL;
1009 }
1010
1011 /* get msix vector count */
1012 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1013 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1014
1015 /* get msix table */
1016 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1017 msix_table_offset &= 0xFFFFFFF8;
1018 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1019
1020 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1021 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1022 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1023 return 0;
1024 }
1025
1026 /**
1027 * _base_disable_msix - disables msix
1028 * @ioc: per adapter object
1029 *
1030 */
1031 static void
1032 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1033 {
1034 if (ioc->msix_enable) {
1035 pci_disable_msix(ioc->pdev);
1036 kfree(ioc->msix_table_backup);
1037 ioc->msix_table_backup = NULL;
1038 ioc->msix_enable = 0;
1039 }
1040 }
1041
1042 /**
1043 * _base_enable_msix - enables msix, failback to io_apic
1044 * @ioc: per adapter object
1045 *
1046 */
1047 static int
1048 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1049 {
1050 struct msix_entry entries;
1051 int r;
1052 u8 try_msix = 0;
1053
1054 if (msix_disable == -1 || msix_disable == 0)
1055 try_msix = 1;
1056
1057 if (!try_msix)
1058 goto try_ioapic;
1059
1060 if (_base_check_enable_msix(ioc) != 0)
1061 goto try_ioapic;
1062
1063 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1064 sizeof(u32), GFP_KERNEL);
1065 if (!ioc->msix_table_backup) {
1066 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1067 "msix_table_backup failed!!!\n", ioc->name));
1068 goto try_ioapic;
1069 }
1070
1071 memset(&entries, 0, sizeof(struct msix_entry));
1072 r = pci_enable_msix(ioc->pdev, &entries, 1);
1073 if (r) {
1074 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1075 "failed (r=%d) !!!\n", ioc->name, r));
1076 goto try_ioapic;
1077 }
1078
1079 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1080 ioc->name, ioc);
1081 if (r) {
1082 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1083 "interrupt %d !!!\n", ioc->name, entries.vector));
1084 pci_disable_msix(ioc->pdev);
1085 goto try_ioapic;
1086 }
1087
1088 ioc->pci_irq = entries.vector;
1089 ioc->msix_enable = 1;
1090 return 0;
1091
1092 /* failback to io_apic interrupt routing */
1093 try_ioapic:
1094
1095 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1096 ioc->name, ioc);
1097 if (r) {
1098 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1099 ioc->name, ioc->pdev->irq);
1100 r = -EBUSY;
1101 goto out_fail;
1102 }
1103
1104 ioc->pci_irq = ioc->pdev->irq;
1105 return 0;
1106
1107 out_fail:
1108 return r;
1109 }
1110
1111 /**
1112 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1113 * @ioc: per adapter object
1114 *
1115 * Returns 0 for success, non-zero for failure.
1116 */
1117 int
1118 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1119 {
1120 struct pci_dev *pdev = ioc->pdev;
1121 u32 memap_sz;
1122 u32 pio_sz;
1123 int i, r = 0;
1124
1125 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1126 ioc->name, __func__));
1127
1128 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1129 if (pci_enable_device_mem(pdev)) {
1130 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1131 "failed\n", ioc->name);
1132 return -ENODEV;
1133 }
1134
1135
1136 if (pci_request_selected_regions(pdev, ioc->bars,
1137 MPT2SAS_DRIVER_NAME)) {
1138 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1139 "failed\n", ioc->name);
1140 r = -ENODEV;
1141 goto out_fail;
1142 }
1143
1144 pci_set_master(pdev);
1145
1146 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1147 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1148 ioc->name, pci_name(pdev));
1149 r = -ENODEV;
1150 goto out_fail;
1151 }
1152
1153 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1154 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1155 if (pio_sz)
1156 continue;
1157 ioc->pio_chip = pci_resource_start(pdev, i);
1158 pio_sz = pci_resource_len(pdev, i);
1159 } else {
1160 if (memap_sz)
1161 continue;
1162 ioc->chip_phys = pci_resource_start(pdev, i);
1163 memap_sz = pci_resource_len(pdev, i);
1164 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1165 if (ioc->chip == NULL) {
1166 printk(MPT2SAS_ERR_FMT "unable to map adapter "
1167 "memory!\n", ioc->name);
1168 r = -EINVAL;
1169 goto out_fail;
1170 }
1171 }
1172 }
1173
1174 _base_mask_interrupts(ioc);
1175 r = _base_enable_msix(ioc);
1176 if (r)
1177 goto out_fail;
1178
1179 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1180 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1181 "IO-APIC enabled"), ioc->pci_irq);
1182 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
1183 ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
1184 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
1185 ioc->name, ioc->pio_chip, pio_sz);
1186
1187 return 0;
1188
1189 out_fail:
1190 if (ioc->chip_phys)
1191 iounmap(ioc->chip);
1192 ioc->chip_phys = 0;
1193 ioc->pci_irq = -1;
1194 pci_release_selected_regions(ioc->pdev, ioc->bars);
1195 pci_disable_device(pdev);
1196 return r;
1197 }
1198
1199 /**
1200 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
1201 * @ioc: per adapter object
1202 * @smid: system request message index(smid zero is invalid)
1203 *
1204 * Returns phys pointer to message frame.
1205 */
1206 dma_addr_t
1207 mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1208 {
1209 return ioc->request_dma + (smid * ioc->request_sz);
1210 }
1211
1212 /**
1213 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1214 * @ioc: per adapter object
1215 * @smid: system request message index(smid zero is invalid)
1216 *
1217 * Returns virt pointer to message frame.
1218 */
1219 void *
1220 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1221 {
1222 return (void *)(ioc->request + (smid * ioc->request_sz));
1223 }
1224
1225 /**
1226 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1227 * @ioc: per adapter object
1228 * @smid: system request message index
1229 *
1230 * Returns virt pointer to sense buffer.
1231 */
1232 void *
1233 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1234 {
1235 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1236 }
1237
1238 /**
1239 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1240 * @ioc: per adapter object
1241 * @smid: system request message index
1242 *
1243 * Returns phys pointer to sense buffer.
1244 */
1245 dma_addr_t
1246 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1247 {
1248 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
1249 }
1250
1251 /**
1252 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1253 * @ioc: per adapter object
1254 * @phys_addr: lower 32 physical addr of the reply
1255 *
1256 * Converts 32bit lower physical addr into a virt address.
1257 */
1258 void *
1259 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1260 {
1261 if (!phys_addr)
1262 return NULL;
1263 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1264 }
1265
1266 /**
1267 * mpt2sas_base_get_smid - obtain a free smid
1268 * @ioc: per adapter object
1269 * @cb_idx: callback index
1270 *
1271 * Returns smid (zero is invalid)
1272 */
1273 u16
1274 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1275 {
1276 unsigned long flags;
1277 struct request_tracker *request;
1278 u16 smid;
1279
1280 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1281 if (list_empty(&ioc->free_list)) {
1282 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1283 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1284 ioc->name, __func__);
1285 return 0;
1286 }
1287
1288 request = list_entry(ioc->free_list.next,
1289 struct request_tracker, tracker_list);
1290 request->cb_idx = cb_idx;
1291 smid = request->smid;
1292 list_del(&request->tracker_list);
1293 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1294 return smid;
1295 }
1296
1297
1298 /**
1299 * mpt2sas_base_free_smid - put smid back on free_list
1300 * @ioc: per adapter object
1301 * @smid: system request message index
1302 *
1303 * Return nothing.
1304 */
1305 void
1306 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1307 {
1308 unsigned long flags;
1309
1310 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1311 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
1312 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
1313 &ioc->free_list);
1314 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1315
1316 /*
1317 * See _wait_for_commands_to_complete() call with regards to this code.
1318 */
1319 if (ioc->shost_recovery && ioc->pending_io_count) {
1320 if (ioc->pending_io_count == 1)
1321 wake_up(&ioc->reset_wq);
1322 ioc->pending_io_count--;
1323 }
1324 }
1325
1326 /**
1327 * _base_writeq - 64 bit write to MMIO
1328 * @ioc: per adapter object
1329 * @b: data payload
1330 * @addr: address in MMIO space
1331 * @writeq_lock: spin lock
1332 *
1333 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1334 * care of 32 bit environment where its not quarenteed to send the entire word
1335 * in one transfer.
1336 */
1337 #ifndef writeq
1338 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1339 spinlock_t *writeq_lock)
1340 {
1341 unsigned long flags;
1342 __u64 data_out = cpu_to_le64(b);
1343
1344 spin_lock_irqsave(writeq_lock, flags);
1345 writel((u32)(data_out), addr);
1346 writel((u32)(data_out >> 32), (addr + 4));
1347 spin_unlock_irqrestore(writeq_lock, flags);
1348 }
1349 #else
1350 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1351 spinlock_t *writeq_lock)
1352 {
1353 writeq(cpu_to_le64(b), addr);
1354 }
1355 #endif
1356
1357 /**
1358 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1359 * @ioc: per adapter object
1360 * @smid: system request message index
1361 * @vf_id: virtual function id
1362 * @handle: device handle
1363 *
1364 * Return nothing.
1365 */
1366 void
1367 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
1368 u16 handle)
1369 {
1370 Mpi2RequestDescriptorUnion_t descriptor;
1371 u64 *request = (u64 *)&descriptor;
1372
1373
1374 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1375 descriptor.SCSIIO.VF_ID = vf_id;
1376 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1377 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1378 descriptor.SCSIIO.LMID = 0;
1379 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1380 &ioc->scsi_lookup_lock);
1381 }
1382
1383
1384 /**
1385 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1386 * @ioc: per adapter object
1387 * @smid: system request message index
1388 * @vf_id: virtual function id
1389 *
1390 * Return nothing.
1391 */
1392 void
1393 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1394 u8 vf_id)
1395 {
1396 Mpi2RequestDescriptorUnion_t descriptor;
1397 u64 *request = (u64 *)&descriptor;
1398
1399 descriptor.HighPriority.RequestFlags =
1400 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1401 descriptor.HighPriority.VF_ID = vf_id;
1402 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1403 descriptor.HighPriority.LMID = 0;
1404 descriptor.HighPriority.Reserved1 = 0;
1405 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1406 &ioc->scsi_lookup_lock);
1407 }
1408
1409 /**
1410 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1411 * @ioc: per adapter object
1412 * @smid: system request message index
1413 * @vf_id: virtual function id
1414 *
1415 * Return nothing.
1416 */
1417 void
1418 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
1419 {
1420 Mpi2RequestDescriptorUnion_t descriptor;
1421 u64 *request = (u64 *)&descriptor;
1422
1423 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1424 descriptor.Default.VF_ID = vf_id;
1425 descriptor.Default.SMID = cpu_to_le16(smid);
1426 descriptor.Default.LMID = 0;
1427 descriptor.Default.DescriptorTypeDependent = 0;
1428 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1429 &ioc->scsi_lookup_lock);
1430 }
1431
1432 /**
1433 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1434 * @ioc: per adapter object
1435 * @smid: system request message index
1436 * @vf_id: virtual function id
1437 * @io_index: value used to track the IO
1438 *
1439 * Return nothing.
1440 */
1441 void
1442 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1443 u8 vf_id, u16 io_index)
1444 {
1445 Mpi2RequestDescriptorUnion_t descriptor;
1446 u64 *request = (u64 *)&descriptor;
1447
1448 descriptor.SCSITarget.RequestFlags =
1449 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1450 descriptor.SCSITarget.VF_ID = vf_id;
1451 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1452 descriptor.SCSITarget.LMID = 0;
1453 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1454 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1455 &ioc->scsi_lookup_lock);
1456 }
1457
1458 /**
1459 * _base_display_dell_branding - Disply branding string
1460 * @ioc: per adapter object
1461 *
1462 * Return nothing.
1463 */
1464 static void
1465 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1466 {
1467 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1468
1469 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1470 return;
1471
1472 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1473 switch (ioc->pdev->subsystem_device) {
1474 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1475 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1476 MPT2SAS_DELL_BRANDING_SIZE - 1);
1477 break;
1478 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1479 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1480 MPT2SAS_DELL_BRANDING_SIZE - 1);
1481 break;
1482 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1483 strncpy(dell_branding,
1484 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1485 MPT2SAS_DELL_BRANDING_SIZE - 1);
1486 break;
1487 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1488 strncpy(dell_branding,
1489 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1490 MPT2SAS_DELL_BRANDING_SIZE - 1);
1491 break;
1492 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1493 strncpy(dell_branding,
1494 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1495 MPT2SAS_DELL_BRANDING_SIZE - 1);
1496 break;
1497 case MPT2SAS_DELL_PERC_H200_SSDID:
1498 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1499 MPT2SAS_DELL_BRANDING_SIZE - 1);
1500 break;
1501 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1502 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1503 MPT2SAS_DELL_BRANDING_SIZE - 1);
1504 break;
1505 default:
1506 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1507 break;
1508 }
1509
1510 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1511 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1512 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1513 ioc->pdev->subsystem_device);
1514 }
1515
1516 /**
1517 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1518 * @ioc: per adapter object
1519 *
1520 * Return nothing.
1521 */
1522 static void
1523 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1524 {
1525 int i = 0;
1526 char desc[16];
1527 u8 revision;
1528 u32 iounit_pg1_flags;
1529
1530 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1531 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1532 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1533 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1534 ioc->name, desc,
1535 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1536 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1537 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1538 ioc->facts.FWVersion.Word & 0x000000FF,
1539 revision,
1540 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1541 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1542 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1543 ioc->bios_pg3.BiosVersion & 0x000000FF);
1544
1545 _base_display_dell_branding(ioc);
1546
1547 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1548
1549 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1550 printk("Initiator");
1551 i++;
1552 }
1553
1554 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1555 printk("%sTarget", i ? "," : "");
1556 i++;
1557 }
1558
1559 i = 0;
1560 printk("), ");
1561 printk("Capabilities=(");
1562
1563 if (ioc->facts.IOCCapabilities &
1564 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1565 printk("Raid");
1566 i++;
1567 }
1568
1569 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1570 printk("%sTLR", i ? "," : "");
1571 i++;
1572 }
1573
1574 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1575 printk("%sMulticast", i ? "," : "");
1576 i++;
1577 }
1578
1579 if (ioc->facts.IOCCapabilities &
1580 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1581 printk("%sBIDI Target", i ? "," : "");
1582 i++;
1583 }
1584
1585 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1586 printk("%sEEDP", i ? "," : "");
1587 i++;
1588 }
1589
1590 if (ioc->facts.IOCCapabilities &
1591 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1592 printk("%sSnapshot Buffer", i ? "," : "");
1593 i++;
1594 }
1595
1596 if (ioc->facts.IOCCapabilities &
1597 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1598 printk("%sDiag Trace Buffer", i ? "," : "");
1599 i++;
1600 }
1601
1602 if (ioc->facts.IOCCapabilities &
1603 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1604 printk("%sTask Set Full", i ? "," : "");
1605 i++;
1606 }
1607
1608 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1609 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1610 printk("%sNCQ", i ? "," : "");
1611 i++;
1612 }
1613
1614 printk(")\n");
1615 }
1616
1617 /**
1618 * _base_static_config_pages - static start of day config pages
1619 * @ioc: per adapter object
1620 *
1621 * Return nothing.
1622 */
1623 static void
1624 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1625 {
1626 Mpi2ConfigReply_t mpi_reply;
1627 u32 iounit_pg1_flags;
1628
1629 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1630 if (ioc->ir_firmware)
1631 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1632 &ioc->manu_pg10);
1633 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1634 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1635 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1636 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1637 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1638 _base_display_ioc_capabilities(ioc);
1639
1640 /*
1641 * Enable task_set_full handling in iounit_pg1 when the
1642 * facts capabilities indicate that its supported.
1643 */
1644 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1645 if ((ioc->facts.IOCCapabilities &
1646 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1647 iounit_pg1_flags &=
1648 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1649 else
1650 iounit_pg1_flags |=
1651 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1652 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1653 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
1654 }
1655
1656 /**
1657 * _base_release_memory_pools - release memory
1658 * @ioc: per adapter object
1659 *
1660 * Free memory allocated from _base_allocate_memory_pools.
1661 *
1662 * Return nothing.
1663 */
1664 static void
1665 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1666 {
1667 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1668 __func__));
1669
1670 if (ioc->request) {
1671 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1672 ioc->request, ioc->request_dma);
1673 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1674 ": free\n", ioc->name, ioc->request));
1675 ioc->request = NULL;
1676 }
1677
1678 if (ioc->sense) {
1679 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1680 if (ioc->sense_dma_pool)
1681 pci_pool_destroy(ioc->sense_dma_pool);
1682 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1683 ": free\n", ioc->name, ioc->sense));
1684 ioc->sense = NULL;
1685 }
1686
1687 if (ioc->reply) {
1688 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1689 if (ioc->reply_dma_pool)
1690 pci_pool_destroy(ioc->reply_dma_pool);
1691 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1692 ": free\n", ioc->name, ioc->reply));
1693 ioc->reply = NULL;
1694 }
1695
1696 if (ioc->reply_free) {
1697 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1698 ioc->reply_free_dma);
1699 if (ioc->reply_free_dma_pool)
1700 pci_pool_destroy(ioc->reply_free_dma_pool);
1701 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1702 "(0x%p): free\n", ioc->name, ioc->reply_free));
1703 ioc->reply_free = NULL;
1704 }
1705
1706 if (ioc->reply_post_free) {
1707 pci_pool_free(ioc->reply_post_free_dma_pool,
1708 ioc->reply_post_free, ioc->reply_post_free_dma);
1709 if (ioc->reply_post_free_dma_pool)
1710 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1711 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1712 "reply_post_free_pool(0x%p): free\n", ioc->name,
1713 ioc->reply_post_free));
1714 ioc->reply_post_free = NULL;
1715 }
1716
1717 if (ioc->config_page) {
1718 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1719 "config_page(0x%p): free\n", ioc->name,
1720 ioc->config_page));
1721 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1722 ioc->config_page, ioc->config_page_dma);
1723 }
1724
1725 kfree(ioc->scsi_lookup);
1726 }
1727
1728
1729 /**
1730 * _base_allocate_memory_pools - allocate start of day memory pools
1731 * @ioc: per adapter object
1732 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1733 *
1734 * Returns 0 success, anything else error
1735 */
1736 static int
1737 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1738 {
1739 Mpi2IOCFactsReply_t *facts;
1740 u32 queue_size, queue_diff;
1741 u16 max_sge_elements;
1742 u16 num_of_reply_frames;
1743 u16 chains_needed_per_io;
1744 u32 sz, total_sz;
1745 u16 i;
1746 u32 retry_sz;
1747 u16 max_request_credit;
1748
1749 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1750 __func__));
1751
1752 retry_sz = 0;
1753 facts = &ioc->facts;
1754
1755 /* command line tunables for max sgl entries */
1756 if (max_sgl_entries != -1) {
1757 ioc->shost->sg_tablesize = (max_sgl_entries <
1758 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1759 MPT2SAS_SG_DEPTH;
1760 } else {
1761 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1762 }
1763
1764 /* command line tunables for max controller queue depth */
1765 if (max_queue_depth != -1) {
1766 max_request_credit = (max_queue_depth < facts->RequestCredit)
1767 ? max_queue_depth : facts->RequestCredit;
1768 } else {
1769 max_request_credit = (facts->RequestCredit >
1770 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1771 facts->RequestCredit;
1772 }
1773 ioc->request_depth = max_request_credit;
1774
1775 /* request frame size */
1776 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1777
1778 /* reply frame size */
1779 ioc->reply_sz = facts->ReplyFrameSize * 4;
1780
1781 retry_allocation:
1782 total_sz = 0;
1783 /* calculate number of sg elements left over in the 1st frame */
1784 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1785 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1786 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1787
1788 /* now do the same for a chain buffer */
1789 max_sge_elements = ioc->request_sz - ioc->sge_size;
1790 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1791
1792 ioc->chain_offset_value_for_main_message =
1793 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1794 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1795
1796 /*
1797 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1798 */
1799 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1800 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1801 + 1;
1802 if (chains_needed_per_io > facts->MaxChainDepth) {
1803 chains_needed_per_io = facts->MaxChainDepth;
1804 ioc->shost->sg_tablesize = min_t(u16,
1805 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
1806 * chains_needed_per_io), ioc->shost->sg_tablesize);
1807 }
1808 ioc->chains_needed_per_io = chains_needed_per_io;
1809
1810 /* reply free queue sizing - taking into account for events */
1811 num_of_reply_frames = ioc->request_depth + 32;
1812
1813 /* number of replies frames can't be a multiple of 16 */
1814 /* decrease number of reply frames by 1 */
1815 if (!(num_of_reply_frames % 16))
1816 num_of_reply_frames--;
1817
1818 /* calculate number of reply free queue entries
1819 * (must be multiple of 16)
1820 */
1821
1822 /* (we know reply_free_queue_depth is not a multiple of 16) */
1823 queue_size = num_of_reply_frames;
1824 queue_size += 16 - (queue_size % 16);
1825 ioc->reply_free_queue_depth = queue_size;
1826
1827 /* reply descriptor post queue sizing */
1828 /* this size should be the number of request frames + number of reply
1829 * frames
1830 */
1831
1832 queue_size = ioc->request_depth + num_of_reply_frames + 1;
1833 /* round up to 16 byte boundary */
1834 if (queue_size % 16)
1835 queue_size += 16 - (queue_size % 16);
1836
1837 /* check against IOC maximum reply post queue depth */
1838 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
1839 queue_diff = queue_size -
1840 facts->MaxReplyDescriptorPostQueueDepth;
1841
1842 /* round queue_diff up to multiple of 16 */
1843 if (queue_diff % 16)
1844 queue_diff += 16 - (queue_diff % 16);
1845
1846 /* adjust request_depth, reply_free_queue_depth,
1847 * and queue_size
1848 */
1849 ioc->request_depth -= queue_diff;
1850 ioc->reply_free_queue_depth -= queue_diff;
1851 queue_size -= queue_diff;
1852 }
1853 ioc->reply_post_queue_depth = queue_size;
1854
1855 /* max scsi host queue depth */
1856 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
1857 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
1858 "(%d)\n", ioc->name, ioc->shost->can_queue));
1859
1860 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
1861 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
1862 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
1863 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
1864 ioc->chains_needed_per_io));
1865
1866 /* contiguous pool for request and chains, 16 byte align, one extra "
1867 * "frame for smid=0
1868 */
1869 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
1870 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
1871
1872 ioc->request_dma_sz = sz;
1873 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
1874 if (!ioc->request) {
1875 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1876 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1877 "total(%d kB)\n", ioc->name, ioc->request_depth,
1878 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1879 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
1880 goto out;
1881 retry_sz += 64;
1882 ioc->request_depth = max_request_credit - retry_sz;
1883 goto retry_allocation;
1884 }
1885
1886 if (retry_sz)
1887 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1888 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1889 "total(%d kb)\n", ioc->name, ioc->request_depth,
1890 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1891
1892 ioc->chain = ioc->request + ((ioc->request_depth + 1) *
1893 ioc->request_sz);
1894 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
1895 ioc->request_sz);
1896 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
1897 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
1898 ioc->request, ioc->request_depth, ioc->request_sz,
1899 ((ioc->request_depth + 1) * ioc->request_sz)/1024));
1900 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
1901 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
1902 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
1903 ioc->request_sz))/1024));
1904 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
1905 ioc->name, (unsigned long long) ioc->request_dma));
1906 total_sz += sz;
1907
1908 ioc->scsi_lookup = kcalloc(ioc->request_depth,
1909 sizeof(struct request_tracker), GFP_KERNEL);
1910 if (!ioc->scsi_lookup) {
1911 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
1912 ioc->name);
1913 goto out;
1914 }
1915
1916 /* initialize some bits */
1917 for (i = 0; i < ioc->request_depth; i++)
1918 ioc->scsi_lookup[i].smid = i + 1;
1919
1920 /* sense buffers, 4 byte align */
1921 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
1922 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
1923 0);
1924 if (!ioc->sense_dma_pool) {
1925 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
1926 ioc->name);
1927 goto out;
1928 }
1929 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
1930 &ioc->sense_dma);
1931 if (!ioc->sense) {
1932 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
1933 ioc->name);
1934 goto out;
1935 }
1936 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
1937 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
1938 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
1939 SCSI_SENSE_BUFFERSIZE, sz/1024));
1940 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
1941 ioc->name, (unsigned long long)ioc->sense_dma));
1942 total_sz += sz;
1943
1944 /* reply pool, 4 byte align */
1945 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
1946 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
1947 0);
1948 if (!ioc->reply_dma_pool) {
1949 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
1950 ioc->name);
1951 goto out;
1952 }
1953 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
1954 &ioc->reply_dma);
1955 if (!ioc->reply) {
1956 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
1957 ioc->name);
1958 goto out;
1959 }
1960 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
1961 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
1962 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
1963 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
1964 ioc->name, (unsigned long long)ioc->reply_dma));
1965 total_sz += sz;
1966
1967 /* reply free queue, 16 byte align */
1968 sz = ioc->reply_free_queue_depth * 4;
1969 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
1970 ioc->pdev, sz, 16, 0);
1971 if (!ioc->reply_free_dma_pool) {
1972 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
1973 "failed\n", ioc->name);
1974 goto out;
1975 }
1976 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
1977 &ioc->reply_free_dma);
1978 if (!ioc->reply_free) {
1979 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
1980 "failed\n", ioc->name);
1981 goto out;
1982 }
1983 memset(ioc->reply_free, 0, sz);
1984 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
1985 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
1986 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
1987 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
1988 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
1989 total_sz += sz;
1990
1991 /* reply post queue, 16 byte align */
1992 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
1993 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
1994 ioc->pdev, sz, 16, 0);
1995 if (!ioc->reply_post_free_dma_pool) {
1996 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
1997 "failed\n", ioc->name);
1998 goto out;
1999 }
2000 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2001 GFP_KERNEL, &ioc->reply_post_free_dma);
2002 if (!ioc->reply_post_free) {
2003 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2004 "failed\n", ioc->name);
2005 goto out;
2006 }
2007 memset(ioc->reply_post_free, 0, sz);
2008 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2009 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2010 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2011 sz/1024));
2012 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2013 "(0x%llx)\n", ioc->name, (unsigned long long)
2014 ioc->reply_post_free_dma));
2015 total_sz += sz;
2016
2017 ioc->config_page_sz = 512;
2018 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2019 ioc->config_page_sz, &ioc->config_page_dma);
2020 if (!ioc->config_page) {
2021 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2022 "failed\n", ioc->name);
2023 goto out;
2024 }
2025 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2026 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2027 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2028 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2029 total_sz += ioc->config_page_sz;
2030
2031 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2032 ioc->name, total_sz/1024);
2033 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2034 "Max Controller Queue Depth(%d)\n",
2035 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2036 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2037 ioc->name, ioc->shost->sg_tablesize);
2038 return 0;
2039
2040 out:
2041 _base_release_memory_pools(ioc);
2042 return -ENOMEM;
2043 }
2044
2045
2046 /**
2047 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2048 * @ioc: Pointer to MPT_ADAPTER structure
2049 * @cooked: Request raw or cooked IOC state
2050 *
2051 * Returns all IOC Doorbell register bits if cooked==0, else just the
2052 * Doorbell bits in MPI_IOC_STATE_MASK.
2053 */
2054 u32
2055 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2056 {
2057 u32 s, sc;
2058
2059 s = readl(&ioc->chip->Doorbell);
2060 sc = s & MPI2_IOC_STATE_MASK;
2061 return cooked ? sc : s;
2062 }
2063
2064 /**
2065 * _base_wait_on_iocstate - waiting on a particular ioc state
2066 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2067 * @timeout: timeout in second
2068 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2069 *
2070 * Returns 0 for success, non-zero for failure.
2071 */
2072 static int
2073 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2074 int sleep_flag)
2075 {
2076 u32 count, cntdn;
2077 u32 current_state;
2078
2079 count = 0;
2080 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2081 do {
2082 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2083 if (current_state == ioc_state)
2084 return 0;
2085 if (count && current_state == MPI2_IOC_STATE_FAULT)
2086 break;
2087 if (sleep_flag == CAN_SLEEP)
2088 msleep(1);
2089 else
2090 udelay(500);
2091 count++;
2092 } while (--cntdn);
2093
2094 return current_state;
2095 }
2096
2097 /**
2098 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2099 * a write to the doorbell)
2100 * @ioc: per adapter object
2101 * @timeout: timeout in second
2102 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2103 *
2104 * Returns 0 for success, non-zero for failure.
2105 *
2106 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2107 */
2108 static int
2109 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2110 int sleep_flag)
2111 {
2112 u32 cntdn, count;
2113 u32 int_status;
2114
2115 count = 0;
2116 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2117 do {
2118 int_status = readl(&ioc->chip->HostInterruptStatus);
2119 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2120 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2121 "successfull count(%d), timeout(%d)\n", ioc->name,
2122 __func__, count, timeout));
2123 return 0;
2124 }
2125 if (sleep_flag == CAN_SLEEP)
2126 msleep(1);
2127 else
2128 udelay(500);
2129 count++;
2130 } while (--cntdn);
2131
2132 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2133 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2134 return -EFAULT;
2135 }
2136
2137 /**
2138 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2139 * @ioc: per adapter object
2140 * @timeout: timeout in second
2141 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2142 *
2143 * Returns 0 for success, non-zero for failure.
2144 *
2145 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2146 * doorbell.
2147 */
2148 static int
2149 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2150 int sleep_flag)
2151 {
2152 u32 cntdn, count;
2153 u32 int_status;
2154 u32 doorbell;
2155
2156 count = 0;
2157 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2158 do {
2159 int_status = readl(&ioc->chip->HostInterruptStatus);
2160 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2161 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2162 "successfull count(%d), timeout(%d)\n", ioc->name,
2163 __func__, count, timeout));
2164 return 0;
2165 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2166 doorbell = readl(&ioc->chip->Doorbell);
2167 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2168 MPI2_IOC_STATE_FAULT) {
2169 mpt2sas_base_fault_info(ioc , doorbell);
2170 return -EFAULT;
2171 }
2172 } else if (int_status == 0xFFFFFFFF)
2173 goto out;
2174
2175 if (sleep_flag == CAN_SLEEP)
2176 msleep(1);
2177 else
2178 udelay(500);
2179 count++;
2180 } while (--cntdn);
2181
2182 out:
2183 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2184 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2185 return -EFAULT;
2186 }
2187
2188 /**
2189 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2190 * @ioc: per adapter object
2191 * @timeout: timeout in second
2192 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2193 *
2194 * Returns 0 for success, non-zero for failure.
2195 *
2196 */
2197 static int
2198 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2199 int sleep_flag)
2200 {
2201 u32 cntdn, count;
2202 u32 doorbell_reg;
2203
2204 count = 0;
2205 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2206 do {
2207 doorbell_reg = readl(&ioc->chip->Doorbell);
2208 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2209 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2210 "successfull count(%d), timeout(%d)\n", ioc->name,
2211 __func__, count, timeout));
2212 return 0;
2213 }
2214 if (sleep_flag == CAN_SLEEP)
2215 msleep(1);
2216 else
2217 udelay(500);
2218 count++;
2219 } while (--cntdn);
2220
2221 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2222 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2223 return -EFAULT;
2224 }
2225
2226 /**
2227 * _base_send_ioc_reset - send doorbell reset
2228 * @ioc: per adapter object
2229 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2230 * @timeout: timeout in second
2231 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2232 *
2233 * Returns 0 for success, non-zero for failure.
2234 */
2235 static int
2236 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2237 int sleep_flag)
2238 {
2239 u32 ioc_state;
2240 int r = 0;
2241
2242 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2243 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2244 ioc->name, __func__);
2245 return -EFAULT;
2246 }
2247
2248 if (!(ioc->facts.IOCCapabilities &
2249 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2250 return -EFAULT;
2251
2252 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2253
2254 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2255 &ioc->chip->Doorbell);
2256 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2257 r = -EFAULT;
2258 goto out;
2259 }
2260 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2261 timeout, sleep_flag);
2262 if (ioc_state) {
2263 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2264 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2265 r = -EFAULT;
2266 goto out;
2267 }
2268 out:
2269 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2270 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2271 return r;
2272 }
2273
2274 /**
2275 * _base_handshake_req_reply_wait - send request thru doorbell interface
2276 * @ioc: per adapter object
2277 * @request_bytes: request length
2278 * @request: pointer having request payload
2279 * @reply_bytes: reply length
2280 * @reply: pointer to reply payload
2281 * @timeout: timeout in second
2282 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2283 *
2284 * Returns 0 for success, non-zero for failure.
2285 */
2286 static int
2287 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2288 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2289 {
2290 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2291 int i;
2292 u8 failed;
2293 u16 dummy;
2294 u32 *mfp;
2295
2296 /* make sure doorbell is not in use */
2297 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2298 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2299 " (line=%d)\n", ioc->name, __LINE__);
2300 return -EFAULT;
2301 }
2302
2303 /* clear pending doorbell interrupts from previous state changes */
2304 if (readl(&ioc->chip->HostInterruptStatus) &
2305 MPI2_HIS_IOC2SYS_DB_STATUS)
2306 writel(0, &ioc->chip->HostInterruptStatus);
2307
2308 /* send message to ioc */
2309 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2310 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2311 &ioc->chip->Doorbell);
2312
2313 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2314 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2315 "int failed (line=%d)\n", ioc->name, __LINE__);
2316 return -EFAULT;
2317 }
2318 writel(0, &ioc->chip->HostInterruptStatus);
2319
2320 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2321 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2322 "ack failed (line=%d)\n", ioc->name, __LINE__);
2323 return -EFAULT;
2324 }
2325
2326 /* send message 32-bits at a time */
2327 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2328 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2329 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2330 failed = 1;
2331 }
2332
2333 if (failed) {
2334 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2335 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2336 return -EFAULT;
2337 }
2338
2339 /* now wait for the reply */
2340 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2341 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2342 "int failed (line=%d)\n", ioc->name, __LINE__);
2343 return -EFAULT;
2344 }
2345
2346 /* read the first two 16-bits, it gives the total length of the reply */
2347 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2348 & MPI2_DOORBELL_DATA_MASK);
2349 writel(0, &ioc->chip->HostInterruptStatus);
2350 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2351 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2352 "int failed (line=%d)\n", ioc->name, __LINE__);
2353 return -EFAULT;
2354 }
2355 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2356 & MPI2_DOORBELL_DATA_MASK);
2357 writel(0, &ioc->chip->HostInterruptStatus);
2358
2359 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2360 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2361 printk(MPT2SAS_ERR_FMT "doorbell "
2362 "handshake int failed (line=%d)\n", ioc->name,
2363 __LINE__);
2364 return -EFAULT;
2365 }
2366 if (i >= reply_bytes/2) /* overflow case */
2367 dummy = readl(&ioc->chip->Doorbell);
2368 else
2369 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2370 & MPI2_DOORBELL_DATA_MASK);
2371 writel(0, &ioc->chip->HostInterruptStatus);
2372 }
2373
2374 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2375 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2376 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2377 " (line=%d)\n", ioc->name, __LINE__));
2378 }
2379 writel(0, &ioc->chip->HostInterruptStatus);
2380
2381 if (ioc->logging_level & MPT_DEBUG_INIT) {
2382 mfp = (u32 *)reply;
2383 printk(KERN_DEBUG "\toffset:data\n");
2384 for (i = 0; i < reply_bytes/4; i++)
2385 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2386 le32_to_cpu(mfp[i]));
2387 }
2388 return 0;
2389 }
2390
2391 /**
2392 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2393 * @ioc: per adapter object
2394 * @mpi_reply: the reply payload from FW
2395 * @mpi_request: the request payload sent to FW
2396 *
2397 * The SAS IO Unit Control Request message allows the host to perform low-level
2398 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2399 * to obtain the IOC assigned device handles for a device if it has other
2400 * identifying information about the device, in addition allows the host to
2401 * remove IOC resources associated with the device.
2402 *
2403 * Returns 0 for success, non-zero for failure.
2404 */
2405 int
2406 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2407 Mpi2SasIoUnitControlReply_t *mpi_reply,
2408 Mpi2SasIoUnitControlRequest_t *mpi_request)
2409 {
2410 u16 smid;
2411 u32 ioc_state;
2412 unsigned long timeleft;
2413 u8 issue_reset;
2414 int rc;
2415 void *request;
2416 u16 wait_state_count;
2417
2418 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2419 __func__));
2420
2421 mutex_lock(&ioc->base_cmds.mutex);
2422
2423 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2424 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2425 ioc->name, __func__);
2426 rc = -EAGAIN;
2427 goto out;
2428 }
2429
2430 wait_state_count = 0;
2431 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2432 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2433 if (wait_state_count++ == 10) {
2434 printk(MPT2SAS_ERR_FMT
2435 "%s: failed due to ioc not operational\n",
2436 ioc->name, __func__);
2437 rc = -EFAULT;
2438 goto out;
2439 }
2440 ssleep(1);
2441 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2442 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2443 "operational state(count=%d)\n", ioc->name,
2444 __func__, wait_state_count);
2445 }
2446
2447 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2448 if (!smid) {
2449 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2450 ioc->name, __func__);
2451 rc = -EAGAIN;
2452 goto out;
2453 }
2454
2455 rc = 0;
2456 ioc->base_cmds.status = MPT2_CMD_PENDING;
2457 request = mpt2sas_base_get_msg_frame(ioc, smid);
2458 ioc->base_cmds.smid = smid;
2459 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2460 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2461 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2462 ioc->ioc_link_reset_in_progress = 1;
2463 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
2464 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2465 msecs_to_jiffies(10000));
2466 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2467 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2468 ioc->ioc_link_reset_in_progress)
2469 ioc->ioc_link_reset_in_progress = 0;
2470 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2471 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2472 ioc->name, __func__);
2473 _debug_dump_mf(mpi_request,
2474 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2475 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2476 issue_reset = 1;
2477 goto issue_host_reset;
2478 }
2479 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2480 memcpy(mpi_reply, ioc->base_cmds.reply,
2481 sizeof(Mpi2SasIoUnitControlReply_t));
2482 else
2483 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2484 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2485 goto out;
2486
2487 issue_host_reset:
2488 if (issue_reset)
2489 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2490 FORCE_BIG_HAMMER);
2491 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2492 rc = -EFAULT;
2493 out:
2494 mutex_unlock(&ioc->base_cmds.mutex);
2495 return rc;
2496 }
2497
2498
2499 /**
2500 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2501 * @ioc: per adapter object
2502 * @mpi_reply: the reply payload from FW
2503 * @mpi_request: the request payload sent to FW
2504 *
2505 * The SCSI Enclosure Processor request message causes the IOC to
2506 * communicate with SES devices to control LED status signals.
2507 *
2508 * Returns 0 for success, non-zero for failure.
2509 */
2510 int
2511 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2512 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2513 {
2514 u16 smid;
2515 u32 ioc_state;
2516 unsigned long timeleft;
2517 u8 issue_reset;
2518 int rc;
2519 void *request;
2520 u16 wait_state_count;
2521
2522 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2523 __func__));
2524
2525 mutex_lock(&ioc->base_cmds.mutex);
2526
2527 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2528 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2529 ioc->name, __func__);
2530 rc = -EAGAIN;
2531 goto out;
2532 }
2533
2534 wait_state_count = 0;
2535 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2536 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2537 if (wait_state_count++ == 10) {
2538 printk(MPT2SAS_ERR_FMT
2539 "%s: failed due to ioc not operational\n",
2540 ioc->name, __func__);
2541 rc = -EFAULT;
2542 goto out;
2543 }
2544 ssleep(1);
2545 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2546 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2547 "operational state(count=%d)\n", ioc->name,
2548 __func__, wait_state_count);
2549 }
2550
2551 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2552 if (!smid) {
2553 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2554 ioc->name, __func__);
2555 rc = -EAGAIN;
2556 goto out;
2557 }
2558
2559 rc = 0;
2560 ioc->base_cmds.status = MPT2_CMD_PENDING;
2561 request = mpt2sas_base_get_msg_frame(ioc, smid);
2562 ioc->base_cmds.smid = smid;
2563 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2564 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
2565 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2566 msecs_to_jiffies(10000));
2567 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2568 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2569 ioc->name, __func__);
2570 _debug_dump_mf(mpi_request,
2571 sizeof(Mpi2SepRequest_t)/4);
2572 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2573 issue_reset = 1;
2574 goto issue_host_reset;
2575 }
2576 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2577 memcpy(mpi_reply, ioc->base_cmds.reply,
2578 sizeof(Mpi2SepReply_t));
2579 else
2580 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2581 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2582 goto out;
2583
2584 issue_host_reset:
2585 if (issue_reset)
2586 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2587 FORCE_BIG_HAMMER);
2588 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2589 rc = -EFAULT;
2590 out:
2591 mutex_unlock(&ioc->base_cmds.mutex);
2592 return rc;
2593 }
2594
2595 /**
2596 * _base_get_port_facts - obtain port facts reply and save in ioc
2597 * @ioc: per adapter object
2598 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2599 *
2600 * Returns 0 for success, non-zero for failure.
2601 */
2602 static int
2603 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2604 {
2605 Mpi2PortFactsRequest_t mpi_request;
2606 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2607 int mpi_reply_sz, mpi_request_sz, r;
2608
2609 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2610 __func__));
2611
2612 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2613 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2614 memset(&mpi_request, 0, mpi_request_sz);
2615 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2616 mpi_request.PortNumber = port;
2617 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2618 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2619
2620 if (r != 0) {
2621 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2622 ioc->name, __func__, r);
2623 return r;
2624 }
2625
2626 pfacts = &ioc->pfacts[port];
2627 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2628 pfacts->PortNumber = mpi_reply.PortNumber;
2629 pfacts->VP_ID = mpi_reply.VP_ID;
2630 pfacts->VF_ID = mpi_reply.VF_ID;
2631 pfacts->MaxPostedCmdBuffers =
2632 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2633
2634 return 0;
2635 }
2636
2637 /**
2638 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2639 * @ioc: per adapter object
2640 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2641 *
2642 * Returns 0 for success, non-zero for failure.
2643 */
2644 static int
2645 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2646 {
2647 Mpi2IOCFactsRequest_t mpi_request;
2648 Mpi2IOCFactsReply_t mpi_reply, *facts;
2649 int mpi_reply_sz, mpi_request_sz, r;
2650
2651 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2652 __func__));
2653
2654 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2655 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2656 memset(&mpi_request, 0, mpi_request_sz);
2657 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2658 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2659 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2660
2661 if (r != 0) {
2662 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2663 ioc->name, __func__, r);
2664 return r;
2665 }
2666
2667 facts = &ioc->facts;
2668 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2669 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2670 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2671 facts->VP_ID = mpi_reply.VP_ID;
2672 facts->VF_ID = mpi_reply.VF_ID;
2673 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2674 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2675 facts->WhoInit = mpi_reply.WhoInit;
2676 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2677 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2678 facts->MaxReplyDescriptorPostQueueDepth =
2679 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2680 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2681 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2682 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2683 ioc->ir_firmware = 1;
2684 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2685 facts->IOCRequestFrameSize =
2686 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2687 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2688 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2689 ioc->shost->max_id = -1;
2690 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2691 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2692 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2693 facts->HighPriorityCredit =
2694 le16_to_cpu(mpi_reply.HighPriorityCredit);
2695 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2696 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2697
2698 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2699 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2700 facts->MaxChainDepth));
2701 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2702 "reply frame size(%d)\n", ioc->name,
2703 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2704 return 0;
2705 }
2706
2707 /**
2708 * _base_send_ioc_init - send ioc_init to firmware
2709 * @ioc: per adapter object
2710 * @VF_ID: virtual function id
2711 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2712 *
2713 * Returns 0 for success, non-zero for failure.
2714 */
2715 static int
2716 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2717 {
2718 Mpi2IOCInitRequest_t mpi_request;
2719 Mpi2IOCInitReply_t mpi_reply;
2720 int r;
2721
2722 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2723 __func__));
2724
2725 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2726 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2727 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2728 mpi_request.VF_ID = VF_ID;
2729 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2730 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2731
2732 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2733 * removed and made reserved. For those with older firmware will need
2734 * this fix. It was decided that the Reply and Request frame sizes are
2735 * the same.
2736 */
2737 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2738 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2739 /* mpi_request.SystemReplyFrameSize =
2740 * cpu_to_le16(ioc->reply_sz);
2741 */
2742 }
2743
2744 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2745 mpi_request.ReplyDescriptorPostQueueDepth =
2746 cpu_to_le16(ioc->reply_post_queue_depth);
2747 mpi_request.ReplyFreeQueueDepth =
2748 cpu_to_le16(ioc->reply_free_queue_depth);
2749
2750 #if BITS_PER_LONG > 32
2751 mpi_request.SenseBufferAddressHigh =
2752 cpu_to_le32(ioc->sense_dma >> 32);
2753 mpi_request.SystemReplyAddressHigh =
2754 cpu_to_le32(ioc->reply_dma >> 32);
2755 mpi_request.SystemRequestFrameBaseAddress =
2756 cpu_to_le64(ioc->request_dma);
2757 mpi_request.ReplyFreeQueueAddress =
2758 cpu_to_le64(ioc->reply_free_dma);
2759 mpi_request.ReplyDescriptorPostQueueAddress =
2760 cpu_to_le64(ioc->reply_post_free_dma);
2761 #else
2762 mpi_request.SystemRequestFrameBaseAddress =
2763 cpu_to_le32(ioc->request_dma);
2764 mpi_request.ReplyFreeQueueAddress =
2765 cpu_to_le32(ioc->reply_free_dma);
2766 mpi_request.ReplyDescriptorPostQueueAddress =
2767 cpu_to_le32(ioc->reply_post_free_dma);
2768 #endif
2769
2770 if (ioc->logging_level & MPT_DEBUG_INIT) {
2771 u32 *mfp;
2772 int i;
2773
2774 mfp = (u32 *)&mpi_request;
2775 printk(KERN_DEBUG "\toffset:data\n");
2776 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
2777 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2778 le32_to_cpu(mfp[i]));
2779 }
2780
2781 r = _base_handshake_req_reply_wait(ioc,
2782 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
2783 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
2784 sleep_flag);
2785
2786 if (r != 0) {
2787 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2788 ioc->name, __func__, r);
2789 return r;
2790 }
2791
2792 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
2793 mpi_reply.IOCLogInfo) {
2794 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
2795 r = -EIO;
2796 }
2797
2798 return 0;
2799 }
2800
2801 /**
2802 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
2803 * @ioc: per adapter object
2804 * @VF_ID: virtual function id
2805 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2806 *
2807 * Returns 0 for success, non-zero for failure.
2808 */
2809 static int
2810 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2811 {
2812 Mpi2PortEnableRequest_t *mpi_request;
2813 u32 ioc_state;
2814 unsigned long timeleft;
2815 int r = 0;
2816 u16 smid;
2817
2818 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
2819
2820 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2821 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2822 ioc->name, __func__);
2823 return -EAGAIN;
2824 }
2825
2826 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2827 if (!smid) {
2828 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2829 ioc->name, __func__);
2830 return -EAGAIN;
2831 }
2832
2833 ioc->base_cmds.status = MPT2_CMD_PENDING;
2834 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2835 ioc->base_cmds.smid = smid;
2836 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
2837 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
2838 mpi_request->VF_ID = VF_ID;
2839
2840 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
2841 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2842 300*HZ);
2843 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2844 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2845 ioc->name, __func__);
2846 _debug_dump_mf(mpi_request,
2847 sizeof(Mpi2PortEnableRequest_t)/4);
2848 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2849 r = -EFAULT;
2850 else
2851 r = -ETIME;
2852 goto out;
2853 } else
2854 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2855 ioc->name, __func__));
2856
2857 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
2858 60, sleep_flag);
2859 if (ioc_state) {
2860 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
2861 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2862 r = -EFAULT;
2863 }
2864 out:
2865 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2866 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
2867 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2868 return r;
2869 }
2870
2871 /**
2872 * _base_unmask_events - turn on notification for this event
2873 * @ioc: per adapter object
2874 * @event: firmware event
2875 *
2876 * The mask is stored in ioc->event_masks.
2877 */
2878 static void
2879 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
2880 {
2881 u32 desired_event;
2882
2883 if (event >= 128)
2884 return;
2885
2886 desired_event = (1 << (event % 32));
2887
2888 if (event < 32)
2889 ioc->event_masks[0] &= ~desired_event;
2890 else if (event < 64)
2891 ioc->event_masks[1] &= ~desired_event;
2892 else if (event < 96)
2893 ioc->event_masks[2] &= ~desired_event;
2894 else if (event < 128)
2895 ioc->event_masks[3] &= ~desired_event;
2896 }
2897
2898 /**
2899 * _base_event_notification - send event notification
2900 * @ioc: per adapter object
2901 * @VF_ID: virtual function id
2902 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2903 *
2904 * Returns 0 for success, non-zero for failure.
2905 */
2906 static int
2907 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2908 {
2909 Mpi2EventNotificationRequest_t *mpi_request;
2910 unsigned long timeleft;
2911 u16 smid;
2912 int r = 0;
2913 int i;
2914
2915 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2916 __func__));
2917
2918 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2919 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2920 ioc->name, __func__);
2921 return -EAGAIN;
2922 }
2923
2924 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2925 if (!smid) {
2926 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2927 ioc->name, __func__);
2928 return -EAGAIN;
2929 }
2930 ioc->base_cmds.status = MPT2_CMD_PENDING;
2931 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2932 ioc->base_cmds.smid = smid;
2933 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
2934 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2935 mpi_request->VF_ID = VF_ID;
2936 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2937 mpi_request->EventMasks[i] =
2938 le32_to_cpu(ioc->event_masks[i]);
2939 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
2940 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
2941 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2942 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2943 ioc->name, __func__);
2944 _debug_dump_mf(mpi_request,
2945 sizeof(Mpi2EventNotificationRequest_t)/4);
2946 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2947 r = -EFAULT;
2948 else
2949 r = -ETIME;
2950 } else
2951 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2952 ioc->name, __func__));
2953 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2954 return r;
2955 }
2956
2957 /**
2958 * mpt2sas_base_validate_event_type - validating event types
2959 * @ioc: per adapter object
2960 * @event: firmware event
2961 *
2962 * This will turn on firmware event notification when application
2963 * ask for that event. We don't mask events that are already enabled.
2964 */
2965 void
2966 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
2967 {
2968 int i, j;
2969 u32 event_mask, desired_event;
2970 u8 send_update_to_fw;
2971
2972 for (i = 0, send_update_to_fw = 0; i <
2973 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
2974 event_mask = ~event_type[i];
2975 desired_event = 1;
2976 for (j = 0; j < 32; j++) {
2977 if (!(event_mask & desired_event) &&
2978 (ioc->event_masks[i] & desired_event)) {
2979 ioc->event_masks[i] &= ~desired_event;
2980 send_update_to_fw = 1;
2981 }
2982 desired_event = (desired_event << 1);
2983 }
2984 }
2985
2986 if (!send_update_to_fw)
2987 return;
2988
2989 mutex_lock(&ioc->base_cmds.mutex);
2990 _base_event_notification(ioc, 0, CAN_SLEEP);
2991 mutex_unlock(&ioc->base_cmds.mutex);
2992 }
2993
2994 /**
2995 * _base_diag_reset - the "big hammer" start of day reset
2996 * @ioc: per adapter object
2997 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2998 *
2999 * Returns 0 for success, non-zero for failure.
3000 */
3001 static int
3002 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3003 {
3004 u32 host_diagnostic;
3005 u32 ioc_state;
3006 u32 count;
3007 u32 hcb_size;
3008
3009 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3010
3011 _base_save_msix_table(ioc);
3012
3013 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
3014 ioc->name));
3015 writel(0, &ioc->chip->HostInterruptStatus);
3016
3017 count = 0;
3018 do {
3019 /* Write magic sequence to WriteSequence register
3020 * Loop until in diagnostic mode
3021 */
3022 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
3023 "sequence\n", ioc->name));
3024 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3025 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3026 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3027 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3028 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3029 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3030 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3031
3032 /* wait 100 msec */
3033 if (sleep_flag == CAN_SLEEP)
3034 msleep(100);
3035 else
3036 mdelay(100);
3037
3038 if (count++ > 20)
3039 goto out;
3040
3041 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3042 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
3043 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3044 ioc->name, count, host_diagnostic));
3045
3046 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3047
3048 hcb_size = readl(&ioc->chip->HCBSize);
3049
3050 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
3051 ioc->name));
3052 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3053 &ioc->chip->HostDiagnostic);
3054
3055 /* don't access any registers for 50 milliseconds */
3056 msleep(50);
3057
3058 /* 300 second max wait */
3059 for (count = 0; count < 3000000 ; count++) {
3060
3061 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3062
3063 if (host_diagnostic == 0xFFFFFFFF)
3064 goto out;
3065 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3066 break;
3067
3068 /* wait 100 msec */
3069 if (sleep_flag == CAN_SLEEP)
3070 msleep(1);
3071 else
3072 mdelay(1);
3073 }
3074
3075 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3076
3077 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
3078 "assuming the HCB Address points to good F/W\n",
3079 ioc->name));
3080 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3081 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3082 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3083
3084 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3085 "re-enable the HCDW\n", ioc->name));
3086 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3087 &ioc->chip->HCBSize);
3088 }
3089
3090 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
3091 ioc->name));
3092 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3093 &ioc->chip->HostDiagnostic);
3094
3095 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
3096 "diagnostic register\n", ioc->name));
3097 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3098
3099 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
3100 "READY state\n", ioc->name));
3101 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3102 sleep_flag);
3103 if (ioc_state) {
3104 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3105 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3106 goto out;
3107 }
3108
3109 _base_restore_msix_table(ioc);
3110 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3111 return 0;
3112
3113 out:
3114 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3115 return -EFAULT;
3116 }
3117
3118 /**
3119 * _base_make_ioc_ready - put controller in READY state
3120 * @ioc: per adapter object
3121 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3122 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3123 *
3124 * Returns 0 for success, non-zero for failure.
3125 */
3126 static int
3127 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3128 enum reset_type type)
3129 {
3130 u32 ioc_state;
3131
3132 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3133 __func__));
3134
3135 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3136 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3137 ioc->name, __func__, ioc_state));
3138
3139 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3140 return 0;
3141
3142 if (ioc_state & MPI2_DOORBELL_USED) {
3143 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3144 "active!\n", ioc->name));
3145 goto issue_diag_reset;
3146 }
3147
3148 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3149 mpt2sas_base_fault_info(ioc, ioc_state &
3150 MPI2_DOORBELL_DATA_MASK);
3151 goto issue_diag_reset;
3152 }
3153
3154 if (type == FORCE_BIG_HAMMER)
3155 goto issue_diag_reset;
3156
3157 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3158 if (!(_base_send_ioc_reset(ioc,
3159 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3160 return 0;
3161
3162 issue_diag_reset:
3163 return _base_diag_reset(ioc, CAN_SLEEP);
3164 }
3165
3166 /**
3167 * _base_make_ioc_operational - put controller in OPERATIONAL state
3168 * @ioc: per adapter object
3169 * @VF_ID: virtual function id
3170 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3171 *
3172 * Returns 0 for success, non-zero for failure.
3173 */
3174 static int
3175 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3176 int sleep_flag)
3177 {
3178 int r, i;
3179 unsigned long flags;
3180 u32 reply_address;
3181
3182 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3183 __func__));
3184
3185 /* initialize the scsi lookup free list */
3186 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3187 INIT_LIST_HEAD(&ioc->free_list);
3188 for (i = 0; i < ioc->request_depth; i++) {
3189 ioc->scsi_lookup[i].cb_idx = 0xFF;
3190 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3191 &ioc->free_list);
3192 }
3193 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3194
3195 /* initialize Reply Free Queue */
3196 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3197 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3198 ioc->reply_sz)
3199 ioc->reply_free[i] = cpu_to_le32(reply_address);
3200
3201 /* initialize Reply Post Free Queue */
3202 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3203 ioc->reply_post_free[i].Words = ULLONG_MAX;
3204
3205 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
3206 if (r)
3207 return r;
3208
3209 /* initialize the index's */
3210 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3211 ioc->reply_post_host_index = 0;
3212 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3213 writel(0, &ioc->chip->ReplyPostHostIndex);
3214
3215 _base_unmask_interrupts(ioc);
3216 r = _base_event_notification(ioc, VF_ID, sleep_flag);
3217 if (r)
3218 return r;
3219
3220 if (sleep_flag == CAN_SLEEP)
3221 _base_static_config_pages(ioc);
3222
3223 r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
3224 if (r)
3225 return r;
3226
3227 return r;
3228 }
3229
3230 /**
3231 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3232 * @ioc: per adapter object
3233 *
3234 * Return nothing.
3235 */
3236 void
3237 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3238 {
3239 struct pci_dev *pdev = ioc->pdev;
3240
3241 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3242 __func__));
3243
3244 _base_mask_interrupts(ioc);
3245 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3246 if (ioc->pci_irq) {
3247 synchronize_irq(pdev->irq);
3248 free_irq(ioc->pci_irq, ioc);
3249 }
3250 _base_disable_msix(ioc);
3251 if (ioc->chip_phys)
3252 iounmap(ioc->chip);
3253 ioc->pci_irq = -1;
3254 ioc->chip_phys = 0;
3255 pci_release_selected_regions(ioc->pdev, ioc->bars);
3256 pci_disable_device(pdev);
3257 return;
3258 }
3259
3260 /**
3261 * mpt2sas_base_attach - attach controller instance
3262 * @ioc: per adapter object
3263 *
3264 * Returns 0 for success, non-zero for failure.
3265 */
3266 int
3267 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3268 {
3269 int r, i;
3270
3271 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3272 __func__));
3273
3274 r = mpt2sas_base_map_resources(ioc);
3275 if (r)
3276 return r;
3277
3278 pci_set_drvdata(ioc->pdev, ioc->shost);
3279 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3280 if (r)
3281 goto out_free_resources;
3282
3283 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3284 if (r)
3285 goto out_free_resources;
3286
3287 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3288 if (r)
3289 goto out_free_resources;
3290
3291 init_waitqueue_head(&ioc->reset_wq);
3292
3293 /* base internal command bits */
3294 mutex_init(&ioc->base_cmds.mutex);
3295 init_completion(&ioc->base_cmds.done);
3296 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3297 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3298
3299 /* transport internal command bits */
3300 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3301 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3302 mutex_init(&ioc->transport_cmds.mutex);
3303 init_completion(&ioc->transport_cmds.done);
3304
3305 /* task management internal command bits */
3306 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3307 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3308 mutex_init(&ioc->tm_cmds.mutex);
3309 init_completion(&ioc->tm_cmds.done);
3310
3311 /* config page internal command bits */
3312 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3313 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3314 mutex_init(&ioc->config_cmds.mutex);
3315 init_completion(&ioc->config_cmds.done);
3316
3317 /* ctl module internal command bits */
3318 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3319 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3320 mutex_init(&ioc->ctl_cmds.mutex);
3321 init_completion(&ioc->ctl_cmds.done);
3322
3323 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3324 ioc->event_masks[i] = -1;
3325
3326 /* here we enable the events we care about */
3327 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3328 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3329 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3330 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3331 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3332 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3333 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3334 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3335 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3336 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3337 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3338
3339 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3340 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3341 if (!ioc->pfacts)
3342 goto out_free_resources;
3343
3344 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3345 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3346 if (r)
3347 goto out_free_resources;
3348 }
3349 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
3350 if (r)
3351 goto out_free_resources;
3352
3353 mpt2sas_base_start_watchdog(ioc);
3354 return 0;
3355
3356 out_free_resources:
3357
3358 ioc->remove_host = 1;
3359 mpt2sas_base_free_resources(ioc);
3360 _base_release_memory_pools(ioc);
3361 pci_set_drvdata(ioc->pdev, NULL);
3362 kfree(ioc->tm_cmds.reply);
3363 kfree(ioc->transport_cmds.reply);
3364 kfree(ioc->config_cmds.reply);
3365 kfree(ioc->base_cmds.reply);
3366 kfree(ioc->ctl_cmds.reply);
3367 kfree(ioc->pfacts);
3368 ioc->ctl_cmds.reply = NULL;
3369 ioc->base_cmds.reply = NULL;
3370 ioc->tm_cmds.reply = NULL;
3371 ioc->transport_cmds.reply = NULL;
3372 ioc->config_cmds.reply = NULL;
3373 ioc->pfacts = NULL;
3374 return r;
3375 }
3376
3377
3378 /**
3379 * mpt2sas_base_detach - remove controller instance
3380 * @ioc: per adapter object
3381 *
3382 * Return nothing.
3383 */
3384 void
3385 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3386 {
3387
3388 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3389 __func__));
3390
3391 mpt2sas_base_stop_watchdog(ioc);
3392 mpt2sas_base_free_resources(ioc);
3393 _base_release_memory_pools(ioc);
3394 pci_set_drvdata(ioc->pdev, NULL);
3395 kfree(ioc->pfacts);
3396 kfree(ioc->ctl_cmds.reply);
3397 kfree(ioc->base_cmds.reply);
3398 kfree(ioc->tm_cmds.reply);
3399 kfree(ioc->transport_cmds.reply);
3400 kfree(ioc->config_cmds.reply);
3401 }
3402
3403 /**
3404 * _base_reset_handler - reset callback handler (for base)
3405 * @ioc: per adapter object
3406 * @reset_phase: phase
3407 *
3408 * The handler for doing any required cleanup or initialization.
3409 *
3410 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3411 * MPT2_IOC_DONE_RESET
3412 *
3413 * Return nothing.
3414 */
3415 static void
3416 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3417 {
3418 switch (reset_phase) {
3419 case MPT2_IOC_PRE_RESET:
3420 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3421 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3422 break;
3423 case MPT2_IOC_AFTER_RESET:
3424 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3425 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3426 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3427 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3428 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3429 complete(&ioc->transport_cmds.done);
3430 }
3431 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3432 ioc->base_cmds.status |= MPT2_CMD_RESET;
3433 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3434 complete(&ioc->base_cmds.done);
3435 }
3436 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3437 ioc->config_cmds.status |= MPT2_CMD_RESET;
3438 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3439 complete(&ioc->config_cmds.done);
3440 }
3441 break;
3442 case MPT2_IOC_DONE_RESET:
3443 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3444 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3445 break;
3446 }
3447 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3448 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3449 }
3450
3451 /**
3452 * _wait_for_commands_to_complete - reset controller
3453 * @ioc: Pointer to MPT_ADAPTER structure
3454 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3455 *
3456 * This function waiting(3s) for all pending commands to complete
3457 * prior to putting controller in reset.
3458 */
3459 static void
3460 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3461 {
3462 u32 ioc_state;
3463 unsigned long flags;
3464 u16 i;
3465
3466 ioc->pending_io_count = 0;
3467 if (sleep_flag != CAN_SLEEP)
3468 return;
3469
3470 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3471 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3472 return;
3473
3474 /* pending command count */
3475 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3476 for (i = 0; i < ioc->request_depth; i++)
3477 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3478 ioc->pending_io_count++;
3479 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3480
3481 if (!ioc->pending_io_count)
3482 return;
3483
3484 /* wait for pending commands to complete */
3485 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3486 }
3487
3488 /**
3489 * mpt2sas_base_hard_reset_handler - reset controller
3490 * @ioc: Pointer to MPT_ADAPTER structure
3491 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3492 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3493 *
3494 * Returns 0 for success, non-zero for failure.
3495 */
3496 int
3497 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3498 enum reset_type type)
3499 {
3500 int r, i;
3501 unsigned long flags;
3502
3503 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3504 __func__));
3505
3506 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3507 if (ioc->shost_recovery) {
3508 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3509 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3510 ioc->name, __func__);
3511 return -EBUSY;
3512 }
3513 ioc->shost_recovery = 1;
3514 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3515
3516 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3517 _wait_for_commands_to_complete(ioc, sleep_flag);
3518 _base_mask_interrupts(ioc);
3519 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3520 if (r)
3521 goto out;
3522 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3523 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
3524 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
3525 sleep_flag);
3526 if (!r)
3527 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3528 out:
3529 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3530 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3531
3532 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3533 ioc->shost_recovery = 0;
3534 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3535
3536 if (!r)
3537 _base_reset_handler(ioc, MPT2_IOC_RUNNING);
3538 return r;
3539 }
3540
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