1 /*
2 * ipr.h -- driver for IBM Power Linux RAID adapters
3 *
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
5 *
6 * Copyright (C) 2003, 2004 IBM Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
24 */
25
26 #ifndef _IPR_H
27 #define _IPR_H
28
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
35
36 /*
37 * Literals
38 */
39 #define IPR_DRIVER_VERSION "2.0.12"
40 #define IPR_DRIVER_DATE "(December 14, 2004)"
41
42 /*
43 * IPR_DBG_TRACE: Setting this to 1 will turn on some general function tracing
44 * resulting in a bunch of extra debugging printks to the console
45 *
46 * IPR_DEBUG: Setting this to 1 will turn on some error path tracing.
47 * Enables the ipr_trace macro.
48 */
49 #ifdef IPR_DEBUG_ALL
50 #define IPR_DEBUG 1
51 #define IPR_DBG_TRACE 1
52 #else
53 #define IPR_DEBUG 0
54 #define IPR_DBG_TRACE 0
55 #endif
56
57 /*
58 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
59 * ops per device for devices not running tagged command queuing.
60 * This can be adjusted at runtime through sysfs device attributes.
61 */
62 #define IPR_MAX_CMD_PER_LUN 6
63
64 /*
65 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
66 * ops the mid-layer can send to the adapter.
67 */
68 #define IPR_NUM_BASE_CMD_BLKS 100
69
70 #define IPR_SUBS_DEV_ID_2780 0x0264
71 #define IPR_SUBS_DEV_ID_5702 0x0266
72 #define IPR_SUBS_DEV_ID_5703 0x0278
73 #define IPR_SUBS_DEV_ID_572E 0x02D3
74 #define IPR_SUBS_DEV_ID_573D 0x02D4
75 #define IPR_SUBS_DEV_ID_570F 0x02BD
76 #define IPR_SUBS_DEV_ID_571B 0x02BE
77
78 #define IPR_NAME "ipr"
79
80 /*
81 * Return codes
82 */
83 #define IPR_RC_JOB_CONTINUE 1
84 #define IPR_RC_JOB_RETURN 2
85
86 /*
87 * IOASCs
88 */
89 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
90 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
91 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
92 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
93 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
94 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
95 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
96 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
97 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
98 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
99 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
100
101 #define IPR_FIRST_DRIVER_IOASC 0x10000000
102 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
103 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
104
105 #define IPR_NUM_LOG_HCAMS 2
106 #define IPR_NUM_CFG_CHG_HCAMS 2
107 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
108 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
109 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
110 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
111 #define IPR_VSET_BUS 0xff
112 #define IPR_IOA_BUS 0xff
113 #define IPR_IOA_TARGET 0xff
114 #define IPR_IOA_LUN 0xff
115 #define IPR_MAX_NUM_BUSES 4
116 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
117
118 #define IPR_NUM_RESET_RELOAD_RETRIES 3
119
120 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
121 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
122 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
123
124 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
125 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
126 IPR_NUM_INTERNAL_CMD_BLKS)
127
128 #define IPR_MAX_PHYSICAL_DEVS 192
129
130 #define IPR_MAX_SGLIST 64
131 #define IPR_MAX_SECTORS 512
132 #define IPR_MAX_CDB_LEN 16
133
134 #define IPR_DEFAULT_BUS_WIDTH 16
135 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
136 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
137 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
138 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
139
140 #define IPR_IOA_RES_HANDLE 0xffffffff
141 #define IPR_IOA_RES_ADDR 0x00ffffff
142
143 /*
144 * Adapter Commands
145 */
146 #define IPR_QUERY_RSRC_STATE 0xC2
147 #define IPR_RESET_DEVICE 0xC3
148 #define IPR_RESET_TYPE_SELECT 0x80
149 #define IPR_LUN_RESET 0x40
150 #define IPR_TARGET_RESET 0x20
151 #define IPR_BUS_RESET 0x10
152 #define IPR_ID_HOST_RR_Q 0xC4
153 #define IPR_QUERY_IOA_CONFIG 0xC5
154 #define IPR_CANCEL_ALL_REQUESTS 0xCE
155 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
156 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
157 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
158 #define IPR_SET_SUPPORTED_DEVICES 0xFB
159 #define IPR_IOA_SHUTDOWN 0xF7
160 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
161
162 /*
163 * Timeouts
164 */
165 #define IPR_SHUTDOWN_TIMEOUT (10 * 60 * HZ)
166 #define IPR_VSET_RW_TIMEOUT (2 * 60 * HZ)
167 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
168 #define IPR_DEVICE_RESET_TIMEOUT (30 * HZ)
169 #define IPR_CANCEL_ALL_TIMEOUT (30 * HZ)
170 #define IPR_ABORT_TASK_TIMEOUT (30 * HZ)
171 #define IPR_INTERNAL_TIMEOUT (30 * HZ)
172 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
173 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
174 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
175 #define IPR_OPERATIONAL_TIMEOUT (5 * 60 * HZ)
176 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
177 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
178 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
179 #define IPR_DUMP_TIMEOUT (15 * HZ)
180
181 /*
182 * SCSI Literals
183 */
184 #define IPR_VENDOR_ID_LEN 8
185 #define IPR_PROD_ID_LEN 16
186 #define IPR_SERIAL_NUM_LEN 8
187
188 /*
189 * Hardware literals
190 */
191 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
192 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
193 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
194 #define IPR_GET_FMT2_BAR_SEL(mbx) \
195 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
196 #define IPR_SDT_FMT2_BAR0_SEL 0x0
197 #define IPR_SDT_FMT2_BAR1_SEL 0x1
198 #define IPR_SDT_FMT2_BAR2_SEL 0x2
199 #define IPR_SDT_FMT2_BAR3_SEL 0x3
200 #define IPR_SDT_FMT2_BAR4_SEL 0x4
201 #define IPR_SDT_FMT2_BAR5_SEL 0x5
202 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
203 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
204 #define IPR_DOORBELL 0x82800000
205
206 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
207 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
208 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
209 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
210 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
211 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
212 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
213 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
214 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
215 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
216 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
217
218 #define IPR_PCII_ERROR_INTERRUPTS \
219 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
220 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
221
222 #define IPR_PCII_OPER_INTERRUPTS \
223 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
224
225 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
226 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
227
228 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
229 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
230
231 /*
232 * Dump literals
233 */
234 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
235 #define IPR_NUM_SDT_ENTRIES 511
236 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
237
238 /*
239 * Misc literals
240 */
241 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
242
243 /*
244 * Adapter interface types
245 */
246
247 struct ipr_res_addr {
248 u8 reserved;
249 u8 bus;
250 u8 target;
251 u8 lun;
252 #define IPR_GET_PHYS_LOC(res_addr) \
253 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
254 }__attribute__((packed, aligned (4)));
255
256 struct ipr_std_inq_vpids {
257 u8 vendor_id[IPR_VENDOR_ID_LEN];
258 u8 product_id[IPR_PROD_ID_LEN];
259 }__attribute__((packed));
260
261 struct ipr_std_inq_data {
262 u8 peri_qual_dev_type;
263 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
264 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
265
266 u8 removeable_medium_rsvd;
267 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
268
269 #define IPR_IS_DASD_DEVICE(std_inq) \
270 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
271 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
272
273 #define IPR_IS_SES_DEVICE(std_inq) \
274 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
275
276 u8 version;
277 u8 aen_naca_fmt;
278 u8 additional_len;
279 u8 sccs_rsvd;
280 u8 bq_enc_multi;
281 u8 sync_cmdq_flags;
282
283 struct ipr_std_inq_vpids vpids;
284
285 u8 ros_rsvd_ram_rsvd[4];
286
287 u8 serial_num[IPR_SERIAL_NUM_LEN];
288 }__attribute__ ((packed));
289
290 struct ipr_config_table_entry {
291 u8 service_level;
292 u8 array_id;
293 u8 flags;
294 #define IPR_IS_IOA_RESOURCE 0x80
295 #define IPR_IS_ARRAY_MEMBER 0x20
296 #define IPR_IS_HOT_SPARE 0x10
297
298 u8 rsvd_subtype;
299 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
300 #define IPR_SUBTYPE_AF_DASD 0
301 #define IPR_SUBTYPE_GENERIC_SCSI 1
302 #define IPR_SUBTYPE_VOLUME_SET 2
303
304 struct ipr_res_addr res_addr;
305 u32 res_handle;
306 u32 reserved4[2];
307 struct ipr_std_inq_data std_inq_data;
308 }__attribute__ ((packed, aligned (4)));
309
310 struct ipr_config_table_hdr {
311 u8 num_entries;
312 u8 flags;
313 #define IPR_UCODE_DOWNLOAD_REQ 0x10
314 u16 reserved;
315 }__attribute__((packed, aligned (4)));
316
317 struct ipr_config_table {
318 struct ipr_config_table_hdr hdr;
319 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
320 }__attribute__((packed, aligned (4)));
321
322 struct ipr_hostrcb_cfg_ch_not {
323 struct ipr_config_table_entry cfgte;
324 u8 reserved[936];
325 }__attribute__((packed, aligned (4)));
326
327 struct ipr_supported_device {
328 u16 data_length;
329 u8 reserved;
330 u8 num_records;
331 struct ipr_std_inq_vpids vpids;
332 u8 reserved2[16];
333 }__attribute__((packed, aligned (4)));
334
335 /* Command packet structure */
336 struct ipr_cmd_pkt {
337 u16 reserved; /* Reserved by IOA */
338 u8 request_type;
339 #define IPR_RQTYPE_SCSICDB 0x00
340 #define IPR_RQTYPE_IOACMD 0x01
341 #define IPR_RQTYPE_HCAM 0x02
342
343 u8 luntar_luntrn;
344
345 u8 flags_hi;
346 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
347 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
348 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
349 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
350 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
351
352 u8 flags_lo;
353 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
354 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
355 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
356 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
357 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
358 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
359 #define IPR_FLAGS_LO_ACA_TASK 0x08
360
361 u8 cdb[16];
362 u16 timeout;
363 }__attribute__ ((packed, aligned(4)));
364
365 /* IOA Request Control Block 128 bytes */
366 struct ipr_ioarcb {
367 u32 ioarcb_host_pci_addr;
368 u32 reserved;
369 u32 res_handle;
370 u32 host_response_handle;
371 u32 reserved1;
372 u32 reserved2;
373 u32 reserved3;
374
375 u32 write_data_transfer_length;
376 u32 read_data_transfer_length;
377 u32 write_ioadl_addr;
378 u32 write_ioadl_len;
379 u32 read_ioadl_addr;
380 u32 read_ioadl_len;
381
382 u32 ioasa_host_pci_addr;
383 u16 ioasa_len;
384 u16 reserved4;
385
386 struct ipr_cmd_pkt cmd_pkt;
387
388 u32 add_cmd_parms_len;
389 u32 add_cmd_parms[10];
390 }__attribute__((packed, aligned (4)));
391
392 struct ipr_ioadl_desc {
393 u32 flags_and_data_len;
394 #define IPR_IOADL_FLAGS_MASK 0xff000000
395 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
396 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
397 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
398 #define IPR_IOADL_FLAGS_READ 0x48000000
399 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
400 #define IPR_IOADL_FLAGS_WRITE 0x68000000
401 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
402 #define IPR_IOADL_FLAGS_LAST 0x01000000
403
404 u32 address;
405 }__attribute__((packed, aligned (8)));
406
407 struct ipr_ioasa_vset {
408 u32 failing_lba_hi;
409 u32 failing_lba_lo;
410 u32 ioa_data[22];
411 }__attribute__((packed, aligned (4)));
412
413 struct ipr_ioasa_af_dasd {
414 u32 failing_lba;
415 }__attribute__((packed, aligned (4)));
416
417 struct ipr_ioasa_gpdd {
418 u8 end_state;
419 u8 bus_phase;
420 u16 reserved;
421 u32 ioa_data[23];
422 }__attribute__((packed, aligned (4)));
423
424 struct ipr_ioasa_raw {
425 u32 ioa_data[24];
426 }__attribute__((packed, aligned (4)));
427
428 struct ipr_ioasa {
429 u32 ioasc;
430 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
431 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
432 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
433 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
434
435 u16 ret_stat_len; /* Length of the returned IOASA */
436
437 u16 avail_stat_len; /* Total Length of status available. */
438
439 u32 residual_data_len; /* number of bytes in the host data */
440 /* buffers that were not used by the IOARCB command. */
441
442 u32 ilid;
443 #define IPR_NO_ILID 0
444 #define IPR_DRIVER_ILID 0xffffffff
445
446 u32 fd_ioasc;
447
448 u32 fd_phys_locator;
449
450 u32 fd_res_handle;
451
452 u32 ioasc_specific; /* status code specific field */
453 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
454 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
455 #define IPR_FIELD_POINTER_MASK 0x0000ffff
456
457 union {
458 struct ipr_ioasa_vset vset;
459 struct ipr_ioasa_af_dasd dasd;
460 struct ipr_ioasa_gpdd gpdd;
461 struct ipr_ioasa_raw raw;
462 } u;
463 }__attribute__((packed, aligned (4)));
464
465 struct ipr_mode_parm_hdr {
466 u8 length;
467 u8 medium_type;
468 u8 device_spec_parms;
469 u8 block_desc_len;
470 }__attribute__((packed));
471
472 struct ipr_mode_pages {
473 struct ipr_mode_parm_hdr hdr;
474 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
475 }__attribute__((packed));
476
477 struct ipr_mode_page_hdr {
478 u8 ps_page_code;
479 #define IPR_MODE_PAGE_PS 0x80
480 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
481 u8 page_length;
482 }__attribute__ ((packed));
483
484 struct ipr_dev_bus_entry {
485 struct ipr_res_addr res_addr;
486 u8 flags;
487 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
488 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
489 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
490 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
491 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
492 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
493 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
494
495 u8 scsi_id;
496 u8 bus_width;
497 u8 extended_reset_delay;
498 #define IPR_EXTENDED_RESET_DELAY 7
499
500 u32 max_xfer_rate;
501
502 u8 spinup_delay;
503 u8 reserved3;
504 u16 reserved4;
505 }__attribute__((packed, aligned (4)));
506
507 struct ipr_mode_page28 {
508 struct ipr_mode_page_hdr hdr;
509 u8 num_entries;
510 u8 entry_length;
511 struct ipr_dev_bus_entry bus[0];
512 }__attribute__((packed));
513
514 struct ipr_ioa_vpd {
515 struct ipr_std_inq_data std_inq_data;
516 u8 ascii_part_num[12];
517 u8 reserved[40];
518 u8 ascii_plant_code[4];
519 }__attribute__((packed));
520
521 struct ipr_inquiry_page3 {
522 u8 peri_qual_dev_type;
523 u8 page_code;
524 u8 reserved1;
525 u8 page_length;
526 u8 ascii_len;
527 u8 reserved2[3];
528 u8 load_id[4];
529 u8 major_release;
530 u8 card_type;
531 u8 minor_release[2];
532 u8 ptf_number[4];
533 u8 patch_number[4];
534 }__attribute__((packed));
535
536 struct ipr_hostrcb_device_data_entry {
537 struct ipr_std_inq_vpids dev_vpids;
538 u8 dev_sn[IPR_SERIAL_NUM_LEN];
539 struct ipr_res_addr dev_res_addr;
540 struct ipr_std_inq_vpids new_dev_vpids;
541 u8 new_dev_sn[IPR_SERIAL_NUM_LEN];
542 struct ipr_std_inq_vpids ioa_last_with_dev_vpids;
543 u8 ioa_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
544 struct ipr_std_inq_vpids cfc_last_with_dev_vpids;
545 u8 cfc_last_with_dev_sn[IPR_SERIAL_NUM_LEN];
546 u32 ioa_data[5];
547 }__attribute__((packed, aligned (4)));
548
549 struct ipr_hostrcb_array_data_entry {
550 struct ipr_std_inq_vpids vpids;
551 u8 serial_num[IPR_SERIAL_NUM_LEN];
552 struct ipr_res_addr expected_dev_res_addr;
553 struct ipr_res_addr dev_res_addr;
554 }__attribute__((packed, aligned (4)));
555
556 struct ipr_hostrcb_type_ff_error {
557 u32 ioa_data[246];
558 }__attribute__((packed, aligned (4)));
559
560 struct ipr_hostrcb_type_01_error {
561 u32 seek_counter;
562 u32 read_counter;
563 u8 sense_data[32];
564 u32 ioa_data[236];
565 }__attribute__((packed, aligned (4)));
566
567 struct ipr_hostrcb_type_02_error {
568 struct ipr_std_inq_vpids ioa_vpids;
569 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
570 struct ipr_std_inq_vpids cfc_vpids;
571 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
572 struct ipr_std_inq_vpids ioa_last_attached_to_cfc_vpids;
573 u8 ioa_last_attached_to_cfc_sn[IPR_SERIAL_NUM_LEN];
574 struct ipr_std_inq_vpids cfc_last_attached_to_ioa_vpids;
575 u8 cfc_last_attached_to_ioa_sn[IPR_SERIAL_NUM_LEN];
576 u32 ioa_data[3];
577 u8 reserved[844];
578 }__attribute__((packed, aligned (4)));
579
580 struct ipr_hostrcb_type_03_error {
581 struct ipr_std_inq_vpids ioa_vpids;
582 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
583 struct ipr_std_inq_vpids cfc_vpids;
584 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
585 u32 errors_detected;
586 u32 errors_logged;
587 u8 ioa_data[12];
588 struct ipr_hostrcb_device_data_entry dev_entry[3];
589 u8 reserved[444];
590 }__attribute__((packed, aligned (4)));
591
592 struct ipr_hostrcb_type_04_error {
593 struct ipr_std_inq_vpids ioa_vpids;
594 u8 ioa_sn[IPR_SERIAL_NUM_LEN];
595 struct ipr_std_inq_vpids cfc_vpids;
596 u8 cfc_sn[IPR_SERIAL_NUM_LEN];
597 u8 ioa_data[12];
598 struct ipr_hostrcb_array_data_entry array_member[10];
599 u32 exposed_mode_adn;
600 u32 array_id;
601 struct ipr_std_inq_vpids incomp_dev_vpids;
602 u8 incomp_dev_sn[IPR_SERIAL_NUM_LEN];
603 u32 ioa_data2;
604 struct ipr_hostrcb_array_data_entry array_member2[8];
605 struct ipr_res_addr last_func_vset_res_addr;
606 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
607 u8 protection_level[8];
608 u8 reserved[124];
609 }__attribute__((packed, aligned (4)));
610
611 struct ipr_hostrcb_error {
612 u32 failing_dev_ioasc;
613 struct ipr_res_addr failing_dev_res_addr;
614 u32 failing_dev_res_handle;
615 u32 prc;
616 union {
617 struct ipr_hostrcb_type_ff_error type_ff_error;
618 struct ipr_hostrcb_type_01_error type_01_error;
619 struct ipr_hostrcb_type_02_error type_02_error;
620 struct ipr_hostrcb_type_03_error type_03_error;
621 struct ipr_hostrcb_type_04_error type_04_error;
622 } u;
623 }__attribute__((packed, aligned (4)));
624
625 struct ipr_hostrcb_raw {
626 u32 data[sizeof(struct ipr_hostrcb_error)/sizeof(u32)];
627 }__attribute__((packed, aligned (4)));
628
629 struct ipr_hcam {
630 u8 op_code;
631 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
632 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
633
634 u8 notify_type;
635 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
636 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
637 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
638 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
639 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
640
641 u8 notifications_lost;
642 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
643 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
644
645 u8 flags;
646 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
647 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
648
649 u8 overlay_id;
650 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
651 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
652 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
653 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
654 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
655 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
656
657 u8 reserved1[3];
658 u32 ilid;
659 u32 time_since_last_ioa_reset;
660 u32 reserved2;
661 u32 length;
662
663 union {
664 struct ipr_hostrcb_error error;
665 struct ipr_hostrcb_cfg_ch_not ccn;
666 struct ipr_hostrcb_raw raw;
667 } u;
668 }__attribute__((packed, aligned (4)));
669
670 struct ipr_hostrcb {
671 struct ipr_hcam hcam;
672 dma_addr_t hostrcb_dma;
673 struct list_head queue;
674 };
675
676 /* IPR smart dump table structures */
677 struct ipr_sdt_entry {
678 u32 bar_str_offset;
679 u32 end_offset;
680 u8 entry_byte;
681 u8 reserved[3];
682
683 u8 flags;
684 #define IPR_SDT_ENDIAN 0x80
685 #define IPR_SDT_VALID_ENTRY 0x20
686
687 u8 resv;
688 u16 priority;
689 }__attribute__((packed, aligned (4)));
690
691 struct ipr_sdt_header {
692 u32 state;
693 u32 num_entries;
694 u32 num_entries_used;
695 u32 dump_size;
696 }__attribute__((packed, aligned (4)));
697
698 struct ipr_sdt {
699 struct ipr_sdt_header hdr;
700 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
701 }__attribute__((packed, aligned (4)));
702
703 struct ipr_uc_sdt {
704 struct ipr_sdt_header hdr;
705 struct ipr_sdt_entry entry[1];
706 }__attribute__((packed, aligned (4)));
707
708 /*
709 * Driver types
710 */
711 struct ipr_bus_attributes {
712 u8 bus;
713 u8 qas_enabled;
714 u8 bus_width;
715 u8 reserved;
716 u32 max_xfer_rate;
717 };
718
719 struct ipr_resource_entry {
720 struct ipr_config_table_entry cfgte;
721 u8 needs_sync_complete:1;
722 u8 in_erp:1;
723 u8 add_to_ml:1;
724 u8 del_from_ml:1;
725 u8 resetting_device:1;
726 u8 tcq_active:1;
727
728 int qdepth;
729 struct scsi_device *sdev;
730 struct list_head queue;
731 };
732
733 struct ipr_resource_hdr {
734 u16 num_entries;
735 u16 reserved;
736 };
737
738 struct ipr_resource_table {
739 struct ipr_resource_hdr hdr;
740 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
741 };
742
743 struct ipr_misc_cbs {
744 struct ipr_ioa_vpd ioa_vpd;
745 struct ipr_inquiry_page3 page3_data;
746 struct ipr_mode_pages mode_pages;
747 struct ipr_supported_device supp_dev;
748 };
749
750 struct ipr_interrupt_offsets {
751 unsigned long set_interrupt_mask_reg;
752 unsigned long clr_interrupt_mask_reg;
753 unsigned long sense_interrupt_mask_reg;
754 unsigned long clr_interrupt_reg;
755
756 unsigned long sense_interrupt_reg;
757 unsigned long ioarrin_reg;
758 unsigned long sense_uproc_interrupt_reg;
759 unsigned long set_uproc_interrupt_reg;
760 unsigned long clr_uproc_interrupt_reg;
761 };
762
763 struct ipr_interrupts {
764 void __iomem *set_interrupt_mask_reg;
765 void __iomem *clr_interrupt_mask_reg;
766 void __iomem *sense_interrupt_mask_reg;
767 void __iomem *clr_interrupt_reg;
768
769 void __iomem *sense_interrupt_reg;
770 void __iomem *ioarrin_reg;
771 void __iomem *sense_uproc_interrupt_reg;
772 void __iomem *set_uproc_interrupt_reg;
773 void __iomem *clr_uproc_interrupt_reg;
774 };
775
776 struct ipr_chip_cfg_t {
777 u32 mailbox;
778 u8 cache_line_size;
779 struct ipr_interrupt_offsets regs;
780 };
781
782 enum ipr_shutdown_type {
783 IPR_SHUTDOWN_NORMAL = 0x00,
784 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
785 IPR_SHUTDOWN_ABBREV = 0x80,
786 IPR_SHUTDOWN_NONE = 0x100
787 };
788
789 struct ipr_trace_entry {
790 u32 time;
791
792 u8 op_code;
793 u8 type;
794 #define IPR_TRACE_START 0x00
795 #define IPR_TRACE_FINISH 0xff
796 u16 cmd_index;
797
798 u32 res_handle;
799 union {
800 u32 ioasc;
801 u32 add_data;
802 u32 res_addr;
803 } u;
804 };
805
806 struct ipr_sglist {
807 u32 order;
808 u32 num_sg;
809 u32 buffer_len;
810 struct scatterlist scatterlist[1];
811 };
812
813 enum ipr_sdt_state {
814 INACTIVE,
815 WAIT_FOR_DUMP,
816 GET_DUMP,
817 ABORT_DUMP,
818 DUMP_OBTAINED
819 };
820
821 /* Per-controller data */
822 struct ipr_ioa_cfg {
823 char eye_catcher[8];
824 #define IPR_EYECATCHER "iprcfg"
825
826 struct list_head queue;
827
828 u8 allow_interrupts:1;
829 u8 in_reset_reload:1;
830 u8 in_ioa_bringdown:1;
831 u8 ioa_unit_checked:1;
832 u8 ioa_is_dead:1;
833 u8 dump_taken:1;
834 u8 allow_cmds:1;
835 u8 allow_ml_add_del:1;
836
837 u16 type; /* CCIN of the card */
838
839 u8 log_level;
840 #define IPR_MAX_LOG_LEVEL 4
841 #define IPR_DEFAULT_LOG_LEVEL 2
842
843 #define IPR_NUM_TRACE_INDEX_BITS 8
844 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
845 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
846 char trace_start[8];
847 #define IPR_TRACE_START_LABEL "trace"
848 struct ipr_trace_entry *trace;
849 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
850
851 /*
852 * Queue for free command blocks
853 */
854 char ipr_free_label[8];
855 #define IPR_FREEQ_LABEL "free-q"
856 struct list_head free_q;
857
858 /*
859 * Queue for command blocks outstanding to the adapter
860 */
861 char ipr_pending_label[8];
862 #define IPR_PENDQ_LABEL "pend-q"
863 struct list_head pending_q;
864
865 char cfg_table_start[8];
866 #define IPR_CFG_TBL_START "cfg"
867 struct ipr_config_table *cfg_table;
868 dma_addr_t cfg_table_dma;
869
870 char resource_table_label[8];
871 #define IPR_RES_TABLE_LABEL "res_tbl"
872 struct ipr_resource_entry *res_entries;
873 struct list_head free_res_q;
874 struct list_head used_res_q;
875
876 char ipr_hcam_label[8];
877 #define IPR_HCAM_LABEL "hcams"
878 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
879 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
880 struct list_head hostrcb_free_q;
881 struct list_head hostrcb_pending_q;
882
883 u32 *host_rrq;
884 dma_addr_t host_rrq_dma;
885 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
886 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
887 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
888 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
889 volatile u32 *hrrq_start;
890 volatile u32 *hrrq_end;
891 volatile u32 *hrrq_curr;
892 volatile u32 toggle_bit;
893
894 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
895
896 const struct ipr_chip_cfg_t *chip_cfg;
897
898 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
899 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
900 void __iomem *ioa_mailbox;
901 struct ipr_interrupts regs;
902
903 u16 saved_pcix_cmd_reg;
904 u16 reset_retries;
905
906 u32 errors_logged;
907
908 struct Scsi_Host *host;
909 struct pci_dev *pdev;
910 struct ipr_sglist *ucode_sglist;
911 struct ipr_mode_pages *saved_mode_pages;
912 u8 saved_mode_page_len;
913
914 struct work_struct work_q;
915
916 wait_queue_head_t reset_wait_q;
917
918 struct ipr_dump *dump;
919 enum ipr_sdt_state sdt_state;
920
921 struct ipr_misc_cbs *vpd_cbs;
922 dma_addr_t vpd_cbs_dma;
923
924 struct pci_pool *ipr_cmd_pool;
925
926 struct ipr_cmnd *reset_cmd;
927
928 char ipr_cmd_label[8];
929 #define IPR_CMD_LABEL "ipr_cmnd"
930 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
931 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
932 };
933
934 struct ipr_cmnd {
935 struct ipr_ioarcb ioarcb;
936 struct ipr_ioasa ioasa;
937 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
938 struct list_head queue;
939 struct scsi_cmnd *scsi_cmd;
940 struct completion completion;
941 struct timer_list timer;
942 void (*done) (struct ipr_cmnd *);
943 int (*job_step) (struct ipr_cmnd *);
944 u16 cmd_index;
945 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
946 dma_addr_t sense_buffer_dma;
947 unsigned short dma_use_sg;
948 dma_addr_t dma_handle;
949 struct ipr_cmnd *sibling;
950 union {
951 enum ipr_shutdown_type shutdown_type;
952 struct ipr_hostrcb *hostrcb;
953 unsigned long time_left;
954 unsigned long scratch;
955 struct ipr_resource_entry *res;
956 struct scsi_device *sdev;
957 } u;
958
959 struct ipr_ioa_cfg *ioa_cfg;
960 };
961
962 struct ipr_ses_table_entry {
963 char product_id[17];
964 char compare_product_id_byte[17];
965 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
966 };
967
968 struct ipr_dump_header {
969 u32 eye_catcher;
970 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
971 u32 len;
972 u32 num_entries;
973 u32 first_entry_offset;
974 u32 status;
975 #define IPR_DUMP_STATUS_SUCCESS 0
976 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
977 #define IPR_DUMP_STATUS_FAILED 0xffffffff
978 u32 os;
979 #define IPR_DUMP_OS_LINUX 0x4C4E5558
980 u32 driver_name;
981 #define IPR_DUMP_DRIVER_NAME 0x49505232
982 }__attribute__((packed, aligned (4)));
983
984 struct ipr_dump_entry_header {
985 u32 eye_catcher;
986 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
987 u32 len;
988 u32 num_elems;
989 u32 offset;
990 u32 data_type;
991 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
992 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
993 u32 id;
994 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
995 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
996 #define IPR_DUMP_TRACE_ID 0x54524143
997 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
998 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
999 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
1000 #define IPR_DUMP_PEND_OPS 0x414F5053
1001 u32 status;
1002 }__attribute__((packed, aligned (4)));
1003
1004 struct ipr_dump_location_entry {
1005 struct ipr_dump_entry_header hdr;
1006 u8 location[BUS_ID_SIZE];
1007 }__attribute__((packed));
1008
1009 struct ipr_dump_trace_entry {
1010 struct ipr_dump_entry_header hdr;
1011 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1012 }__attribute__((packed, aligned (4)));
1013
1014 struct ipr_dump_version_entry {
1015 struct ipr_dump_entry_header hdr;
1016 u8 version[sizeof(IPR_DRIVER_VERSION)];
1017 };
1018
1019 struct ipr_dump_ioa_type_entry {
1020 struct ipr_dump_entry_header hdr;
1021 u32 type;
1022 u32 fw_version;
1023 };
1024
1025 struct ipr_driver_dump {
1026 struct ipr_dump_header hdr;
1027 struct ipr_dump_version_entry version_entry;
1028 struct ipr_dump_location_entry location_entry;
1029 struct ipr_dump_ioa_type_entry ioa_type_entry;
1030 struct ipr_dump_trace_entry trace_entry;
1031 }__attribute__((packed));
1032
1033 struct ipr_ioa_dump {
1034 struct ipr_dump_entry_header hdr;
1035 struct ipr_sdt sdt;
1036 u32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1037 u32 reserved;
1038 u32 next_page_index;
1039 u32 page_offset;
1040 u32 format;
1041 #define IPR_SDT_FMT2 2
1042 #define IPR_SDT_UNKNOWN 3
1043 }__attribute__((packed, aligned (4)));
1044
1045 struct ipr_dump {
1046 struct kref kref;
1047 struct ipr_ioa_cfg *ioa_cfg;
1048 struct ipr_driver_dump driver_dump;
1049 struct ipr_ioa_dump ioa_dump;
1050 };
1051
1052 struct ipr_error_table_t {
1053 u32 ioasc;
1054 int log_ioasa;
1055 int log_hcam;
1056 char *error;
1057 };
1058
1059 struct ipr_software_inq_lid_info {
1060 u32 load_id;
1061 u32 timestamp[3];
1062 }__attribute__((packed, aligned (4)));
1063
1064 struct ipr_ucode_image_header {
1065 u32 header_length;
1066 u32 lid_table_offset;
1067 u8 major_release;
1068 u8 card_type;
1069 u8 minor_release[2];
1070 u8 reserved[20];
1071 char eyecatcher[16];
1072 u32 num_lids;
1073 struct ipr_software_inq_lid_info lid[1];
1074 }__attribute__((packed, aligned (4)));
1075
1076 /*
1077 * Macros
1078 */
1079 #if IPR_DEBUG
1080 #define IPR_DBG_CMD(CMD) do { CMD; } while (0)
1081 #else
1082 #define IPR_DBG_CMD(CMD)
1083 #endif
1084
1085 #ifdef CONFIG_SCSI_IPR_TRACE
1086 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1087 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1088 #else
1089 #define ipr_create_trace_file(kobj, attr) 0
1090 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1091 #endif
1092
1093 #ifdef CONFIG_SCSI_IPR_DUMP
1094 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1095 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1096 #else
1097 #define ipr_create_dump_file(kobj, attr) 0
1098 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1099 #endif
1100
1101 /*
1102 * Error logging macros
1103 */
1104 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1105 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1106 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1107 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1108 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1109
1110 #define ipr_sdev_printk(level, sdev, fmt, ...) \
1111 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, sdev->host->host_no, \
1112 sdev->channel, sdev->id, sdev->lun, ##__VA_ARGS__)
1113
1114 #define ipr_sdev_err(sdev, fmt, ...) \
1115 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1116
1117 #define ipr_sdev_info(sdev, fmt, ...) \
1118 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1119
1120 #define ipr_sdev_dbg(sdev, fmt, ...) \
1121 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1122
1123 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1124 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1125 res.bus, res.target, res.lun, ##__VA_ARGS__)
1126
1127 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1128 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1129 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1130 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1131
1132 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1133 __FILE__, __FUNCTION__, __LINE__)
1134
1135 #if IPR_DBG_TRACE
1136 #define ENTER printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__)
1137 #define LEAVE printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__)
1138 #else
1139 #define ENTER
1140 #define LEAVE
1141 #endif
1142
1143 #define ipr_err_separator \
1144 ipr_err("----------------------------------------------------------\n")
1145
1146
1147 /*
1148 * Inlines
1149 */
1150
1151 /**
1152 * ipr_is_ioa_resource - Determine if a resource is the IOA
1153 * @res: resource entry struct
1154 *
1155 * Return value:
1156 * 1 if IOA / 0 if not IOA
1157 **/
1158 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1159 {
1160 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1161 }
1162
1163 /**
1164 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1165 * @res: resource entry struct
1166 *
1167 * Return value:
1168 * 1 if AF DASD / 0 if not AF DASD
1169 **/
1170 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1171 {
1172 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1173 !ipr_is_ioa_resource(res) &&
1174 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1175 return 1;
1176 else
1177 return 0;
1178 }
1179
1180 /**
1181 * ipr_is_vset_device - Determine if a resource is a VSET
1182 * @res: resource entry struct
1183 *
1184 * Return value:
1185 * 1 if VSET / 0 if not VSET
1186 **/
1187 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1188 {
1189 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1190 !ipr_is_ioa_resource(res) &&
1191 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1192 return 1;
1193 else
1194 return 0;
1195 }
1196
1197 /**
1198 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1199 * @res: resource entry struct
1200 *
1201 * Return value:
1202 * 1 if GSCSI / 0 if not GSCSI
1203 **/
1204 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1205 {
1206 if (!ipr_is_ioa_resource(res) &&
1207 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1208 return 1;
1209 else
1210 return 0;
1211 }
1212
1213 /**
1214 * ipr_is_device - Determine if resource address is that of a device
1215 * @res_addr: resource address struct
1216 *
1217 * Return value:
1218 * 1 if AF / 0 if not AF
1219 **/
1220 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1221 {
1222 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1223 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1224 return 1;
1225
1226 return 0;
1227 }
1228
1229 /**
1230 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1231 * @sdt_word: SDT address
1232 *
1233 * Return value:
1234 * 1 if format 2 / 0 if not
1235 **/
1236 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1237 {
1238 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1239
1240 switch (bar_sel) {
1241 case IPR_SDT_FMT2_BAR0_SEL:
1242 case IPR_SDT_FMT2_BAR1_SEL:
1243 case IPR_SDT_FMT2_BAR2_SEL:
1244 case IPR_SDT_FMT2_BAR3_SEL:
1245 case IPR_SDT_FMT2_BAR4_SEL:
1246 case IPR_SDT_FMT2_BAR5_SEL:
1247 case IPR_SDT_FMT2_EXP_ROM_SEL:
1248 return 1;
1249 };
1250
1251 return 0;
1252 }
1253
1254 #endif
1255
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