1 #ifndef _AHA152X_H
2 #define _AHA152X_H
3
4 /*
5 * $Id: aha152x.h,v 2.7 2004/01/24 11:39:03 fischer Exp $
6 */
7
8 /* number of queueable commands
9 (unless we support more than 1 cmd_per_lun this should do) */
10 #define AHA152X_MAXQUEUE 7
11
12 #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 2.7 $"
13
14 /* port addresses */
15 #define SCSISEQ (HOSTIOPORT0+0x00) /* SCSI sequence control */
16 #define SXFRCTL0 (HOSTIOPORT0+0x01) /* SCSI transfer control 0 */
17 #define SXFRCTL1 (HOSTIOPORT0+0x02) /* SCSI transfer control 1 */
18 #define SCSISIG (HOSTIOPORT0+0x03) /* SCSI signal in/out */
19 #define SCSIRATE (HOSTIOPORT0+0x04) /* SCSI rate control */
20 #define SELID (HOSTIOPORT0+0x05) /* selection/reselection ID */
21 #define SCSIID SELID /* SCSI ID */
22 #define SCSIDAT (HOSTIOPORT0+0x06) /* SCSI latched data */
23 #define SCSIBUS (HOSTIOPORT0+0x07) /* SCSI data bus */
24 #define STCNT0 (HOSTIOPORT0+0x08) /* SCSI transfer count 0 */
25 #define STCNT1 (HOSTIOPORT0+0x09) /* SCSI transfer count 1 */
26 #define STCNT2 (HOSTIOPORT0+0x0a) /* SCSI transfer count 2 */
27 #define SSTAT0 (HOSTIOPORT0+0x0b) /* SCSI interrupt status 0 */
28 #define SSTAT1 (HOSTIOPORT0+0x0c) /* SCSI interrupt status 1 */
29 #define SSTAT2 (HOSTIOPORT0+0x0d) /* SCSI interrupt status 2 */
30 #define SCSITEST (HOSTIOPORT0+0x0e) /* SCSI test control */
31 #define SSTAT3 SCSITEST /* SCSI interrupt status 3 */
32 #define SSTAT4 (HOSTIOPORT0+0x0f) /* SCSI status 4 */
33 #define SIMODE0 (HOSTIOPORT1+0x10) /* SCSI interrupt mode 0 */
34 #define SIMODE1 (HOSTIOPORT1+0x11) /* SCSI interrupt mode 1 */
35 #define DMACNTRL0 (HOSTIOPORT1+0x12) /* DMA control 0 */
36 #define DMACNTRL1 (HOSTIOPORT1+0x13) /* DMA control 1 */
37 #define DMASTAT (HOSTIOPORT1+0x14) /* DMA status */
38 #define FIFOSTAT (HOSTIOPORT1+0x15) /* FIFO status */
39 #define DATAPORT (HOSTIOPORT1+0x16) /* DATA port */
40 #define BRSTCNTRL (HOSTIOPORT1+0x18) /* burst control */
41 #define PORTA (HOSTIOPORT1+0x1a) /* PORT A */
42 #define PORTB (HOSTIOPORT1+0x1b) /* PORT B */
43 #define REV (HOSTIOPORT1+0x1c) /* revision */
44 #define STACK (HOSTIOPORT1+0x1d) /* stack */
45 #define TEST (HOSTIOPORT1+0x1e) /* test register */
46
47 #define IO_RANGE 0x20
48
49 /* used in aha152x_porttest */
50 #define O_PORTA 0x1a /* PORT A */
51 #define O_PORTB 0x1b /* PORT B */
52 #define O_DMACNTRL1 0x13 /* DMA control 1 */
53 #define O_STACK 0x1d /* stack */
54
55 /* used in tc1550_porttest */
56 #define O_TC_PORTA 0x0a /* PORT A */
57 #define O_TC_PORTB 0x0b /* PORT B */
58 #define O_TC_DMACNTRL1 0x03 /* DMA control 1 */
59 #define O_TC_STACK 0x0d /* stack */
60
61 /* bits and bitmasks to ports */
62
63 /* SCSI sequence control */
64 #define TEMODEO 0x80
65 #define ENSELO 0x40
66 #define ENSELI 0x20
67 #define ENRESELI 0x10
68 #define ENAUTOATNO 0x08
69 #define ENAUTOATNI 0x04
70 #define ENAUTOATNP 0x02
71 #define SCSIRSTO 0x01
72
73 /* SCSI transfer control 0 */
74 #define SCSIEN 0x80
75 #define DMAEN 0x40
76 #define CH1 0x20
77 #define CLRSTCNT 0x10
78 #define SPIOEN 0x08
79 #define CLRCH1 0x02
80
81 /* SCSI transfer control 1 */
82 #define BITBUCKET 0x80
83 #define SWRAPEN 0x40
84 #define ENSPCHK 0x20
85 #define STIMESEL 0x18 /* mask */
86 #define STIMESEL_ 3
87 #define ENSTIMER 0x04
88 #define BYTEALIGN 0x02
89
90 /* SCSI signal IN */
91 #define SIG_CDI 0x80
92 #define SIG_IOI 0x40
93 #define SIG_MSGI 0x20
94 #define SIG_ATNI 0x10
95 #define SIG_SELI 0x08
96 #define SIG_BSYI 0x04
97 #define SIG_REQI 0x02
98 #define SIG_ACKI 0x01
99
100 /* SCSI Phases */
101 #define P_MASK (SIG_MSGI|SIG_CDI|SIG_IOI)
102 #define P_DATAO (0)
103 #define P_DATAI (SIG_IOI)
104 #define P_CMD (SIG_CDI)
105 #define P_STATUS (SIG_CDI|SIG_IOI)
106 #define P_MSGO (SIG_MSGI|SIG_CDI)
107 #define P_MSGI (SIG_MSGI|SIG_CDI|SIG_IOI)
108
109 /* SCSI signal OUT */
110 #define SIG_CDO 0x80
111 #define SIG_IOO 0x40
112 #define SIG_MSGO 0x20
113 #define SIG_ATNO 0x10
114 #define SIG_SELO 0x08
115 #define SIG_BSYO 0x04
116 #define SIG_REQO 0x02
117 #define SIG_ACKO 0x01
118
119 /* SCSI rate control */
120 #define SXFR 0x70 /* mask */
121 #define SXFR_ 4
122 #define SOFS 0x0f /* mask */
123
124 /* SCSI ID */
125 #define OID 0x70
126 #define OID_ 4
127 #define TID 0x07
128
129 /* SCSI transfer count */
130 #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
131 + (GETPORT(STCNT1)<< 8) \
132 + GETPORT(STCNT0) )
133
134 #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
135 SETPORT(STCNT1, ((X) & 0x00FF00) >> 8); \
136 SETPORT(STCNT0, ((X) & 0x0000FF) ); }
137
138 /* SCSI interrupt status */
139 #define TARGET 0x80
140 #define SELDO 0x40
141 #define SELDI 0x20
142 #define SELINGO 0x10
143 #define SWRAP 0x08
144 #define SDONE 0x04
145 #define SPIORDY 0x02
146 #define DMADONE 0x01
147
148 #define SETSDONE 0x80
149 #define CLRSELDO 0x40
150 #define CLRSELDI 0x20
151 #define CLRSELINGO 0x10
152 #define CLRSWRAP 0x08
153 #define CLRSDONE 0x04
154 #define CLRSPIORDY 0x02
155 #define CLRDMADONE 0x01
156
157 /* SCSI status 1 */
158 #define SELTO 0x80
159 #define ATNTARG 0x40
160 #define SCSIRSTI 0x20
161 #define PHASEMIS 0x10
162 #define BUSFREE 0x08
163 #define SCSIPERR 0x04
164 #define PHASECHG 0x02
165 #define REQINIT 0x01
166
167 #define CLRSELTIMO 0x80
168 #define CLRATNO 0x40
169 #define CLRSCSIRSTI 0x20
170 #define CLRBUSFREE 0x08
171 #define CLRSCSIPERR 0x04
172 #define CLRPHASECHG 0x02
173 #define CLRREQINIT 0x01
174
175 /* SCSI status 2 */
176 #define SOFFSET 0x20
177 #define SEMPTY 0x10
178 #define SFULL 0x08
179 #define SFCNT 0x07 /* mask */
180
181 /* SCSI status 3 */
182 #define SCSICNT 0xf0 /* mask */
183 #define SCSICNT_ 4
184 #define OFFCNT 0x0f /* mask */
185
186 /* SCSI TEST control */
187 #define SCTESTU 0x08
188 #define SCTESTD 0x04
189 #define STCTEST 0x01
190
191 /* SCSI status 4 */
192 #define SYNCERR 0x04
193 #define FWERR 0x02
194 #define FRERR 0x01
195
196 #define CLRSYNCERR 0x04
197 #define CLRFWERR 0x02
198 #define CLRFRERR 0x01
199
200 /* SCSI interrupt mode 0 */
201 #define ENSELDO 0x40
202 #define ENSELDI 0x20
203 #define ENSELINGO 0x10
204 #define ENSWRAP 0x08
205 #define ENSDONE 0x04
206 #define ENSPIORDY 0x02
207 #define ENDMADONE 0x01
208
209 /* SCSI interrupt mode 1 */
210 #define ENSELTIMO 0x80
211 #define ENATNTARG 0x40
212 #define ENSCSIRST 0x20
213 #define ENPHASEMIS 0x10
214 #define ENBUSFREE 0x08
215 #define ENSCSIPERR 0x04
216 #define ENPHASECHG 0x02
217 #define ENREQINIT 0x01
218
219 /* DMA control 0 */
220 #define ENDMA 0x80
221 #define _8BIT 0x40
222 #define DMA 0x20
223 #define WRITE_READ 0x08
224 #define INTEN 0x04
225 #define RSTFIFO 0x02
226 #define SWINT 0x01
227
228 /* DMA control 1 */
229 #define PWRDWN 0x80
230 #define STK 0x07 /* mask */
231
232 /* DMA status */
233 #define ATDONE 0x80
234 #define WORDRDY 0x40
235 #define INTSTAT 0x20
236 #define DFIFOFULL 0x10
237 #define DFIFOEMP 0x08
238
239 /* BURST control */
240 #define BON 0xf0
241 #define BOFF 0x0f
242
243 /* TEST REGISTER */
244 #define BOFFTMR 0x40
245 #define BONTMR 0x20
246 #define STCNTH 0x10
247 #define STCNTM 0x08
248 #define STCNTL 0x04
249 #define SCSIBLK 0x02
250 #define DMABLK 0x01
251
252 /* On the AHA-152x board PORTA and PORTB contain
253 some information about the board's configuration. */
254 typedef union {
255 struct {
256 unsigned reserved:2; /* reserved */
257 unsigned tardisc:1; /* Target disconnect: 0=disabled, 1=enabled */
258 unsigned syncneg:1; /* Initial sync neg: 0=disabled, 1=enabled */
259 unsigned msgclasses:2; /* Message classes
260 0=#4
261 1=#0, #1, #2, #3, #4
262 2=#0, #3, #4
263 3=#0, #4
264 */
265 unsigned boot:1; /* boot: 0=disabled, 1=enabled */
266 unsigned dma:1; /* Transfer mode: 0=PIO; 1=DMA */
267 unsigned id:3; /* SCSI-id */
268 unsigned irq:2; /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
269 unsigned dmachan:2; /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
270 unsigned parity:1; /* SCSI-parity: 1=enabled 0=disabled */
271 } fields;
272 unsigned short port;
273 } aha152x_config ;
274
275 #define cf_parity fields.parity
276 #define cf_dmachan fields.dmachan
277 #define cf_irq fields.irq
278 #define cf_id fields.id
279 #define cf_dma fields.dma
280 #define cf_boot fields.boot
281 #define cf_msgclasses fields.msgclasses
282 #define cf_syncneg fields.syncneg
283 #define cf_tardisc fields.tardisc
284 #define cf_port port
285
286 /* Some macros to manipulate ports and their bits */
287
288 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) )
289 #define GETPORT(PORT) inb( PORT )
290 #define SETBITS(PORT, BITS) outb( (inb(PORT) | (BITS)), (PORT) )
291 #define CLRBITS(PORT, BITS) outb( (inb(PORT) & ~(BITS)), (PORT) )
292 #define TESTHI(PORT, BITS) ((inb(PORT) & (BITS)) == (BITS))
293 #define TESTLO(PORT, BITS) ((inb(PORT) & (BITS)) == 0)
294
295 #define SETRATE(RATE) SETPORT(SCSIRATE,(RATE) & 0x7f)
296
297 #if defined(AHA152X_DEBUG)
298 enum {
299 debug_procinfo = 0x0001,
300 debug_queue = 0x0002,
301 debug_locking = 0x0004,
302 debug_intr = 0x0008,
303 debug_selection = 0x0010,
304 debug_msgo = 0x0020,
305 debug_msgi = 0x0040,
306 debug_status = 0x0080,
307 debug_cmd = 0x0100,
308 debug_datai = 0x0200,
309 debug_datao = 0x0400,
310 debug_eh = 0x0800,
311 debug_done = 0x1000,
312 debug_phases = 0x2000,
313 };
314 #endif
315
316 /* for the pcmcia stub */
317 struct aha152x_setup {
318 int io_port;
319 int irq;
320 int scsiid;
321 int reconnect;
322 int parity;
323 int synchronous;
324 int delay;
325 int ext_trans;
326 int tc1550;
327 #if defined(AHA152X_DEBUG)
328 int debug;
329 #endif
330 char *conf;
331 };
332
333 struct Scsi_Host *aha152x_probe_one(struct aha152x_setup *);
334 void aha152x_release(struct Scsi_Host *);
335 int aha152x_host_reset_host(struct Scsi_Host *);
336
337 #endif /* _AHA152X_H */
338
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