1 /*======================================================================
2
3 Device driver for the PCMCIA control functionality of PXA2xx
4 microprocessors.
5
6 The contents of this file may be used under the
7 terms of the GNU Public License version 2 (the "GPL")
8
9 (c) Ian Molton (spyro@f2s.com) 2003
10 (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
11
12 derived from sa11xx_base.c
13
14 Portions created by John G. Dorsey are
15 Copyright (C) 1999 John G. Dorsey.
16
17 ======================================================================*/
18
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/config.h>
22 #include <linux/cpufreq.h>
23 #include <linux/ioport.h>
24 #include <linux/kernel.h>
25 #include <linux/spinlock.h>
26
27 #include <asm/hardware.h>
28 #include <asm/io.h>
29 #include <asm/irq.h>
30 #include <asm/system.h>
31 #include <asm/arch/pxa-regs.h>
32
33 #include <pcmcia/cs_types.h>
34 #include <pcmcia/ss.h>
35 #include <pcmcia/bulkmem.h>
36 #include <pcmcia/cistpl.h>
37
38 #include "cs_internal.h"
39 #include "soc_common.h"
40 #include "pxa2xx_base.h"
41
42
43 #define MCXX_SETUP_MASK (0x7f)
44 #define MCXX_ASST_MASK (0x1f)
45 #define MCXX_HOLD_MASK (0x3f)
46 #define MCXX_SETUP_SHIFT (0)
47 #define MCXX_ASST_SHIFT (7)
48 #define MCXX_HOLD_SHIFT (14)
49
50 static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
51 u_int mem_clk_10khz)
52 {
53 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
54 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
55 }
56
57 static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
58 u_int mem_clk_10khz)
59 {
60 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
61 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
62 }
63
64 static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
65 u_int mem_clk_10khz)
66 {
67 u_int code = pcmcia_cycle_ns * mem_clk_10khz;
68 return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
69 }
70
71 /* This function returns the (approximate) command assertion period, in
72 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
73 */
74 static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
75 u_int pcmcia_mcxx_asst)
76 {
77 return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
78 }
79
80 static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
81 {
82 MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
83 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
84 | ((pxa2xx_mcxx_asst(speed, clock)
85 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
86 | ((pxa2xx_mcxx_hold(speed, clock)
87 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
88
89 return 0;
90 }
91
92 static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
93 {
94 MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
95 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
96 | ((pxa2xx_mcxx_asst(speed, clock)
97 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
98 | ((pxa2xx_mcxx_hold(speed, clock)
99 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
100
101 return 0;
102 }
103
104 static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
105 {
106 MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
107 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
108 | ((pxa2xx_mcxx_asst(speed, clock)
109 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
110 | ((pxa2xx_mcxx_hold(speed, clock)
111 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
112
113 return 0;
114 }
115
116 static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
117 {
118 struct soc_pcmcia_timing timing;
119 int sock = skt->nr;
120
121 soc_common_pcmcia_get_timing(skt, &timing);
122
123 pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
124 pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
125 pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
126
127 return 0;
128 }
129
130 static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
131 {
132 unsigned int clk = get_memclk_frequency_10khz();
133 return pxa2xx_pcmcia_set_mcxx(skt, clk);
134 }
135
136 #ifdef CONFIG_CPU_FREQ
137
138 static int
139 pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
140 unsigned long val,
141 struct cpufreq_freqs *freqs)
142 {
143 #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
144 switch (val) {
145 case CPUFREQ_PRECHANGE:
146 if (freqs->new > freqs->old) {
147 debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
148 "pre-updating\n",
149 freqs->new / 1000, (freqs->new / 100) % 10,
150 freqs->old / 1000, (freqs->old / 100) % 10);
151 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
152 }
153 break;
154
155 case CPUFREQ_POSTCHANGE:
156 if (freqs->new < freqs->old) {
157 debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
158 "post-updating\n",
159 freqs->new / 1000, (freqs->new / 100) % 10,
160 freqs->old / 1000, (freqs->old / 100) % 10);
161 pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
162 }
163 break;
164 }
165 return 0;
166 }
167 #endif
168
169 int pxa2xx_drv_pcmcia_probe(struct device *dev)
170 {
171 int ret;
172 struct pcmcia_low_level *ops;
173 int first, nr;
174
175 if (!dev || !dev->platform_data)
176 return -ENODEV;
177
178 ops = (struct pcmcia_low_level *)dev->platform_data;
179 first = ops->first;
180 nr = ops->nr;
181
182 /* Provide our PXA2xx specific timing routines. */
183 ops->set_timing = pxa2xx_pcmcia_set_timing;
184 #ifdef CONFIG_CPU_FREQ
185 ops->frequency_change = pxa2xx_pcmcia_frequency_change;
186 #endif
187
188 ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
189
190 if (ret == 0) {
191 /*
192 * We have at least one socket, so set MECR:CIT
193 * (Card Is There)
194 */
195 MECR |= MECR_CIT;
196
197 /* Set MECR:NOS (Number Of Sockets) */
198 if (nr > 1)
199 MECR |= MECR_NOS;
200 else
201 MECR &= ~MECR_NOS;
202 }
203
204 return ret;
205 }
206 EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe);
207
208 static int pxa2xx_drv_pcmcia_suspend(struct device *dev, u32 state, u32 level)
209 {
210 int ret = 0;
211 if (level == SUSPEND_SAVE_STATE)
212 ret = pcmcia_socket_dev_suspend(dev, state);
213 return ret;
214 }
215
216 static int pxa2xx_drv_pcmcia_resume(struct device *dev, u32 level)
217 {
218 int ret = 0;
219 if (level == RESUME_RESTORE_STATE)
220 {
221 struct pcmcia_low_level *ops = dev->platform_data;
222 int nr = ops ? ops->nr : 0;
223
224 MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);
225 ret = pcmcia_socket_dev_resume(dev);
226 }
227 return ret;
228 }
229
230 static struct device_driver pxa2xx_pcmcia_driver = {
231 .probe = pxa2xx_drv_pcmcia_probe,
232 .remove = soc_common_drv_pcmcia_remove,
233 .suspend = pxa2xx_drv_pcmcia_suspend,
234 .resume = pxa2xx_drv_pcmcia_resume,
235 .name = "pxa2xx-pcmcia",
236 .bus = &platform_bus_type,
237 };
238
239 static int __init pxa2xx_pcmcia_init(void)
240 {
241 return driver_register(&pxa2xx_pcmcia_driver);
242 }
243
244 static void __exit pxa2xx_pcmcia_exit(void)
245 {
246 driver_unregister(&pxa2xx_pcmcia_driver);
247 }
248
249 module_init(pxa2xx_pcmcia_init);
250 module_exit(pxa2xx_pcmcia_exit);
251
252 MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
253 MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
254 MODULE_LICENSE("GPL");
255
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