1 /*
2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
3 *
4 * (C) 2001 Red Hat, Inc.
5 *
6 * Author: Arjan Van De Ven <arjanv@redhat.com>
7 * Loosly based on i82365.c from the pcmcia-cs package
8 *
9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/init.h>
17 #include <linux/workqueue.h>
18 #include <linux/interrupt.h>
19 #include <linux/device.h>
20
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/ss.h>
23 #include <pcmcia/cs.h>
24
25 #include <asm/system.h>
26 #include <asm/io.h>
27
28 #include "i82092aa.h"
29 #include "i82365.h"
30
31 MODULE_LICENSE("GPL");
32
33 /* PCI core routines */
34 static struct pci_device_id i82092aa_pci_ids[] = {
35 {
36 .vendor = PCI_VENDOR_ID_INTEL,
37 .device = PCI_DEVICE_ID_INTEL_82092AA_0,
38 .subvendor = PCI_ANY_ID,
39 .subdevice = PCI_ANY_ID,
40 },
41 {}
42 };
43 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
44
45 static int i82092aa_socket_suspend (struct pci_dev *dev, u32 state)
46 {
47 return pcmcia_socket_dev_suspend(&dev->dev, state);
48 }
49
50 static int i82092aa_socket_resume (struct pci_dev *dev)
51 {
52 return pcmcia_socket_dev_resume(&dev->dev);
53 }
54
55 static struct pci_driver i82092aa_pci_drv = {
56 .name = "i82092aa",
57 .id_table = i82092aa_pci_ids,
58 .probe = i82092aa_pci_probe,
59 .remove = __devexit_p(i82092aa_pci_remove),
60 .suspend = i82092aa_socket_suspend,
61 .resume = i82092aa_socket_resume,
62 };
63
64
65 /* the pccard structure and its functions */
66 static struct pccard_operations i82092aa_operations = {
67 .init = i82092aa_init,
68 .suspend = i82092aa_suspend,
69 .get_status = i82092aa_get_status,
70 .get_socket = i82092aa_get_socket,
71 .set_socket = i82092aa_set_socket,
72 .set_io_map = i82092aa_set_io_map,
73 .set_mem_map = i82092aa_set_mem_map,
74 };
75
76 /* The card can do upto 4 sockets, allocate a structure for each of them */
77
78 struct socket_info {
79 int number;
80 int card_state; /* 0 = no socket,
81 1 = empty socket,
82 2 = card but not initialized,
83 3 = operational card */
84 kio_addr_t io_base; /* base io address of the socket */
85
86 struct pcmcia_socket socket;
87 struct pci_dev *dev; /* The PCI device for the socket */
88 };
89
90 #define MAX_SOCKETS 4
91 static struct socket_info sockets[MAX_SOCKETS];
92 static int socket_count; /* shortcut */
93
94
95 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
96 {
97 unsigned char configbyte;
98 int i, ret;
99
100 enter("i82092aa_pci_probe");
101
102 if ((ret = pci_enable_device(dev)))
103 return ret;
104
105 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */
106 switch(configbyte&6) {
107 case 0:
108 socket_count = 2;
109 break;
110 case 2:
111 socket_count = 1;
112 break;
113 case 4:
114 case 6:
115 socket_count = 4;
116 break;
117
118 default:
119 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
120 ret = -EIO;
121 goto err_out_disable;
122 }
123 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
124
125 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
126 ret = -EBUSY;
127 goto err_out_disable;
128 }
129
130 for (i = 0;i<socket_count;i++) {
131 sockets[i].card_state = 1; /* 1 = present but empty */
132 sockets[i].io_base = pci_resource_start(dev, 0);
133 sockets[i].socket.features |= SS_CAP_PCCARD;
134 sockets[i].socket.map_size = 0x1000;
135 sockets[i].socket.irq_mask = 0;
136 sockets[i].socket.pci_irq = dev->irq;
137 sockets[i].socket.owner = THIS_MODULE;
138
139 sockets[i].number = i;
140
141 if (card_present(i)) {
142 sockets[i].card_state = 3;
143 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
144 } else {
145 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
146 }
147 }
148
149 /* Now, specifiy that all interrupts are to be done as PCI interrupts */
150 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
151 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
152
153 /* Register the interrupt handler */
154 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
155 if ((ret = request_irq(dev->irq, i82092aa_interrupt, SA_SHIRQ, "i82092aa", i82092aa_interrupt))) {
156 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
157 goto err_out_free_res;
158 }
159
160 pci_set_drvdata(dev, &sockets[i].socket);
161
162 for (i = 0; i<socket_count; i++) {
163 sockets[i].socket.dev.dev = &dev->dev;
164 sockets[i].socket.ops = &i82092aa_operations;
165 sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
166 ret = pcmcia_register_socket(&sockets[i].socket);
167 if (ret) {
168 goto err_out_free_sockets;
169 }
170 }
171
172 leave("i82092aa_pci_probe");
173 return 0;
174
175 err_out_free_sockets:
176 if (i) {
177 for (i--;i>=0;i--) {
178 pcmcia_unregister_socket(&sockets[i].socket);
179 }
180 }
181 free_irq(dev->irq, i82092aa_interrupt);
182 err_out_free_res:
183 release_region(pci_resource_start(dev, 0), 2);
184 err_out_disable:
185 pci_disable_device(dev);
186 return ret;
187 }
188
189 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
190 {
191 struct pcmcia_socket *socket = pci_get_drvdata(dev);
192
193 enter("i82092aa_pci_remove");
194
195 free_irq(dev->irq, i82092aa_interrupt);
196
197 if (socket)
198 pcmcia_unregister_socket(socket);
199
200 leave("i82092aa_pci_remove");
201 }
202
203 static DEFINE_SPINLOCK(port_lock);
204
205 /* basic value read/write functions */
206
207 static unsigned char indirect_read(int socket, unsigned short reg)
208 {
209 unsigned short int port;
210 unsigned char val;
211 unsigned long flags;
212 spin_lock_irqsave(&port_lock,flags);
213 reg += socket * 0x40;
214 port = sockets[socket].io_base;
215 outb(reg,port);
216 val = inb(port+1);
217 spin_unlock_irqrestore(&port_lock,flags);
218 return val;
219 }
220
221 #if 0
222 static unsigned short indirect_read16(int socket, unsigned short reg)
223 {
224 unsigned short int port;
225 unsigned short tmp;
226 unsigned long flags;
227 spin_lock_irqsave(&port_lock,flags);
228 reg = reg + socket * 0x40;
229 port = sockets[socket].io_base;
230 outb(reg,port);
231 tmp = inb(port+1);
232 reg++;
233 outb(reg,port);
234 tmp = tmp | (inb(port+1)<<8);
235 spin_unlock_irqrestore(&port_lock,flags);
236 return tmp;
237 }
238 #endif
239
240 static void indirect_write(int socket, unsigned short reg, unsigned char value)
241 {
242 unsigned short int port;
243 unsigned long flags;
244 spin_lock_irqsave(&port_lock,flags);
245 reg = reg + socket * 0x40;
246 port = sockets[socket].io_base;
247 outb(reg,port);
248 outb(value,port+1);
249 spin_unlock_irqrestore(&port_lock,flags);
250 }
251
252 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
253 {
254 unsigned short int port;
255 unsigned char val;
256 unsigned long flags;
257 spin_lock_irqsave(&port_lock,flags);
258 reg = reg + socket * 0x40;
259 port = sockets[socket].io_base;
260 outb(reg,port);
261 val = inb(port+1);
262 val |= mask;
263 outb(reg,port);
264 outb(val,port+1);
265 spin_unlock_irqrestore(&port_lock,flags);
266 }
267
268
269 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
270 {
271 unsigned short int port;
272 unsigned char val;
273 unsigned long flags;
274 spin_lock_irqsave(&port_lock,flags);
275 reg = reg + socket * 0x40;
276 port = sockets[socket].io_base;
277 outb(reg,port);
278 val = inb(port+1);
279 val &= ~mask;
280 outb(reg,port);
281 outb(val,port+1);
282 spin_unlock_irqrestore(&port_lock,flags);
283 }
284
285 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
286 {
287 unsigned short int port;
288 unsigned char val;
289 unsigned long flags;
290 spin_lock_irqsave(&port_lock,flags);
291 reg = reg + socket * 0x40;
292 port = sockets[socket].io_base;
293
294 outb(reg,port);
295 val = value & 255;
296 outb(val,port+1);
297
298 reg++;
299
300 outb(reg,port);
301 val = value>>8;
302 outb(val,port+1);
303 spin_unlock_irqrestore(&port_lock,flags);
304 }
305
306 /* simple helper functions */
307 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
308 static int cycle_time = 120;
309
310 static int to_cycles(int ns)
311 {
312 if (cycle_time!=0)
313 return ns/cycle_time;
314 else
315 return 0;
316 }
317
318
319 /* Interrupt handler functionality */
320
321 static irqreturn_t i82092aa_interrupt(int irq, void *dev, struct pt_regs *regs)
322 {
323 int i;
324 int loopcount = 0;
325 int handled = 0;
326
327 unsigned int events, active=0;
328
329 /* enter("i82092aa_interrupt");*/
330
331 while (1) {
332 loopcount++;
333 if (loopcount>20) {
334 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
335 break;
336 }
337
338 active = 0;
339
340 for (i=0;i<socket_count;i++) {
341 int csc;
342 if (sockets[i].card_state==0) /* Inactive socket, should not happen */
343 continue;
344
345 csc = indirect_read(i,I365_CSC); /* card status change register */
346
347 if (csc==0) /* no events on this socket */
348 continue;
349 handled = 1;
350 events = 0;
351
352 if (csc & I365_CSC_DETECT) {
353 events |= SS_DETECT;
354 printk("Card detected in socket %i!\n",i);
355 }
356
357 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
358 /* For IO/CARDS, bit 0 means "read the card" */
359 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
360 } else {
361 /* Check for battery/ready events */
362 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
363 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
364 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
365 }
366
367 if (events) {
368 pcmcia_parse_events(&sockets[i].socket, events);
369 }
370 active |= events;
371 }
372
373 if (active==0) /* no more events to handle */
374 break;
375
376 }
377 return IRQ_RETVAL(handled);
378 /* leave("i82092aa_interrupt");*/
379 }
380
381
382
383 /* socket functions */
384
385 static int card_present(int socketno)
386 {
387 unsigned int val;
388 enter("card_present");
389
390 if ((socketno<0) || (socketno >= MAX_SOCKETS))
391 return 0;
392 if (sockets[socketno].io_base == 0)
393 return 0;
394
395
396 val = indirect_read(socketno, 1); /* Interface status register */
397 if ((val&12)==12) {
398 leave("card_present 1");
399 return 1;
400 }
401
402 leave("card_present 0");
403 return 0;
404 }
405
406 static void set_bridge_state(int sock)
407 {
408 enter("set_bridge_state");
409 indirect_write(sock, I365_GBLCTL,0x00);
410 indirect_write(sock, I365_GENCTL,0x00);
411
412 indirect_setbit(sock, I365_INTCTL,0x08);
413 leave("set_bridge_state");
414 }
415
416
417
418
419
420
421 static int i82092aa_init(struct pcmcia_socket *sock)
422 {
423 int i;
424 struct resource res = { .start = 0, .end = 0x0fff };
425 pccard_io_map io = { 0, 0, 0, 0, 1 };
426 pccard_mem_map mem = { .res = &res, };
427
428 enter("i82092aa_init");
429
430 for (i = 0; i < 2; i++) {
431 io.map = i;
432 i82092aa_set_io_map(sock, &io);
433 }
434 for (i = 0; i < 5; i++) {
435 mem.map = i;
436 i82092aa_set_mem_map(sock, &mem);
437 }
438
439 leave("i82092aa_init");
440 return 0;
441 }
442
443 static int i82092aa_suspend(struct pcmcia_socket *sock)
444 {
445 int retval;
446 enter("i82092aa_suspend");
447 retval = i82092aa_set_socket(sock, &dead_socket);
448 leave("i82092aa_suspend");
449 return retval;
450 }
451
452 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
453 {
454 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
455 unsigned int status;
456
457 enter("i82092aa_get_status");
458
459 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
460 *value = 0;
461
462 if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
463 *value |= SS_DETECT;
464 }
465
466 /* IO cards have a different meaning of bits 0,1 */
467 /* Also notice the inverse-logic on the bits */
468 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
469 /* IO card */
470 if (!(status & I365_CS_STSCHG))
471 *value |= SS_STSCHG;
472 } else { /* non I/O card */
473 if (!(status & I365_CS_BVD1))
474 *value |= SS_BATDEAD;
475 if (!(status & I365_CS_BVD2))
476 *value |= SS_BATWARN;
477
478 }
479
480 if (status & I365_CS_WRPROT)
481 (*value) |= SS_WRPROT; /* card is write protected */
482
483 if (status & I365_CS_READY)
484 (*value) |= SS_READY; /* card is not busy */
485
486 if (status & I365_CS_POWERON)
487 (*value) |= SS_POWERON; /* power is applied to the card */
488
489
490 leave("i82092aa_get_status");
491 return 0;
492 }
493
494
495 static int i82092aa_get_socket(struct pcmcia_socket *socket, socket_state_t *state)
496 {
497 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
498 unsigned char reg,vcc,vpp;
499
500 enter("i82092aa_get_socket");
501 state->flags = 0;
502 state->Vcc = 0;
503 state->Vpp = 0;
504 state->io_irq = 0;
505 state->csc_mask = 0;
506
507 /* First the power status of the socket */
508 reg = indirect_read(sock,I365_POWER); /* PCTRL - Power Control Register */
509
510 if (reg & I365_PWR_AUTO)
511 state->flags |= SS_PWR_AUTO; /* Automatic Power Switch */
512
513 if (reg & I365_PWR_OUT)
514 state->flags |= SS_OUTPUT_ENA; /* Output signals are enabled */
515
516 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK;
517
518 if (reg & I365_VCC_5V) { /* Can still be 3.3V, in this case the Vcc value will be overwritten later */
519 state->Vcc = 50;
520
521 if (vpp == I365_VPP1_5V)
522 state->Vpp = 50;
523 if (vpp == I365_VPP1_12V)
524 state->Vpp = 120;
525
526 }
527
528 if ((reg & I365_VCC_3V)==I365_VCC_3V)
529 state->Vcc = 33;
530
531
532 /* Now the IO card, RESET flags and IO interrupt */
533
534 reg = indirect_read(sock, I365_INTCTL); /* IGENC, Interrupt and General Control */
535
536 if ((reg & I365_PC_RESET)==0)
537 state->flags |= SS_RESET;
538 if (reg & I365_PC_IOCARD)
539 state->flags |= SS_IOCARD; /* This is an IO card */
540
541 /* Set the IRQ number */
542 if (sockets[sock].dev!=NULL)
543 state->io_irq = sockets[sock].dev->irq;
544
545 /* Card status change */
546 reg = indirect_read(sock, I365_CSCINT); /* CSCICR, Card Status Change Interrupt Configuration */
547
548 if (reg & I365_CSC_DETECT)
549 state->csc_mask |= SS_DETECT; /* Card detect is enabled */
550
551 if (state->flags & SS_IOCARD) {/* IO Cards behave different */
552 if (reg & I365_CSC_STSCHG)
553 state->csc_mask |= SS_STSCHG;
554 } else {
555 if (reg & I365_CSC_BVD1)
556 state->csc_mask |= SS_BATDEAD;
557 if (reg & I365_CSC_BVD2)
558 state->csc_mask |= SS_BATWARN;
559 if (reg & I365_CSC_READY)
560 state->csc_mask |= SS_READY;
561 }
562
563 leave("i82092aa_get_socket");
564 return 0;
565 }
566
567 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state)
568 {
569 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
570 unsigned char reg;
571
572 enter("i82092aa_set_socket");
573
574 /* First, set the global controller options */
575
576 set_bridge_state(sock);
577
578 /* Values for the IGENC register */
579
580 reg = 0;
581 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */
582 reg = reg | I365_PC_RESET;
583 if (state->flags & SS_IOCARD)
584 reg = reg | I365_PC_IOCARD;
585
586 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
587
588 /* Power registers */
589
590 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
591
592 if (state->flags & SS_PWR_AUTO) {
593 printk("Auto power\n");
594 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
595 }
596 if (state->flags & SS_OUTPUT_ENA) {
597 printk("Power Enabled \n");
598 reg |= I365_PWR_OUT; /* enable power */
599 }
600
601 switch (state->Vcc) {
602 case 0:
603 break;
604 case 50:
605 printk("setting voltage to Vcc to 5V on socket %i\n",sock);
606 reg |= I365_VCC_5V;
607 break;
608 default:
609 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
610 leave("i82092aa_set_socket");
611 return -EINVAL;
612 }
613
614
615 switch (state->Vpp) {
616 case 0:
617 printk("not setting Vpp on socket %i\n",sock);
618 break;
619 case 50:
620 printk("setting Vpp to 5.0 for socket %i\n",sock);
621 reg |= I365_VPP1_5V | I365_VPP2_5V;
622 break;
623 case 120:
624 printk("setting Vpp to 12.0\n");
625 reg |= I365_VPP1_12V | I365_VPP2_12V;
626 break;
627 default:
628 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
629 leave("i82092aa_set_socket");
630 return -EINVAL;
631 }
632
633 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
634 indirect_write(sock,I365_POWER,reg);
635
636 /* Enable specific interrupt events */
637
638 reg = 0x00;
639 if (state->csc_mask & SS_DETECT) {
640 reg |= I365_CSC_DETECT;
641 }
642 if (state->flags & SS_IOCARD) {
643 if (state->csc_mask & SS_STSCHG)
644 reg |= I365_CSC_STSCHG;
645 } else {
646 if (state->csc_mask & SS_BATDEAD)
647 reg |= I365_CSC_BVD1;
648 if (state->csc_mask & SS_BATWARN)
649 reg |= I365_CSC_BVD2;
650 if (state->csc_mask & SS_READY)
651 reg |= I365_CSC_READY;
652
653 }
654
655 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
656
657 indirect_write(sock,I365_CSCINT,reg);
658 (void)indirect_read(sock,I365_CSC);
659
660 leave("i82092aa_set_socket");
661 return 0;
662 }
663
664 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
665 {
666 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
667 unsigned char map, ioctl;
668
669 enter("i82092aa_set_io_map");
670
671 map = io->map;
672
673 /* Check error conditions */
674 if (map > 1) {
675 leave("i82092aa_set_io_map with invalid map");
676 return -EINVAL;
677 }
678 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
679 leave("i82092aa_set_io_map with invalid io");
680 return -EINVAL;
681 }
682
683 /* Turn off the window before changing anything */
684 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
685 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
686
687 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */
688
689 /* write the new values */
690 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
691 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
692
693 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
694
695 if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
696 ioctl |= I365_IOCTL_16BIT(map);
697
698 indirect_write(sock,I365_IOCTL,ioctl);
699
700 /* Turn the window back on if needed */
701 if (io->flags & MAP_ACTIVE)
702 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
703
704 leave("i82092aa_set_io_map");
705 return 0;
706 }
707
708 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
709 {
710 struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
711 unsigned int sock = sock_info->number;
712 struct pci_bus_region region;
713 unsigned short base, i;
714 unsigned char map;
715
716 enter("i82092aa_set_mem_map");
717
718 pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res);
719
720 map = mem->map;
721 if (map > 4) {
722 leave("i82092aa_set_mem_map: invalid map");
723 return -EINVAL;
724 }
725
726
727 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
728 (mem->speed > 1000) ) {
729 leave("i82092aa_set_mem_map: invalid address / speed");
730 printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,region.start, region.end, mem->card_start);
731 return -EINVAL;
732 }
733
734 /* Turn off the window before changing anything */
735 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
736 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
737
738
739 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */
740
741 /* write the start address */
742 base = I365_MEM(map);
743 i = (region.start >> 12) & 0x0fff;
744 if (mem->flags & MAP_16BIT)
745 i |= I365_MEM_16BIT;
746 if (mem->flags & MAP_0WS)
747 i |= I365_MEM_0WS;
748 indirect_write16(sock,base+I365_W_START,i);
749
750 /* write the stop address */
751
752 i= (region.end >> 12) & 0x0fff;
753 switch (to_cycles(mem->speed)) {
754 case 0:
755 break;
756 case 1:
757 i |= I365_MEM_WS0;
758 break;
759 case 2:
760 i |= I365_MEM_WS1;
761 break;
762 default:
763 i |= I365_MEM_WS1 | I365_MEM_WS0;
764 break;
765 }
766
767 indirect_write16(sock,base+I365_W_STOP,i);
768
769 /* card start */
770
771 i = ((mem->card_start - region.start) >> 12) & 0x3fff;
772 if (mem->flags & MAP_WRPROT)
773 i |= I365_MEM_WRPROT;
774 if (mem->flags & MAP_ATTRIB) {
775 /* printk("requesting attribute memory for socket %i\n",sock);*/
776 i |= I365_MEM_REG;
777 } else {
778 /* printk("requesting normal memory for socket %i\n",sock);*/
779 }
780 indirect_write16(sock,base+I365_W_OFF,i);
781
782 /* Enable the window if necessary */
783 if (mem->flags & MAP_ACTIVE)
784 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
785
786 leave("i82092aa_set_mem_map");
787 return 0;
788 }
789
790 static int i82092aa_module_init(void)
791 {
792 enter("i82092aa_module_init");
793 pci_register_driver(&i82092aa_pci_drv);
794 leave("i82092aa_module_init");
795 return 0;
796 }
797
798 static void i82092aa_module_exit(void)
799 {
800 enter("i82092aa_module_exit");
801 pci_unregister_driver(&i82092aa_pci_drv);
802 if (sockets[0].io_base>0)
803 release_region(sockets[0].io_base, 2);
804 leave("i82092aa_module_exit");
805 }
806
807 module_init(i82092aa_module_init);
808 module_exit(i82092aa_module_exit);
809
810
|
This page was automatically generated by the
LXR engine.
|