1 /*
2 * cardbus.c -- 16-bit PCMCIA core support
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * The initial developer of the original code is David A. Hinds
9 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
10 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
11 *
12 * (C) 1999 David A. Hinds
13 */
14
15 /*
16 * Cardbus handling has been re-written to be more of a PCI bridge thing,
17 * and the PCI code basically does all the resource handling.
18 *
19 * Linus, Jan 2000
20 */
21
22
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/mm.h>
28 #include <linux/pci.h>
29 #include <linux/ioport.h>
30 #include <asm/irq.h>
31 #include <asm/io.h>
32
33 #include <pcmcia/cs_types.h>
34 #include <pcmcia/ss.h>
35 #include <pcmcia/cs.h>
36 #include <pcmcia/cistpl.h>
37 #include "cs_internal.h"
38
39 /*====================================================================*/
40
41 /* Offsets in the Expansion ROM Image Header */
42 #define ROM_SIGNATURE 0x0000 /* 2 bytes */
43 #define ROM_DATA_PTR 0x0018 /* 2 bytes */
44
45 /* Offsets in the CardBus PC Card Data Structure */
46 #define PCDATA_SIGNATURE 0x0000 /* 4 bytes */
47 #define PCDATA_VPD_PTR 0x0008 /* 2 bytes */
48 #define PCDATA_LENGTH 0x000a /* 2 bytes */
49 #define PCDATA_REVISION 0x000c
50 #define PCDATA_IMAGE_SZ 0x0010 /* 2 bytes */
51 #define PCDATA_ROM_LEVEL 0x0012 /* 2 bytes */
52 #define PCDATA_CODE_TYPE 0x0014
53 #define PCDATA_INDICATOR 0x0015
54
55 /*=====================================================================
56
57 Expansion ROM's have a special layout, and pointers specify an
58 image number and an offset within that image. xlate_rom_addr()
59 converts an image/offset address to an absolute offset from the
60 ROM's base address.
61
62 =====================================================================*/
63
64 static u_int xlate_rom_addr(void __iomem *b, u_int addr)
65 {
66 u_int img = 0, ofs = 0, sz;
67 u_short data;
68 while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
69 if (img == (addr >> 28))
70 return (addr & 0x0fffffff) + ofs;
71 data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
72 sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
73 (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
74 if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
75 break;
76 b += sz;
77 ofs += sz;
78 img++;
79 }
80 return 0;
81 }
82
83 /*=====================================================================
84
85 These are similar to setup_cis_mem and release_cis_mem for 16-bit
86 cards. The "result" that is used externally is the cb_cis_virt
87 pointer in the struct pcmcia_socket structure.
88
89 =====================================================================*/
90
91 static void cb_release_cis_mem(struct pcmcia_socket * s)
92 {
93 if (s->cb_cis_virt) {
94 cs_dbg(s, 1, "cb_release_cis_mem()\n");
95 iounmap(s->cb_cis_virt);
96 s->cb_cis_virt = NULL;
97 s->cb_cis_res = NULL;
98 }
99 }
100
101 static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
102 {
103 unsigned int start, size;
104
105 if (res == s->cb_cis_res)
106 return 0;
107
108 if (s->cb_cis_res)
109 cb_release_cis_mem(s);
110
111 start = res->start;
112 size = res->end - start + 1;
113 s->cb_cis_virt = ioremap(start, size);
114
115 if (!s->cb_cis_virt)
116 return -1;
117
118 s->cb_cis_res = res;
119
120 return 0;
121 }
122
123 /*=====================================================================
124
125 This is used by the CIS processing code to read CIS information
126 from a CardBus device.
127
128 =====================================================================*/
129
130 int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
131 {
132 struct pci_dev *dev;
133 struct resource *res;
134
135 cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
136
137 dev = pci_get_slot(s->cb_dev->subordinate, 0);
138 if (!dev)
139 goto fail;
140
141 /* Config space? */
142 if (space == 0) {
143 if (addr + len > 0x100)
144 goto failput;
145 for (; len; addr++, ptr++, len--)
146 pci_read_config_byte(dev, addr, ptr);
147 return 0;
148 }
149
150 res = dev->resource + space - 1;
151
152 pci_dev_put(dev);
153
154 if (!res->flags)
155 goto fail;
156
157 if (cb_setup_cis_mem(s, res) != 0)
158 goto fail;
159
160 if (space == 7) {
161 addr = xlate_rom_addr(s->cb_cis_virt, addr);
162 if (addr == 0)
163 goto fail;
164 }
165
166 if (addr + len > res->end - res->start)
167 goto fail;
168
169 memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
170 return 0;
171
172 failput:
173 pci_dev_put(dev);
174 fail:
175 memset(ptr, 0xff, len);
176 return -1;
177 }
178
179 /*=====================================================================
180
181 cb_alloc() and cb_free() allocate and free the kernel data
182 structures for a Cardbus device, and handle the lowest level PCI
183 device setup issues.
184
185 =====================================================================*/
186
187 /*
188 * Since there is only one interrupt available to CardBus
189 * devices, all devices downstream of this device must
190 * be using this IRQ.
191 */
192 static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
193 {
194 struct pci_dev *dev;
195
196 list_for_each_entry(dev, &bus->devices, bus_list) {
197 u8 irq_pin;
198
199 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
200 if (irq_pin) {
201 dev->irq = irq;
202 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
203 }
204
205 if (dev->subordinate)
206 cardbus_assign_irqs(dev->subordinate, irq);
207 }
208 }
209
210 int __ref cb_alloc(struct pcmcia_socket * s)
211 {
212 struct pci_bus *bus = s->cb_dev->subordinate;
213 struct pci_dev *dev;
214 unsigned int max, pass;
215
216 s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
217 // pcibios_fixup_bus(bus);
218
219 max = bus->secondary;
220 for (pass = 0; pass < 2; pass++)
221 list_for_each_entry(dev, &bus->devices, bus_list)
222 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
223 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
224 max = pci_scan_bridge(bus, dev, max, pass);
225
226 /*
227 * Size all resources below the CardBus controller.
228 */
229 pci_bus_size_bridges(bus);
230 pci_bus_assign_resources(bus);
231 cardbus_assign_irqs(bus, s->pci_irq);
232
233 /* socket specific tune function */
234 if (s->tune_bridge)
235 s->tune_bridge(s, bus);
236
237 pci_enable_bridges(bus);
238 pci_bus_add_devices(bus);
239
240 s->irq.AssignedIRQ = s->pci_irq;
241 return 0;
242 }
243
244 void cb_free(struct pcmcia_socket * s)
245 {
246 struct pci_dev *bridge = s->cb_dev;
247
248 cb_release_cis_mem(s);
249
250 if (bridge)
251 pci_remove_behind_bridge(bridge);
252 }
253
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