1 /* ZD1211 USB-WLAN driver for Linux
2 *
3 * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
4 * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include <linux/kernel.h>
22
23 #include "zd_rf.h"
24 #include "zd_usb.h"
25 #include "zd_chip.h"
26
27 static const u32 chan_rv[][2] = {
28 RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
29 RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
30 RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
31 RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
32 RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
33 RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
34 RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
35 RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
36 RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
37 RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
38 RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
39 RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
40 RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
41 RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
42 };
43
44 static const u32 std_rv[] = {
45 0x4ff821,
46 0xc5fbfc,
47 0x21ebfe,
48 0xafd401, /* freq shift 0xaad401 */
49 0x6cf56a,
50 0xe04073,
51 0x193d76,
52 0x9dd844,
53 0x500007,
54 0xd8c010,
55 };
56
57 static const u32 rv_init1[] = {
58 0x3c9000,
59 0xbfffff,
60 0x700000,
61 0xf15d58,
62 };
63
64 static const u32 rv_init2[] = {
65 0xf15d59,
66 0xf15d5c,
67 0xf15d58,
68 };
69
70 static const struct zd_ioreq16 ioreqs_sw[] = {
71 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
72 { CR38, 0x38 }, { CR136, 0xdf },
73 };
74
75 static int zd1211b_al7230b_finalize(struct zd_chip *chip)
76 {
77 int r;
78 static const struct zd_ioreq16 ioreqs[] = {
79 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
80 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
81 { CR203, 0x04 },
82 { },
83 { CR240, 0x80 },
84 };
85
86 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
87 if (r)
88 return r;
89
90 if (chip->new_phy_layout) {
91 /* antenna selection? */
92 r = zd_iowrite16_locked(chip, 0xe5, CR9);
93 if (r)
94 return r;
95 }
96
97 return zd_iowrite16_locked(chip, 0x04, CR203);
98 }
99
100 static int zd1211_al7230b_init_hw(struct zd_rf *rf)
101 {
102 int r;
103 struct zd_chip *chip = zd_rf_to_chip(rf);
104
105 /* All of these writes are identical to AL2230 unless otherwise
106 * specified */
107 static const struct zd_ioreq16 ioreqs_1[] = {
108 /* This one is 7230-specific, and happens before the rest */
109 { CR240, 0x57 },
110 { },
111
112 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
113 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
114 { CR44, 0x33 },
115 /* This value is different for 7230 (was: 0x2a) */
116 { CR106, 0x22 },
117 { CR107, 0x1a }, { CR109, 0x09 }, { CR110, 0x27 },
118 { CR111, 0x2b }, { CR112, 0x2b }, { CR119, 0x0a },
119 /* This happened further down in AL2230,
120 * and the value changed (was: 0xe0) */
121 { CR122, 0xfc },
122 { CR10, 0x89 },
123 /* for newest (3rd cut) AL2300 */
124 { CR17, 0x28 },
125 { CR26, 0x93 }, { CR34, 0x30 },
126 /* for newest (3rd cut) AL2300 */
127 { CR35, 0x3e },
128 { CR41, 0x24 }, { CR44, 0x32 },
129 /* for newest (3rd cut) AL2300 */
130 { CR46, 0x96 },
131 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
132 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
133 { CR92, 0x0a }, { CR99, 0x28 },
134 /* This value is different for 7230 (was: 0x00) */
135 { CR100, 0x02 },
136 { CR101, 0x13 }, { CR102, 0x27 },
137 /* This value is different for 7230 (was: 0x24) */
138 { CR106, 0x22 },
139 /* This value is different for 7230 (was: 0x2a) */
140 { CR107, 0x3f },
141 { CR109, 0x09 },
142 /* This value is different for 7230 (was: 0x13) */
143 { CR110, 0x1f },
144 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
145 { CR114, 0x27 },
146 /* for newest (3rd cut) AL2300 */
147 { CR115, 0x24 },
148 /* This value is different for 7230 (was: 0x24) */
149 { CR116, 0x3f },
150 /* This value is different for 7230 (was: 0xf4) */
151 { CR117, 0xfa },
152 { CR118, 0xfc }, { CR119, 0x10 }, { CR120, 0x4f },
153 { CR121, 0x77 }, { CR137, 0x88 },
154 /* This one is 7230-specific */
155 { CR138, 0xa8 },
156 /* This value is different for 7230 (was: 0xff) */
157 { CR252, 0x34 },
158 /* This value is different for 7230 (was: 0xff) */
159 { CR253, 0x34 },
160
161 /* PLL_OFF */
162 { CR251, 0x2f },
163 };
164
165 static const struct zd_ioreq16 ioreqs_2[] = {
166 { CR251, 0x3f }, /* PLL_ON */
167 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
168 { CR38, 0x38 }, { CR136, 0xdf },
169 };
170
171 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
172 if (r)
173 return r;
174
175 r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
176 if (r)
177 return r;
178
179 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
180 if (r)
181 return r;
182
183 r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
184 if (r)
185 return r;
186
187 r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
188 if (r)
189 return r;
190
191 r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
192 if (r)
193 return r;
194
195 r = zd_iowrite16_locked(chip, 0x06, CR203);
196 if (r)
197 return r;
198 r = zd_iowrite16_locked(chip, 0x80, CR240);
199 if (r)
200 return r;
201
202 return 0;
203 }
204
205 static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
206 {
207 int r;
208 struct zd_chip *chip = zd_rf_to_chip(rf);
209
210 static const struct zd_ioreq16 ioreqs_1[] = {
211 { CR240, 0x57 }, { CR9, 0x9 },
212 { },
213 { CR10, 0x8b }, { CR15, 0x20 },
214 { CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
215 { CR20, 0x10 }, /* 4N25->Stone Request */
216 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
217 { CR28, 0x3e }, { CR29, 0x00 },
218 { CR33, 0x28 }, /* 5613 */
219 { CR34, 0x30 },
220 { CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
221 { CR41, 0x24 }, { CR44, 0x32 },
222 { CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
223 { CR47, 0x1e },
224
225 /* ZD1215 5610 */
226 { CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 },
227 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
228 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
229 { CR69, 0x28 },
230
231 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
232 { CR87, 0x0A }, { CR89, 0x04 },
233 { CR90, 0x58 }, /* 5112 */
234 { CR91, 0x00 }, /* 5613 */
235 { CR92, 0x0a },
236 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
237 { CR99, 0x00 }, { CR100, 0x02 }, { CR101, 0x13 },
238 { CR102, 0x27 },
239 { CR106, 0x20 }, /* change to 0x24 for AL7230B */
240 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
241 { CR112, 0x1f },
242 };
243
244 static const struct zd_ioreq16 ioreqs_new_phy[] = {
245 { CR107, 0x28 },
246 { CR110, 0x1f }, /* 5127, 0x13->0x1f */
247 { CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
248 { CR116, 0x2a }, { CR118, 0xfa }, { CR119, 0x12 },
249 { CR121, 0x6c }, /* 5613 */
250 };
251
252 static const struct zd_ioreq16 ioreqs_old_phy[] = {
253 { CR107, 0x24 },
254 { CR110, 0x13 }, /* 5127, 0x13->0x1f */
255 { CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
256 { CR116, 0x24 }, { CR118, 0xfc }, { CR119, 0x11 },
257 { CR121, 0x6a }, /* 5613 */
258 };
259
260 static const struct zd_ioreq16 ioreqs_2[] = {
261 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x24 },
262 { CR117, 0xfa }, { CR120, 0x4f },
263 { CR122, 0xfc }, /* E0->FCh at 4901 */
264 { CR123, 0x57 }, /* 5613 */
265 { CR125, 0xad }, /* 4804, for 1212 new algorithm */
266 { CR126, 0x6c }, /* 5613 */
267 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
268 { CR130, 0x10 },
269 { CR131, 0x00 }, /* 5112 */
270 { CR137, 0x50 }, /* 5613 */
271 { CR138, 0xa8 }, /* 5112 */
272 { CR144, 0xac }, /* 5613 */
273 { CR148, 0x40 }, /* 5112 */
274 { CR149, 0x40 }, /* 4O07, 50->40 */
275 { CR150, 0x1a }, /* 5112, 0C->1A */
276 { CR252, 0x34 }, { CR253, 0x34 },
277 { CR251, 0x2f }, /* PLL_OFF */
278 };
279
280 static const struct zd_ioreq16 ioreqs_3[] = {
281 { CR251, 0x7f }, /* PLL_ON */
282 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
283 { CR38, 0x38 }, { CR136, 0xdf },
284 };
285
286 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
287 if (r)
288 return r;
289
290 if (chip->new_phy_layout)
291 r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
292 ARRAY_SIZE(ioreqs_new_phy));
293 else
294 r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
295 ARRAY_SIZE(ioreqs_old_phy));
296 if (r)
297 return r;
298
299 r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
300 if (r)
301 return r;
302
303 r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
304 if (r)
305 return r;
306
307 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
308 if (r)
309 return r;
310
311 r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
312 if (r)
313 return r;
314
315 r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
316 if (r)
317 return r;
318
319 r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
320 if (r)
321 return r;
322
323 return zd1211b_al7230b_finalize(chip);
324 }
325
326 static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
327 {
328 int r;
329 const u32 *rv = chan_rv[channel-1];
330 struct zd_chip *chip = zd_rf_to_chip(rf);
331
332 static const struct zd_ioreq16 ioreqs[] = {
333 /* PLL_ON */
334 { CR251, 0x3f },
335 { CR203, 0x06 }, { CR240, 0x08 },
336 };
337
338 r = zd_iowrite16_locked(chip, 0x57, CR240);
339 if (r)
340 return r;
341
342 /* PLL_OFF */
343 r = zd_iowrite16_locked(chip, 0x2f, CR251);
344 if (r)
345 return r;
346
347 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
348 if (r)
349 return r;
350
351 r = zd_rfwrite_cr_locked(chip, 0x3c9000);
352 if (r)
353 return r;
354 r = zd_rfwrite_cr_locked(chip, 0xf15d58);
355 if (r)
356 return r;
357
358 r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
359 if (r)
360 return r;
361
362 r = zd_rfwritev_cr_locked(chip, rv, 2);
363 if (r)
364 return r;
365
366 r = zd_rfwrite_cr_locked(chip, 0x3c9000);
367 if (r)
368 return r;
369
370 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
371 }
372
373 static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
374 {
375 int r;
376 const u32 *rv = chan_rv[channel-1];
377 struct zd_chip *chip = zd_rf_to_chip(rf);
378
379 r = zd_iowrite16_locked(chip, 0x57, CR240);
380 if (r)
381 return r;
382 r = zd_iowrite16_locked(chip, 0xe4, CR9);
383 if (r)
384 return r;
385
386 /* PLL_OFF */
387 r = zd_iowrite16_locked(chip, 0x2f, CR251);
388 if (r)
389 return r;
390 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
391 if (r)
392 return r;
393
394 r = zd_rfwrite_cr_locked(chip, 0x3c9000);
395 if (r)
396 return r;
397 r = zd_rfwrite_cr_locked(chip, 0xf15d58);
398 if (r)
399 return r;
400
401 r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
402 if (r)
403 return r;
404
405 r = zd_rfwritev_cr_locked(chip, rv, 2);
406 if (r)
407 return r;
408
409 r = zd_rfwrite_cr_locked(chip, 0x3c9000);
410 if (r)
411 return r;
412
413 r = zd_iowrite16_locked(chip, 0x7f, CR251);
414 if (r)
415 return r;
416
417 return zd1211b_al7230b_finalize(chip);
418 }
419
420 static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
421 {
422 struct zd_chip *chip = zd_rf_to_chip(rf);
423 static const struct zd_ioreq16 ioreqs[] = {
424 { CR11, 0x00 },
425 { CR251, 0x3f },
426 };
427
428 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
429 }
430
431 static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
432 {
433 struct zd_chip *chip = zd_rf_to_chip(rf);
434 static const struct zd_ioreq16 ioreqs[] = {
435 { CR11, 0x00 },
436 { CR251, 0x7f },
437 };
438
439 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
440 }
441
442 static int al7230b_switch_radio_off(struct zd_rf *rf)
443 {
444 struct zd_chip *chip = zd_rf_to_chip(rf);
445 static const struct zd_ioreq16 ioreqs[] = {
446 { CR11, 0x04 },
447 { CR251, 0x2f },
448 };
449
450 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
451 }
452
453 /* ZD1211B+AL7230B 6m band edge patching differs slightly from other
454 * configurations */
455 static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
456 {
457 struct zd_chip *chip = zd_rf_to_chip(rf);
458 struct zd_ioreq16 ioreqs[] = {
459 { CR128, 0x14 }, { CR129, 0x12 },
460 };
461
462 /* FIXME: Channel 11 is not the edge for all regulatory domains. */
463 if (channel == 1) {
464 ioreqs[0].value = 0x0e;
465 ioreqs[1].value = 0x10;
466 } else if (channel == 11) {
467 ioreqs[0].value = 0x10;
468 ioreqs[1].value = 0x10;
469 }
470
471 dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
472 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
473 }
474
475 int zd_rf_init_al7230b(struct zd_rf *rf)
476 {
477 struct zd_chip *chip = zd_rf_to_chip(rf);
478
479 if (zd_chip_is_zd1211b(chip)) {
480 rf->init_hw = zd1211b_al7230b_init_hw;
481 rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
482 rf->set_channel = zd1211b_al7230b_set_channel;
483 rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
484 } else {
485 rf->init_hw = zd1211_al7230b_init_hw;
486 rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
487 rf->set_channel = zd1211_al7230b_set_channel;
488 rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
489 rf->patch_cck_gain = 1;
490 }
491
492 rf->switch_radio_off = al7230b_switch_radio_off;
493
494 return 0;
495 }
496
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