Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ]
Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 #ifndef PRISM54USB_H
  2 #define PRISM54USB_H
  3 
  4 /*
  5  * Defines for USB based mac80211 Prism54 driver
  6  *
  7  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  8  *
  9  * Based on the islsm (softmac prism54) driver, which is:
 10  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
 11  *
 12  * This program is free software; you can redistribute it and/or modify
 13  * it under the terms of the GNU General Public License version 2 as
 14  * published by the Free Software Foundation.
 15  */
 16 
 17 /* for isl3886 register definitions used on ver 1 devices */
 18 #include "p54pci.h"
 19 #include "net2280.h"
 20 
 21 /* pci */
 22 #define NET2280_BASE            0x10000000
 23 #define NET2280_BASE2           0x20000000
 24 
 25 /* gpio */
 26 #define P54U_BRG_POWER_UP       (1 << GPIO0_DATA)
 27 #define P54U_BRG_POWER_DOWN     (1 << GPIO1_DATA)
 28 
 29 /* devinit */
 30 #define NET2280_CLK_4Mhz        (15 << LOCAL_CLOCK_FREQUENCY)
 31 #define NET2280_CLK_30Mhz       (2 << LOCAL_CLOCK_FREQUENCY)
 32 #define NET2280_CLK_60Mhz       (1 << LOCAL_CLOCK_FREQUENCY)
 33 #define NET2280_CLK_STOP        (0 << LOCAL_CLOCK_FREQUENCY)
 34 #define NET2280_PCI_ENABLE      (1 << PCI_ENABLE)
 35 #define NET2280_PCI_SOFT_RESET  (1 << PCI_SOFT_RESET)
 36 
 37 /* endpoints */
 38 #define NET2280_CLEAR_NAK_OUT_PACKETS_MODE      (1 << CLEAR_NAK_OUT_PACKETS_MODE)
 39 #define NET2280_FIFO_FLUSH                      (1 << FIFO_FLUSH)
 40 
 41 /* irq */
 42 #define NET2280_USB_INTERRUPT_ENABLE            (1 << USB_INTERRUPT_ENABLE)
 43 #define NET2280_PCI_INTA_INTERRUPT              (1 << PCI_INTA_INTERRUPT)
 44 #define NET2280_PCI_INTA_INTERRUPT_ENABLE       (1 << PCI_INTA_INTERRUPT_ENABLE)
 45 
 46 /* registers */
 47 #define NET2280_DEVINIT         0x00
 48 #define NET2280_USBIRQENB1      0x24
 49 #define NET2280_IRQSTAT1        0x2c
 50 #define NET2280_FIFOCTL         0x38
 51 #define NET2280_GPIOCTL         0x50
 52 #define NET2280_RELNUM          0x88
 53 #define NET2280_EPA_RSP         0x324
 54 #define NET2280_EPA_STAT        0x32c
 55 #define NET2280_EPB_STAT        0x34c
 56 #define NET2280_EPC_RSP         0x364
 57 #define NET2280_EPC_STAT        0x36c
 58 #define NET2280_EPD_STAT        0x38c
 59 
 60 #define NET2280_EPA_CFG     0x320
 61 #define NET2280_EPB_CFG     0x340
 62 #define NET2280_EPC_CFG     0x360
 63 #define NET2280_EPD_CFG     0x380
 64 #define NET2280_EPE_CFG     0x3A0
 65 #define NET2280_EPF_CFG     0x3C0
 66 #define P54U_DEV_BASE 0x40000000
 67 
 68 struct net2280_tx_hdr {
 69         __le32 device_addr;
 70         __le16 len;
 71         __le16 follower;        /* ? */
 72         u8 padding[8];
 73 } __attribute__((packed));
 74 
 75 /* Some flags for the isl hardware registers controlling DMA inside the
 76  * chip */
 77 #define ISL38XX_DMA_STATUS_DONE                 0x00000001
 78 #define ISL38XX_DMA_STATUS_READY                0x00000002
 79 #define NET2280_EPA_FIFO_PCI_ADDR               0x20000000
 80 #define ISL38XX_DMA_MASTER_CONTROL_TRIGGER      0x00000004
 81 
 82 enum net2280_op_type {
 83         NET2280_BRG_U32         = 0x001F,
 84         NET2280_BRG_CFG_U32     = 0x000F,
 85         NET2280_BRG_CFG_U16     = 0x0003,
 86         NET2280_DEV_U32         = 0x080F,
 87         NET2280_DEV_CFG_U32     = 0x088F,
 88         NET2280_DEV_CFG_U16     = 0x0883
 89 };
 90 
 91 #define P54U_FW_BLOCK 2048
 92 
 93 #define X2_SIGNATURE "x2  "
 94 #define X2_SIGNATURE_SIZE 4
 95 
 96 struct x2_header {
 97         u8 signature[X2_SIGNATURE_SIZE];
 98         __le32 fw_load_addr;
 99         __le32 fw_length;
100         __le32 crc;
101 } __attribute__((packed));
102 
103 /* pipes 3 and 4 are not used by the driver */
104 #define P54U_PIPE_NUMBER 9
105 
106 enum p54u_pipe_addr {
107         P54U_PIPE_DATA = 0x01,
108         P54U_PIPE_MGMT = 0x02,
109         P54U_PIPE_3 = 0x03,
110         P54U_PIPE_4 = 0x04,
111         P54U_PIPE_BRG = 0x0d,
112         P54U_PIPE_DEV = 0x0e,
113         P54U_PIPE_INT = 0x0f
114 };
115 
116 struct p54u_rx_info {
117         struct urb *urb;
118         struct ieee80211_hw *dev;
119 };
120 
121 struct p54u_priv {
122         struct p54_common common;
123         struct usb_device *udev;
124         enum {
125                 P54U_NET2280 = 0,
126                 P54U_3887
127         } hw_type;
128 
129         spinlock_t lock;
130         struct sk_buff_head rx_queue;
131 };
132 
133 #endif /* PRISM54USB_H */
134 
  This page was automatically generated by the LXR engine.