1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
62
63
64 #include <linux/kernel.h>
65 #include <linux/module.h>
66 #include <linux/init.h>
67
68 #include <net/mac80211.h>
69
70 #include "iwl-commands.h"
71 #include "iwl-dev.h"
72 #include "iwl-core.h"
73 #include "iwl-debug.h"
74 #include "iwl-eeprom.h"
75 #include "iwl-io.h"
76
77 /************************** EEPROM BANDS ****************************
78 *
79 * The iwl_eeprom_band definitions below provide the mapping from the
80 * EEPROM contents to the specific channel number supported for each
81 * band.
82 *
83 * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
84 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
85 * The specific geography and calibration information for that channel
86 * is contained in the eeprom map itself.
87 *
88 * During init, we copy the eeprom information and channel map
89 * information into priv->channel_info_24/52 and priv->channel_map_24/52
90 *
91 * channel_map_24/52 provides the index in the channel_info array for a
92 * given channel. We have to have two separate maps as there is channel
93 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
94 * band_2
95 *
96 * A value of 0xff stored in the channel_map indicates that the channel
97 * is not supported by the hardware at all.
98 *
99 * A value of 0xfe in the channel_map indicates that the channel is not
100 * valid for Tx with the current hardware. This means that
101 * while the system can tune and receive on a given channel, it may not
102 * be able to associate or transmit any frames on that
103 * channel. There is no corresponding channel information for that
104 * entry.
105 *
106 *********************************************************************/
107
108 /* 2.4 GHz */
109 const u8 iwl_eeprom_band_1[14] = {
110 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
111 };
112
113 /* 5.2 GHz bands */
114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
115 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
116 };
117
118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
119 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
120 };
121
122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
123 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
124 };
125
126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
127 145, 149, 153, 157, 161, 165
128 };
129
130 static const u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
131 1, 2, 3, 4, 5, 6, 7
132 };
133
134 static const u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
135 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
136 };
137
138 /******************************************************************************
139 *
140 * EEPROM related functions
141 *
142 ******************************************************************************/
143
144 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
145 {
146 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
147 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
148 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
149 return -ENOENT;
150 }
151 return 0;
152 }
153 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
154
155 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
156 {
157 u32 otpgp;
158
159 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
160 if (mode == IWL_OTP_ACCESS_ABSOLUTE)
161 iwl_clear_bit(priv, CSR_OTP_GP_REG,
162 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
163 else
164 iwl_set_bit(priv, CSR_OTP_GP_REG,
165 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
166 }
167
168 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
169 {
170 u32 otpgp;
171 int nvm_type;
172
173 /* OTP only valid for CP/PP and after */
174 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
175 case CSR_HW_REV_TYPE_3945:
176 case CSR_HW_REV_TYPE_4965:
177 case CSR_HW_REV_TYPE_5300:
178 case CSR_HW_REV_TYPE_5350:
179 case CSR_HW_REV_TYPE_5100:
180 case CSR_HW_REV_TYPE_5150:
181 nvm_type = NVM_DEVICE_TYPE_EEPROM;
182 break;
183 default:
184 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
185 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
186 nvm_type = NVM_DEVICE_TYPE_OTP;
187 else
188 nvm_type = NVM_DEVICE_TYPE_EEPROM;
189 break;
190 }
191 return nvm_type;
192 }
193
194 /*
195 * The device's EEPROM semaphore prevents conflicts between driver and uCode
196 * when accessing the EEPROM; each access is a series of pulses to/from the
197 * EEPROM chip, not a single event, so even reads could conflict if they
198 * weren't arbitrated by the semaphore.
199 */
200 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
201 {
202 u16 count;
203 int ret;
204
205 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
206 /* Request semaphore */
207 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
208 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
209
210 /* See if we got it */
211 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
212 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
213 EEPROM_SEM_TIMEOUT);
214 if (ret >= 0) {
215 IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
216 count+1);
217 return ret;
218 }
219 }
220
221 return ret;
222 }
223 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
224
225 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
226 {
227 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
228 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
229
230 }
231 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
232
233 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
234 {
235 BUG_ON(offset >= priv->cfg->eeprom_size);
236 return &priv->eeprom[offset];
237 }
238 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
239
240 static int iwl_init_otp_access(struct iwl_priv *priv)
241 {
242 int ret;
243
244 /* Enable 40MHz radio clock */
245 _iwl_write32(priv, CSR_GP_CNTRL,
246 _iwl_read32(priv, CSR_GP_CNTRL) |
247 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
248
249 /* wait for clock to be ready */
250 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
251 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
252 25000);
253 if (ret < 0)
254 IWL_ERR(priv, "Time out access OTP\n");
255 else {
256 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
257 APMG_PS_CTRL_VAL_RESET_REQ);
258 udelay(5);
259 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
260 APMG_PS_CTRL_VAL_RESET_REQ);
261 }
262 return ret;
263 }
264
265 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
266 {
267 int ret = 0;
268 u32 r;
269 u32 otpgp;
270
271 _iwl_write32(priv, CSR_EEPROM_REG,
272 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
273 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
274 CSR_EEPROM_REG_READ_VALID_MSK,
275 IWL_EEPROM_ACCESS_TIMEOUT);
276 if (ret < 0) {
277 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
278 return ret;
279 }
280 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
281 /* check for ECC errors: */
282 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
283 if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
284 /* stop in this case */
285 /* set the uncorrectable OTP ECC bit for acknowledgement */
286 iwl_set_bit(priv, CSR_OTP_GP_REG,
287 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
288 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
289 return -EINVAL;
290 }
291 if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
292 /* continue in this case */
293 /* set the correctable OTP ECC bit for acknowledgement */
294 iwl_set_bit(priv, CSR_OTP_GP_REG,
295 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
296 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
297 }
298 *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
299 return 0;
300 }
301
302 /*
303 * iwl_is_otp_empty: check for empty OTP
304 */
305 static bool iwl_is_otp_empty(struct iwl_priv *priv)
306 {
307 u16 next_link_addr = 0, link_value;
308 bool is_empty = false;
309
310 /* locate the beginning of OTP link list */
311 if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
312 if (!link_value) {
313 IWL_ERR(priv, "OTP is empty\n");
314 is_empty = true;
315 }
316 } else {
317 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
318 is_empty = true;
319 }
320
321 return is_empty;
322 }
323
324
325 /*
326 * iwl_find_otp_image: find EEPROM image in OTP
327 * finding the OTP block that contains the EEPROM image.
328 * the last valid block on the link list (the block _before_ the last block)
329 * is the block we should read and used to configure the device.
330 * If all the available OTP blocks are full, the last block will be the block
331 * we should read and used to configure the device.
332 * only perform this operation if shadow RAM is disabled
333 */
334 static int iwl_find_otp_image(struct iwl_priv *priv,
335 u16 *validblockaddr)
336 {
337 u16 next_link_addr = 0, link_value = 0, valid_addr;
338 int usedblocks = 0;
339
340 /* set addressing mode to absolute to traverse the link list */
341 iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
342
343 /* checking for empty OTP or error */
344 if (iwl_is_otp_empty(priv))
345 return -EINVAL;
346
347 /*
348 * start traverse link list
349 * until reach the max number of OTP blocks
350 * different devices have different number of OTP blocks
351 */
352 do {
353 /* save current valid block address
354 * check for more block on the link list
355 */
356 valid_addr = next_link_addr;
357 next_link_addr = link_value * sizeof(u16);
358 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
359 usedblocks, next_link_addr);
360 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
361 return -EINVAL;
362 if (!link_value) {
363 /*
364 * reach the end of link list, return success and
365 * set address point to the starting address
366 * of the image
367 */
368 *validblockaddr = valid_addr;
369 /* skip first 2 bytes (link list pointer) */
370 *validblockaddr += 2;
371 return 0;
372 }
373 /* more in the link list, continue */
374 usedblocks++;
375 } while (usedblocks <= priv->cfg->max_ll_items);
376
377 /* OTP has no valid blocks */
378 IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
379 return -EINVAL;
380 }
381
382 /**
383 * iwl_eeprom_init - read EEPROM contents
384 *
385 * Load the EEPROM contents from adapter into priv->eeprom
386 *
387 * NOTE: This routine uses the non-debug IO access functions.
388 */
389 int iwl_eeprom_init(struct iwl_priv *priv)
390 {
391 u16 *e;
392 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
393 int sz;
394 int ret;
395 u16 addr;
396 u16 validblockaddr = 0;
397 u16 cache_addr = 0;
398
399 priv->nvm_device_type = iwlcore_get_nvm_type(priv);
400
401 /* allocate eeprom */
402 IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
403 sz = priv->cfg->eeprom_size;
404 priv->eeprom = kzalloc(sz, GFP_KERNEL);
405 if (!priv->eeprom) {
406 ret = -ENOMEM;
407 goto alloc_err;
408 }
409 e = (u16 *)priv->eeprom;
410
411 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
412 if (ret < 0) {
413 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
414 ret = -ENOENT;
415 goto err;
416 }
417
418 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
419 ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
420 if (ret < 0) {
421 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
422 ret = -ENOENT;
423 goto err;
424 }
425 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
426 ret = iwl_init_otp_access(priv);
427 if (ret) {
428 IWL_ERR(priv, "Failed to initialize OTP access.\n");
429 ret = -ENOENT;
430 goto done;
431 }
432 _iwl_write32(priv, CSR_EEPROM_GP,
433 iwl_read32(priv, CSR_EEPROM_GP) &
434 ~CSR_EEPROM_GP_IF_OWNER_MSK);
435
436 iwl_set_bit(priv, CSR_OTP_GP_REG,
437 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
438 CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
439 /* traversing the linked list if no shadow ram supported */
440 if (!priv->cfg->shadow_ram_support) {
441 if (iwl_find_otp_image(priv, &validblockaddr)) {
442 ret = -ENOENT;
443 goto done;
444 }
445 }
446 for (addr = validblockaddr; addr < validblockaddr + sz;
447 addr += sizeof(u16)) {
448 u16 eeprom_data;
449
450 ret = iwl_read_otp_word(priv, addr, &eeprom_data);
451 if (ret)
452 goto done;
453 e[cache_addr / 2] = eeprom_data;
454 cache_addr += sizeof(u16);
455 }
456 } else {
457 /* eeprom is an array of 16bit values */
458 for (addr = 0; addr < sz; addr += sizeof(u16)) {
459 u32 r;
460
461 _iwl_write32(priv, CSR_EEPROM_REG,
462 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
463
464 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
465 CSR_EEPROM_REG_READ_VALID_MSK,
466 IWL_EEPROM_ACCESS_TIMEOUT);
467 if (ret < 0) {
468 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
469 goto done;
470 }
471 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
472 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
473 }
474 }
475 ret = 0;
476 done:
477 priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
478 err:
479 if (ret)
480 iwl_eeprom_free(priv);
481 alloc_err:
482 return ret;
483 }
484 EXPORT_SYMBOL(iwl_eeprom_init);
485
486 void iwl_eeprom_free(struct iwl_priv *priv)
487 {
488 kfree(priv->eeprom);
489 priv->eeprom = NULL;
490 }
491 EXPORT_SYMBOL(iwl_eeprom_free);
492
493 int iwl_eeprom_check_version(struct iwl_priv *priv)
494 {
495 u16 eeprom_ver;
496 u16 calib_ver;
497
498 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
499 calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
500
501 if (eeprom_ver < priv->cfg->eeprom_ver ||
502 calib_ver < priv->cfg->eeprom_calib_ver)
503 goto err;
504
505 return 0;
506 err:
507 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
508 eeprom_ver, priv->cfg->eeprom_ver,
509 calib_ver, priv->cfg->eeprom_calib_ver);
510 return -EINVAL;
511
512 }
513 EXPORT_SYMBOL(iwl_eeprom_check_version);
514
515 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
516 {
517 return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
518 }
519 EXPORT_SYMBOL(iwl_eeprom_query_addr);
520
521 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
522 {
523 if (!priv->eeprom)
524 return 0;
525 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
526 }
527 EXPORT_SYMBOL(iwl_eeprom_query16);
528
529 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
530 {
531 const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
532 EEPROM_MAC_ADDRESS);
533 memcpy(mac, addr, ETH_ALEN);
534 }
535 EXPORT_SYMBOL(iwl_eeprom_get_mac);
536
537 static void iwl_init_band_reference(const struct iwl_priv *priv,
538 int eep_band, int *eeprom_ch_count,
539 const struct iwl_eeprom_channel **eeprom_ch_info,
540 const u8 **eeprom_ch_index)
541 {
542 u32 offset = priv->cfg->ops->lib->
543 eeprom_ops.regulatory_bands[eep_band - 1];
544 switch (eep_band) {
545 case 1: /* 2.4GHz band */
546 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
547 *eeprom_ch_info = (struct iwl_eeprom_channel *)
548 iwl_eeprom_query_addr(priv, offset);
549 *eeprom_ch_index = iwl_eeprom_band_1;
550 break;
551 case 2: /* 4.9GHz band */
552 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
553 *eeprom_ch_info = (struct iwl_eeprom_channel *)
554 iwl_eeprom_query_addr(priv, offset);
555 *eeprom_ch_index = iwl_eeprom_band_2;
556 break;
557 case 3: /* 5.2GHz band */
558 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
559 *eeprom_ch_info = (struct iwl_eeprom_channel *)
560 iwl_eeprom_query_addr(priv, offset);
561 *eeprom_ch_index = iwl_eeprom_band_3;
562 break;
563 case 4: /* 5.5GHz band */
564 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
565 *eeprom_ch_info = (struct iwl_eeprom_channel *)
566 iwl_eeprom_query_addr(priv, offset);
567 *eeprom_ch_index = iwl_eeprom_band_4;
568 break;
569 case 5: /* 5.7GHz band */
570 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
571 *eeprom_ch_info = (struct iwl_eeprom_channel *)
572 iwl_eeprom_query_addr(priv, offset);
573 *eeprom_ch_index = iwl_eeprom_band_5;
574 break;
575 case 6: /* 2.4GHz FAT channels */
576 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
577 *eeprom_ch_info = (struct iwl_eeprom_channel *)
578 iwl_eeprom_query_addr(priv, offset);
579 *eeprom_ch_index = iwl_eeprom_band_6;
580 break;
581 case 7: /* 5 GHz FAT channels */
582 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
583 *eeprom_ch_info = (struct iwl_eeprom_channel *)
584 iwl_eeprom_query_addr(priv, offset);
585 *eeprom_ch_index = iwl_eeprom_band_7;
586 break;
587 default:
588 BUG();
589 return;
590 }
591 }
592
593 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
594 ? # x " " : "")
595
596 /**
597 * iwl_set_fat_chan_info - Copy fat channel info into driver's priv.
598 *
599 * Does not set up a command, or touch hardware.
600 */
601 static int iwl_set_fat_chan_info(struct iwl_priv *priv,
602 enum ieee80211_band band, u16 channel,
603 const struct iwl_eeprom_channel *eeprom_ch,
604 u8 fat_extension_channel)
605 {
606 struct iwl_channel_info *ch_info;
607
608 ch_info = (struct iwl_channel_info *)
609 iwl_get_channel_info(priv, band, channel);
610
611 if (!is_channel_valid(ch_info))
612 return -1;
613
614 IWL_DEBUG_INFO(priv, "FAT Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
615 " Ad-Hoc %ssupported\n",
616 ch_info->channel,
617 is_channel_a_band(ch_info) ?
618 "5.2" : "2.4",
619 CHECK_AND_PRINT(IBSS),
620 CHECK_AND_PRINT(ACTIVE),
621 CHECK_AND_PRINT(RADAR),
622 CHECK_AND_PRINT(WIDE),
623 CHECK_AND_PRINT(DFS),
624 eeprom_ch->flags,
625 eeprom_ch->max_power_avg,
626 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
627 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
628 "" : "not ");
629
630 ch_info->fat_eeprom = *eeprom_ch;
631 ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
632 ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
633 ch_info->fat_min_power = 0;
634 ch_info->fat_scan_power = eeprom_ch->max_power_avg;
635 ch_info->fat_flags = eeprom_ch->flags;
636 ch_info->fat_extension_channel = fat_extension_channel;
637
638 return 0;
639 }
640
641 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
642 ? # x " " : "")
643
644 /**
645 * iwl_init_channel_map - Set up driver's info for all possible channels
646 */
647 int iwl_init_channel_map(struct iwl_priv *priv)
648 {
649 int eeprom_ch_count = 0;
650 const u8 *eeprom_ch_index = NULL;
651 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
652 int band, ch;
653 struct iwl_channel_info *ch_info;
654
655 if (priv->channel_count) {
656 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
657 return 0;
658 }
659
660 IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
661
662 priv->channel_count =
663 ARRAY_SIZE(iwl_eeprom_band_1) +
664 ARRAY_SIZE(iwl_eeprom_band_2) +
665 ARRAY_SIZE(iwl_eeprom_band_3) +
666 ARRAY_SIZE(iwl_eeprom_band_4) +
667 ARRAY_SIZE(iwl_eeprom_band_5);
668
669 IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
670
671 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
672 priv->channel_count, GFP_KERNEL);
673 if (!priv->channel_info) {
674 IWL_ERR(priv, "Could not allocate channel_info\n");
675 priv->channel_count = 0;
676 return -ENOMEM;
677 }
678
679 ch_info = priv->channel_info;
680
681 /* Loop through the 5 EEPROM bands adding them in order to the
682 * channel map we maintain (that contains additional information than
683 * what just in the EEPROM) */
684 for (band = 1; band <= 5; band++) {
685
686 iwl_init_band_reference(priv, band, &eeprom_ch_count,
687 &eeprom_ch_info, &eeprom_ch_index);
688
689 /* Loop through each band adding each of the channels */
690 for (ch = 0; ch < eeprom_ch_count; ch++) {
691 ch_info->channel = eeprom_ch_index[ch];
692 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
693 IEEE80211_BAND_5GHZ;
694
695 /* permanently store EEPROM's channel regulatory flags
696 * and max power in channel info database. */
697 ch_info->eeprom = eeprom_ch_info[ch];
698
699 /* Copy the run-time flags so they are there even on
700 * invalid channels */
701 ch_info->flags = eeprom_ch_info[ch].flags;
702 /* First write that fat is not enabled, and then enable
703 * one by one */
704 ch_info->fat_extension_channel =
705 (IEEE80211_CHAN_NO_HT40PLUS |
706 IEEE80211_CHAN_NO_HT40MINUS);
707
708 if (!(is_channel_valid(ch_info))) {
709 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
710 "No traffic\n",
711 ch_info->channel,
712 ch_info->flags,
713 is_channel_a_band(ch_info) ?
714 "5.2" : "2.4");
715 ch_info++;
716 continue;
717 }
718
719 /* Initialize regulatory-based run-time data */
720 ch_info->max_power_avg = ch_info->curr_txpow =
721 eeprom_ch_info[ch].max_power_avg;
722 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
723 ch_info->min_power = 0;
724
725 IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
726 " Ad-Hoc %ssupported\n",
727 ch_info->channel,
728 is_channel_a_band(ch_info) ?
729 "5.2" : "2.4",
730 CHECK_AND_PRINT_I(VALID),
731 CHECK_AND_PRINT_I(IBSS),
732 CHECK_AND_PRINT_I(ACTIVE),
733 CHECK_AND_PRINT_I(RADAR),
734 CHECK_AND_PRINT_I(WIDE),
735 CHECK_AND_PRINT_I(DFS),
736 eeprom_ch_info[ch].flags,
737 eeprom_ch_info[ch].max_power_avg,
738 ((eeprom_ch_info[ch].
739 flags & EEPROM_CHANNEL_IBSS)
740 && !(eeprom_ch_info[ch].
741 flags & EEPROM_CHANNEL_RADAR))
742 ? "" : "not ");
743
744 /* Set the tx_power_user_lmt to the highest power
745 * supported by any channel */
746 if (eeprom_ch_info[ch].max_power_avg >
747 priv->tx_power_user_lmt)
748 priv->tx_power_user_lmt =
749 eeprom_ch_info[ch].max_power_avg;
750
751 ch_info++;
752 }
753 }
754
755 /* Check if we do have FAT channels */
756 if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
757 EEPROM_REGULATORY_BAND_NO_FAT &&
758 priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
759 EEPROM_REGULATORY_BAND_NO_FAT)
760 return 0;
761
762 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
763 for (band = 6; band <= 7; band++) {
764 enum ieee80211_band ieeeband;
765 u8 fat_extension_chan;
766
767 iwl_init_band_reference(priv, band, &eeprom_ch_count,
768 &eeprom_ch_info, &eeprom_ch_index);
769
770 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
771 ieeeband =
772 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
773
774 /* Loop through each band adding each of the channels */
775 for (ch = 0; ch < eeprom_ch_count; ch++) {
776
777 if ((band == 6) &&
778 ((eeprom_ch_index[ch] == 5) ||
779 (eeprom_ch_index[ch] == 6) ||
780 (eeprom_ch_index[ch] == 7)))
781 /* both are allowed: above and below */
782 fat_extension_chan = 0;
783 else
784 fat_extension_chan =
785 IEEE80211_CHAN_NO_HT40MINUS;
786
787 /* Set up driver's info for lower half */
788 iwl_set_fat_chan_info(priv, ieeeband,
789 eeprom_ch_index[ch],
790 &(eeprom_ch_info[ch]),
791 fat_extension_chan);
792
793 /* Set up driver's info for upper half */
794 iwl_set_fat_chan_info(priv, ieeeband,
795 (eeprom_ch_index[ch] + 4),
796 &(eeprom_ch_info[ch]),
797 IEEE80211_CHAN_NO_HT40PLUS);
798 }
799 }
800
801 return 0;
802 }
803 EXPORT_SYMBOL(iwl_init_channel_map);
804
805 /*
806 * iwl_free_channel_map - undo allocations in iwl_init_channel_map
807 */
808 void iwl_free_channel_map(struct iwl_priv *priv)
809 {
810 kfree(priv->channel_info);
811 priv->channel_count = 0;
812 }
813 EXPORT_SYMBOL(iwl_free_channel_map);
814
815 /**
816 * iwl_get_channel_info - Find driver's private channel info
817 *
818 * Based on band and channel number.
819 */
820 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
821 enum ieee80211_band band, u16 channel)
822 {
823 int i;
824
825 switch (band) {
826 case IEEE80211_BAND_5GHZ:
827 for (i = 14; i < priv->channel_count; i++) {
828 if (priv->channel_info[i].channel == channel)
829 return &priv->channel_info[i];
830 }
831 break;
832 case IEEE80211_BAND_2GHZ:
833 if (channel >= 1 && channel <= 14)
834 return &priv->channel_info[channel - 1];
835 break;
836 default:
837 BUG();
838 }
839
840 return NULL;
841 }
842 EXPORT_SYMBOL(iwl_get_channel_info);
843
844
|
This page was automatically generated by the
LXR engine.
|