1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119 ret = iwl_check_rxon_cmd(priv);
120 if (ret) {
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 return -EINVAL;
123 }
124
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
130 if (ret) {
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132 return ret;
133 }
134
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136 return 0;
137 }
138
139 /* station table will be cleared */
140 priv->assoc_station_added = 0;
141
142 /* If we are currently associated and the new config requires
143 * an RXON_ASSOC and the new config wants the associated mask enabled,
144 * we must clear the associated from the active configuration
145 * before we apply the new config */
146 if (iwl_is_associated(priv) && new_assoc) {
147 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
149
150 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151 sizeof(struct iwl_rxon_cmd),
152 &priv->active_rxon);
153
154 /* If the mask clearing failed then we set
155 * active_rxon back to what it was previously */
156 if (ret) {
157 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
159 return ret;
160 }
161 }
162
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
165 "* channel = %d\n"
166 "* bssid = %pM\n",
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
170
171 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
172
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode, send it before
175 * we add the bcast station. If assoc bit is set, we will send RXON
176 * after having added the bcast and bssid station.
177 */
178 if (!new_assoc) {
179 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
181 if (ret) {
182 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
183 return ret;
184 }
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186 }
187
188 iwl_clear_stations_table(priv);
189
190 priv->start_calib = 0;
191
192 /* Add the broadcast address so we can send broadcast frames */
193 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194 IWL_INVALID_STATION) {
195 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
196 return -EIO;
197 }
198
199 /* If we have set the ASSOC_MSK and we are in BSS mode then
200 * add the IWL_AP_ID to the station rate table */
201 if (new_assoc) {
202 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203 ret = iwl_rxon_add_station(priv,
204 priv->active_rxon.bssid_addr, 1);
205 if (ret == IWL_INVALID_STATION) {
206 IWL_ERR(priv,
207 "Error adding AP address for TX.\n");
208 return -EIO;
209 }
210 priv->assoc_station_added = 1;
211 if (priv->default_wep_key &&
212 iwl_send_static_wepkey_cmd(priv, 0))
213 IWL_ERR(priv,
214 "Could not send WEP static key.\n");
215 }
216
217 /*
218 * allow CTS-to-self if possible for new association.
219 * this is relevant only for 5000 series and up,
220 * but will not damage 4965
221 */
222 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
223
224 /* Apply the new configuration
225 * RXON assoc doesn't clear the station table in uCode,
226 */
227 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
229 if (ret) {
230 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
231 return ret;
232 }
233 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
234 }
235
236 iwl_init_sensitivity(priv);
237
238 /* If we issue a new RXON command which required a tune then we must
239 * send a new TXPOWER command or we won't be able to Tx any frames */
240 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
241 if (ret) {
242 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
243 return ret;
244 }
245
246 return 0;
247 }
248
249 void iwl_update_chain_flags(struct iwl_priv *priv)
250 {
251
252 if (priv->cfg->ops->hcmd->set_rxon_chain)
253 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254 iwlcore_commit_rxon(priv);
255 }
256
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
258 {
259 struct list_head *element;
260
261 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
262 priv->frames_count);
263
264 while (!list_empty(&priv->free_frames)) {
265 element = priv->free_frames.next;
266 list_del(element);
267 kfree(list_entry(element, struct iwl_frame, list));
268 priv->frames_count--;
269 }
270
271 if (priv->frames_count) {
272 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
273 priv->frames_count);
274 priv->frames_count = 0;
275 }
276 }
277
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
279 {
280 struct iwl_frame *frame;
281 struct list_head *element;
282 if (list_empty(&priv->free_frames)) {
283 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
284 if (!frame) {
285 IWL_ERR(priv, "Could not allocate frame!\n");
286 return NULL;
287 }
288
289 priv->frames_count++;
290 return frame;
291 }
292
293 element = priv->free_frames.next;
294 list_del(element);
295 return list_entry(element, struct iwl_frame, list);
296 }
297
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
299 {
300 memset(frame, 0, sizeof(*frame));
301 list_add(&frame->list, &priv->free_frames);
302 }
303
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305 struct ieee80211_hdr *hdr,
306 int left)
307 {
308 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310 (priv->iw_mode != NL80211_IFTYPE_AP)))
311 return 0;
312
313 if (priv->ibss_beacon->len > left)
314 return 0;
315
316 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
317
318 return priv->ibss_beacon->len;
319 }
320
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322 struct iwl_frame *frame, u8 rate)
323 {
324 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325 unsigned int frame_size;
326
327 tx_beacon_cmd = &frame->u.beacon;
328 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
329
330 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
332
333 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
335
336 BUG_ON(frame_size > MAX_MPDU_SIZE);
337 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
338
339 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340 tx_beacon_cmd->tx.rate_n_flags =
341 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
342 else
343 tx_beacon_cmd->tx.rate_n_flags =
344 iwl_hw_set_rate_n_flags(rate, 0);
345
346 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
347 TX_CMD_FLG_TSF_MSK |
348 TX_CMD_FLG_STA_RATE_MSK;
349
350 return sizeof(*tx_beacon_cmd) + frame_size;
351 }
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
353 {
354 struct iwl_frame *frame;
355 unsigned int frame_size;
356 int rc;
357 u8 rate;
358
359 frame = iwl_get_free_frame(priv);
360
361 if (!frame) {
362 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363 "command.\n");
364 return -ENOMEM;
365 }
366
367 rate = iwl_rate_get_lowest_plcp(priv);
368
369 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
370
371 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
372 &frame->u.cmd[0]);
373
374 iwl_free_frame(priv, frame);
375
376 return rc;
377 }
378
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
380 {
381 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
382
383 dma_addr_t addr = get_unaligned_le32(&tb->lo);
384 if (sizeof(dma_addr_t) > sizeof(u32))
385 addr |=
386 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387
388 return addr;
389 }
390
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
392 {
393 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
394
395 return le16_to_cpu(tb->hi_n_len) >> 4;
396 }
397
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399 dma_addr_t addr, u16 len)
400 {
401 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402 u16 hi_n_len = len << 4;
403
404 put_unaligned_le32(addr, &tb->lo);
405 if (sizeof(dma_addr_t) > sizeof(u32))
406 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
407
408 tb->hi_n_len = cpu_to_le16(hi_n_len);
409
410 tfd->num_tbs = idx + 1;
411 }
412
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
414 {
415 return tfd->num_tbs & 0x1f;
416 }
417
418 /**
419 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420 * @priv - driver private data
421 * @txq - tx queue
422 *
423 * Does NOT advance any TFD circular buffer read/write indexes
424 * Does NOT free the TFD itself (which is within circular buffer)
425 */
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
427 {
428 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
429 struct iwl_tfd *tfd;
430 struct pci_dev *dev = priv->pci_dev;
431 int index = txq->q.read_ptr;
432 int i;
433 int num_tbs;
434
435 tfd = &tfd_tmp[index];
436
437 /* Sanity check on number of chunks */
438 num_tbs = iwl_tfd_get_num_tbs(tfd);
439
440 if (num_tbs >= IWL_NUM_OF_TBS) {
441 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442 /* @todo issue fatal error, it is quite serious situation */
443 return;
444 }
445
446 /* Unmap tx_cmd */
447 if (num_tbs)
448 pci_unmap_single(dev,
449 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
450 pci_unmap_len(&txq->cmd[index]->meta, len),
451 PCI_DMA_BIDIRECTIONAL);
452
453 /* Unmap chunks, if any. */
454 for (i = 1; i < num_tbs; i++) {
455 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
457
458 if (txq->txb) {
459 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461 }
462 }
463 }
464
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466 struct iwl_tx_queue *txq,
467 dma_addr_t addr, u16 len,
468 u8 reset, u8 pad)
469 {
470 struct iwl_queue *q;
471 struct iwl_tfd *tfd, *tfd_tmp;
472 u32 num_tbs;
473
474 q = &txq->q;
475 tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 tfd = &tfd_tmp[q->write_ptr];
477
478 if (reset)
479 memset(tfd, 0, sizeof(*tfd));
480
481 num_tbs = iwl_tfd_get_num_tbs(tfd);
482
483 /* Each TFD can point to a maximum 20 Tx buffers */
484 if (num_tbs >= IWL_NUM_OF_TBS) {
485 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486 IWL_NUM_OF_TBS);
487 return -EINVAL;
488 }
489
490 BUG_ON(addr & ~DMA_BIT_MASK(36));
491 if (unlikely(addr & ~IWL_TX_DMA_MASK))
492 IWL_ERR(priv, "Unaligned address = %llx\n",
493 (unsigned long long)addr);
494
495 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
496
497 return 0;
498 }
499
500 /*
501 * Tell nic where to find circular buffer of Tx Frame Descriptors for
502 * given Tx queue, and enable the DMA channel used for that queue.
503 *
504 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505 * channels supported in hardware.
506 */
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508 struct iwl_tx_queue *txq)
509 {
510 int txq_id = txq->q.id;
511
512 /* Circular buffer (TFD queue in DRAM) physical base address */
513 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514 txq->q.dma_addr >> 8);
515
516 return 0;
517 }
518
519
520 /******************************************************************************
521 *
522 * Misc. internal state and helper functions
523 *
524 ******************************************************************************/
525
526 #define MAX_UCODE_BEACON_INTERVAL 4096
527
528 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
529 {
530 u16 new_val = 0;
531 u16 beacon_factor = 0;
532
533 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
534 / MAX_UCODE_BEACON_INTERVAL;
535 new_val = beacon_val / beacon_factor;
536
537 if (!new_val)
538 new_val = MAX_UCODE_BEACON_INTERVAL;
539
540 return new_val;
541 }
542
543 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
544 {
545 u64 tsf;
546 s32 interval_tm, rem;
547 unsigned long flags;
548 struct ieee80211_conf *conf = NULL;
549 u16 beacon_int = 0;
550
551 conf = ieee80211_get_hw_conf(priv->hw);
552
553 spin_lock_irqsave(&priv->lock, flags);
554 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
555 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
556
557 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
558 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
559 priv->rxon_timing.atim_window = 0;
560 } else {
561 beacon_int = iwl_adjust_beacon_interval(
562 priv->vif->bss_conf.beacon_int);
563
564 /* TODO: we need to get atim_window from upper stack
565 * for now we set to 0 */
566 priv->rxon_timing.atim_window = 0;
567 }
568
569 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
570
571 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
572 interval_tm = beacon_int * 1024;
573 rem = do_div(tsf, interval_tm);
574 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
575
576 spin_unlock_irqrestore(&priv->lock, flags);
577 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
578 le16_to_cpu(priv->rxon_timing.beacon_interval),
579 le32_to_cpu(priv->rxon_timing.beacon_init_val),
580 le16_to_cpu(priv->rxon_timing.atim_window));
581 }
582
583 /******************************************************************************
584 *
585 * Generic RX handler implementations
586 *
587 ******************************************************************************/
588 static void iwl_rx_reply_alive(struct iwl_priv *priv,
589 struct iwl_rx_mem_buffer *rxb)
590 {
591 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
592 struct iwl_alive_resp *palive;
593 struct delayed_work *pwork;
594
595 palive = &pkt->u.alive_frame;
596
597 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
598 "0x%01X 0x%01X\n",
599 palive->is_valid, palive->ver_type,
600 palive->ver_subtype);
601
602 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
603 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
604 memcpy(&priv->card_alive_init,
605 &pkt->u.alive_frame,
606 sizeof(struct iwl_init_alive_resp));
607 pwork = &priv->init_alive_start;
608 } else {
609 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
610 memcpy(&priv->card_alive, &pkt->u.alive_frame,
611 sizeof(struct iwl_alive_resp));
612 pwork = &priv->alive_start;
613 }
614
615 /* We delay the ALIVE response by 5ms to
616 * give the HW RF Kill time to activate... */
617 if (palive->is_valid == UCODE_VALID_OK)
618 queue_delayed_work(priv->workqueue, pwork,
619 msecs_to_jiffies(5));
620 else
621 IWL_WARN(priv, "uCode did not respond OK.\n");
622 }
623
624 static void iwl_bg_beacon_update(struct work_struct *work)
625 {
626 struct iwl_priv *priv =
627 container_of(work, struct iwl_priv, beacon_update);
628 struct sk_buff *beacon;
629
630 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
631 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
632
633 if (!beacon) {
634 IWL_ERR(priv, "update beacon failed\n");
635 return;
636 }
637
638 mutex_lock(&priv->mutex);
639 /* new beacon skb is allocated every time; dispose previous.*/
640 if (priv->ibss_beacon)
641 dev_kfree_skb(priv->ibss_beacon);
642
643 priv->ibss_beacon = beacon;
644 mutex_unlock(&priv->mutex);
645
646 iwl_send_beacon_cmd(priv);
647 }
648
649 /**
650 * iwl_bg_statistics_periodic - Timer callback to queue statistics
651 *
652 * This callback is provided in order to send a statistics request.
653 *
654 * This timer function is continually reset to execute within
655 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
656 * was received. We need to ensure we receive the statistics in order
657 * to update the temperature used for calibrating the TXPOWER.
658 */
659 static void iwl_bg_statistics_periodic(unsigned long data)
660 {
661 struct iwl_priv *priv = (struct iwl_priv *)data;
662
663 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
664 return;
665
666 /* dont send host command if rf-kill is on */
667 if (!iwl_is_ready_rf(priv))
668 return;
669
670 iwl_send_statistics_request(priv, CMD_ASYNC);
671 }
672
673 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
674 struct iwl_rx_mem_buffer *rxb)
675 {
676 #ifdef CONFIG_IWLWIFI_DEBUG
677 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
678 struct iwl4965_beacon_notif *beacon =
679 (struct iwl4965_beacon_notif *)pkt->u.raw;
680 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
681
682 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
683 "tsf %d %d rate %d\n",
684 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
685 beacon->beacon_notify_hdr.failure_frame,
686 le32_to_cpu(beacon->ibss_mgr_status),
687 le32_to_cpu(beacon->high_tsf),
688 le32_to_cpu(beacon->low_tsf), rate);
689 #endif
690
691 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
692 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
693 queue_work(priv->workqueue, &priv->beacon_update);
694 }
695
696 /* Handle notification from uCode that card's power state is changing
697 * due to software, hardware, or critical temperature RFKILL */
698 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
699 struct iwl_rx_mem_buffer *rxb)
700 {
701 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
702 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
703 unsigned long status = priv->status;
704 unsigned long reg_flags;
705
706 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
707 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
708 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
709
710 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
711 RF_CARD_DISABLED)) {
712
713 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
714 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
715
716 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
717 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
718
719 if (!(flags & RXON_CARD_DISABLED)) {
720 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
721 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
722 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
723 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
724
725 }
726
727 if (flags & RF_CARD_DISABLED) {
728 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
729 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
730 iwl_read32(priv, CSR_UCODE_DRV_GP1);
731 spin_lock_irqsave(&priv->reg_lock, reg_flags);
732 if (!iwl_grab_nic_access(priv))
733 iwl_release_nic_access(priv);
734 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
735 }
736 }
737
738 if (flags & HW_CARD_DISABLED)
739 set_bit(STATUS_RF_KILL_HW, &priv->status);
740 else
741 clear_bit(STATUS_RF_KILL_HW, &priv->status);
742
743
744 if (!(flags & RXON_CARD_DISABLED))
745 iwl_scan_cancel(priv);
746
747 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
748 test_bit(STATUS_RF_KILL_HW, &priv->status)))
749 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
750 test_bit(STATUS_RF_KILL_HW, &priv->status));
751 else
752 wake_up_interruptible(&priv->wait_command_queue);
753 }
754
755 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
756 {
757 if (src == IWL_PWR_SRC_VAUX) {
758 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
759 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
760 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
761 ~APMG_PS_CTRL_MSK_PWR_SRC);
762 } else {
763 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
764 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
765 ~APMG_PS_CTRL_MSK_PWR_SRC);
766 }
767
768 return 0;
769 }
770
771 /**
772 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
773 *
774 * Setup the RX handlers for each of the reply types sent from the uCode
775 * to the host.
776 *
777 * This function chains into the hardware specific files for them to setup
778 * any hardware specific handlers as well.
779 */
780 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
781 {
782 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
783 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
784 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
785 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
786 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
787 iwl_rx_pm_debug_statistics_notif;
788 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
789
790 /*
791 * The same handler is used for both the REPLY to a discrete
792 * statistics request from the host as well as for the periodic
793 * statistics notifications (after received beacons) from the uCode.
794 */
795 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
796 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
797
798 iwl_setup_spectrum_handlers(priv);
799 iwl_setup_rx_scan_handlers(priv);
800
801 /* status change handler */
802 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
803
804 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
805 iwl_rx_missed_beacon_notif;
806 /* Rx handlers */
807 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
808 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
809 /* block ack */
810 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
811 /* Set up hardware specific Rx handlers */
812 priv->cfg->ops->lib->rx_handler_setup(priv);
813 }
814
815 /**
816 * iwl_rx_handle - Main entry function for receiving responses from uCode
817 *
818 * Uses the priv->rx_handlers callback function array to invoke
819 * the appropriate handlers, including command responses,
820 * frame-received notifications, and other notifications.
821 */
822 void iwl_rx_handle(struct iwl_priv *priv)
823 {
824 struct iwl_rx_mem_buffer *rxb;
825 struct iwl_rx_packet *pkt;
826 struct iwl_rx_queue *rxq = &priv->rxq;
827 u32 r, i;
828 int reclaim;
829 unsigned long flags;
830 u8 fill_rx = 0;
831 u32 count = 8;
832 int total_empty;
833
834 /* uCode's read index (stored in shared DRAM) indicates the last Rx
835 * buffer that the driver may process (last buffer filled by ucode). */
836 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
837 i = rxq->read;
838
839 /* Rx interrupt, but nothing sent from uCode */
840 if (i == r)
841 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
842
843 /* calculate total frames need to be restock after handling RX */
844 total_empty = r - priv->rxq.write_actual;
845 if (total_empty < 0)
846 total_empty += RX_QUEUE_SIZE;
847
848 if (total_empty > (RX_QUEUE_SIZE / 2))
849 fill_rx = 1;
850
851 while (i != r) {
852 rxb = rxq->queue[i];
853
854 /* If an RXB doesn't have a Rx queue slot associated with it,
855 * then a bug has been introduced in the queue refilling
856 * routines -- catch it here */
857 BUG_ON(rxb == NULL);
858
859 rxq->queue[i] = NULL;
860
861 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
862 priv->hw_params.rx_buf_size + 256,
863 PCI_DMA_FROMDEVICE);
864 pkt = (struct iwl_rx_packet *)rxb->skb->data;
865
866 /* Reclaim a command buffer only if this packet is a response
867 * to a (driver-originated) command.
868 * If the packet (e.g. Rx frame) originated from uCode,
869 * there is no command buffer to reclaim.
870 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
871 * but apparently a few don't get set; catch them here. */
872 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
873 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
874 (pkt->hdr.cmd != REPLY_RX) &&
875 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
876 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
877 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
878 (pkt->hdr.cmd != REPLY_TX);
879
880 /* Based on type of command response or notification,
881 * handle those that need handling via function in
882 * rx_handlers table. See iwl_setup_rx_handlers() */
883 if (priv->rx_handlers[pkt->hdr.cmd]) {
884 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
885 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
886 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
887 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
888 } else {
889 /* No handling needed */
890 IWL_DEBUG_RX(priv,
891 "r %d i %d No handler needed for %s, 0x%02x\n",
892 r, i, get_cmd_string(pkt->hdr.cmd),
893 pkt->hdr.cmd);
894 }
895
896 if (reclaim) {
897 /* Invoke any callbacks, transfer the skb to caller, and
898 * fire off the (possibly) blocking iwl_send_cmd()
899 * as we reclaim the driver command queue */
900 if (rxb && rxb->skb)
901 iwl_tx_cmd_complete(priv, rxb);
902 else
903 IWL_WARN(priv, "Claim null rxb?\n");
904 }
905
906 /* For now we just don't re-use anything. We can tweak this
907 * later to try and re-use notification packets and SKBs that
908 * fail to Rx correctly */
909 if (rxb->skb != NULL) {
910 priv->alloc_rxb_skb--;
911 dev_kfree_skb_any(rxb->skb);
912 rxb->skb = NULL;
913 }
914
915 spin_lock_irqsave(&rxq->lock, flags);
916 list_add_tail(&rxb->list, &priv->rxq.rx_used);
917 spin_unlock_irqrestore(&rxq->lock, flags);
918 i = (i + 1) & RX_QUEUE_MASK;
919 /* If there are a lot of unused frames,
920 * restock the Rx queue so ucode wont assert. */
921 if (fill_rx) {
922 count++;
923 if (count >= 8) {
924 priv->rxq.read = i;
925 iwl_rx_replenish_now(priv);
926 count = 0;
927 }
928 }
929 }
930
931 /* Backtrack one entry */
932 priv->rxq.read = i;
933 if (fill_rx)
934 iwl_rx_replenish_now(priv);
935 else
936 iwl_rx_queue_restock(priv);
937 }
938
939 /* call this function to flush any scheduled tasklet */
940 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
941 {
942 /* wait to make sure we flush pending tasklet*/
943 synchronize_irq(priv->pci_dev->irq);
944 tasklet_kill(&priv->irq_tasklet);
945 }
946
947 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
948 {
949 u32 inta, handled = 0;
950 u32 inta_fh;
951 unsigned long flags;
952 #ifdef CONFIG_IWLWIFI_DEBUG
953 u32 inta_mask;
954 #endif
955
956 spin_lock_irqsave(&priv->lock, flags);
957
958 /* Ack/clear/reset pending uCode interrupts.
959 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
960 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
961 inta = iwl_read32(priv, CSR_INT);
962 iwl_write32(priv, CSR_INT, inta);
963
964 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
965 * Any new interrupts that happen after this, either while we're
966 * in this tasklet, or later, will show up in next ISR/tasklet. */
967 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
968 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
969
970 #ifdef CONFIG_IWLWIFI_DEBUG
971 if (priv->debug_level & IWL_DL_ISR) {
972 /* just for debug */
973 inta_mask = iwl_read32(priv, CSR_INT_MASK);
974 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
975 inta, inta_mask, inta_fh);
976 }
977 #endif
978
979 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
980 * atomic, make sure that inta covers all the interrupts that
981 * we've discovered, even if FH interrupt came in just after
982 * reading CSR_INT. */
983 if (inta_fh & CSR49_FH_INT_RX_MASK)
984 inta |= CSR_INT_BIT_FH_RX;
985 if (inta_fh & CSR49_FH_INT_TX_MASK)
986 inta |= CSR_INT_BIT_FH_TX;
987
988 /* Now service all interrupt bits discovered above. */
989 if (inta & CSR_INT_BIT_HW_ERR) {
990 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
991
992 /* Tell the device to stop sending interrupts */
993 iwl_disable_interrupts(priv);
994
995 priv->isr_stats.hw++;
996 iwl_irq_handle_error(priv);
997
998 handled |= CSR_INT_BIT_HW_ERR;
999
1000 spin_unlock_irqrestore(&priv->lock, flags);
1001
1002 return;
1003 }
1004
1005 #ifdef CONFIG_IWLWIFI_DEBUG
1006 if (priv->debug_level & (IWL_DL_ISR)) {
1007 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1008 if (inta & CSR_INT_BIT_SCD) {
1009 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1010 "the frame/frames.\n");
1011 priv->isr_stats.sch++;
1012 }
1013
1014 /* Alive notification via Rx interrupt will do the real work */
1015 if (inta & CSR_INT_BIT_ALIVE) {
1016 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1017 priv->isr_stats.alive++;
1018 }
1019 }
1020 #endif
1021 /* Safely ignore these bits for debug checks below */
1022 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1023
1024 /* HW RF KILL switch toggled */
1025 if (inta & CSR_INT_BIT_RF_KILL) {
1026 int hw_rf_kill = 0;
1027 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1028 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1029 hw_rf_kill = 1;
1030
1031 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1032 hw_rf_kill ? "disable radio" : "enable radio");
1033
1034 priv->isr_stats.rfkill++;
1035
1036 /* driver only loads ucode once setting the interface up.
1037 * the driver allows loading the ucode even if the radio
1038 * is killed. Hence update the killswitch state here. The
1039 * rfkill handler will care about restarting if needed.
1040 */
1041 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1042 if (hw_rf_kill)
1043 set_bit(STATUS_RF_KILL_HW, &priv->status);
1044 else
1045 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1046 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1047 }
1048
1049 handled |= CSR_INT_BIT_RF_KILL;
1050 }
1051
1052 /* Chip got too hot and stopped itself */
1053 if (inta & CSR_INT_BIT_CT_KILL) {
1054 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1055 priv->isr_stats.ctkill++;
1056 handled |= CSR_INT_BIT_CT_KILL;
1057 }
1058
1059 /* Error detected by uCode */
1060 if (inta & CSR_INT_BIT_SW_ERR) {
1061 IWL_ERR(priv, "Microcode SW error detected. "
1062 " Restarting 0x%X.\n", inta);
1063 priv->isr_stats.sw++;
1064 priv->isr_stats.sw_err = inta;
1065 iwl_irq_handle_error(priv);
1066 handled |= CSR_INT_BIT_SW_ERR;
1067 }
1068
1069 /* uCode wakes up after power-down sleep */
1070 if (inta & CSR_INT_BIT_WAKEUP) {
1071 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1072 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1073 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1074 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1075 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1076 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1077 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1078 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1079
1080 priv->isr_stats.wakeup++;
1081
1082 handled |= CSR_INT_BIT_WAKEUP;
1083 }
1084
1085 /* All uCode command responses, including Tx command responses,
1086 * Rx "responses" (frame-received notification), and other
1087 * notifications from uCode come through here*/
1088 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1089 iwl_rx_handle(priv);
1090 priv->isr_stats.rx++;
1091 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1092 }
1093
1094 if (inta & CSR_INT_BIT_FH_TX) {
1095 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1096 priv->isr_stats.tx++;
1097 handled |= CSR_INT_BIT_FH_TX;
1098 /* FH finished to write, send event */
1099 priv->ucode_write_complete = 1;
1100 wake_up_interruptible(&priv->wait_command_queue);
1101 }
1102
1103 if (inta & ~handled) {
1104 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1105 priv->isr_stats.unhandled++;
1106 }
1107
1108 if (inta & ~(priv->inta_mask)) {
1109 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1110 inta & ~priv->inta_mask);
1111 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1112 }
1113
1114 /* Re-enable all interrupts */
1115 /* only Re-enable if diabled by irq */
1116 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1117 iwl_enable_interrupts(priv);
1118
1119 #ifdef CONFIG_IWLWIFI_DEBUG
1120 if (priv->debug_level & (IWL_DL_ISR)) {
1121 inta = iwl_read32(priv, CSR_INT);
1122 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1123 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1124 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1125 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1126 }
1127 #endif
1128 spin_unlock_irqrestore(&priv->lock, flags);
1129 }
1130
1131 /* tasklet for iwlagn interrupt */
1132 static void iwl_irq_tasklet(struct iwl_priv *priv)
1133 {
1134 u32 inta = 0;
1135 u32 handled = 0;
1136 unsigned long flags;
1137 #ifdef CONFIG_IWLWIFI_DEBUG
1138 u32 inta_mask;
1139 #endif
1140
1141 spin_lock_irqsave(&priv->lock, flags);
1142
1143 /* Ack/clear/reset pending uCode interrupts.
1144 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1145 */
1146 iwl_write32(priv, CSR_INT, priv->inta);
1147
1148 inta = priv->inta;
1149
1150 #ifdef CONFIG_IWLWIFI_DEBUG
1151 if (priv->debug_level & IWL_DL_ISR) {
1152 /* just for debug */
1153 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1154 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1155 inta, inta_mask);
1156 }
1157 #endif
1158 /* saved interrupt in inta variable now we can reset priv->inta */
1159 priv->inta = 0;
1160
1161 /* Now service all interrupt bits discovered above. */
1162 if (inta & CSR_INT_BIT_HW_ERR) {
1163 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1164
1165 /* Tell the device to stop sending interrupts */
1166 iwl_disable_interrupts(priv);
1167
1168 priv->isr_stats.hw++;
1169 iwl_irq_handle_error(priv);
1170
1171 handled |= CSR_INT_BIT_HW_ERR;
1172
1173 spin_unlock_irqrestore(&priv->lock, flags);
1174
1175 return;
1176 }
1177
1178 #ifdef CONFIG_IWLWIFI_DEBUG
1179 if (priv->debug_level & (IWL_DL_ISR)) {
1180 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1181 if (inta & CSR_INT_BIT_SCD) {
1182 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1183 "the frame/frames.\n");
1184 priv->isr_stats.sch++;
1185 }
1186
1187 /* Alive notification via Rx interrupt will do the real work */
1188 if (inta & CSR_INT_BIT_ALIVE) {
1189 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1190 priv->isr_stats.alive++;
1191 }
1192 }
1193 #endif
1194 /* Safely ignore these bits for debug checks below */
1195 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1196
1197 /* HW RF KILL switch toggled */
1198 if (inta & CSR_INT_BIT_RF_KILL) {
1199 int hw_rf_kill = 0;
1200 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1201 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1202 hw_rf_kill = 1;
1203
1204 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1205 hw_rf_kill ? "disable radio" : "enable radio");
1206
1207 priv->isr_stats.rfkill++;
1208
1209 /* driver only loads ucode once setting the interface up.
1210 * the driver allows loading the ucode even if the radio
1211 * is killed. Hence update the killswitch state here. The
1212 * rfkill handler will care about restarting if needed.
1213 */
1214 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1215 if (hw_rf_kill)
1216 set_bit(STATUS_RF_KILL_HW, &priv->status);
1217 else
1218 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1219 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1220 }
1221
1222 handled |= CSR_INT_BIT_RF_KILL;
1223 }
1224
1225 /* Chip got too hot and stopped itself */
1226 if (inta & CSR_INT_BIT_CT_KILL) {
1227 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1228 priv->isr_stats.ctkill++;
1229 handled |= CSR_INT_BIT_CT_KILL;
1230 }
1231
1232 /* Error detected by uCode */
1233 if (inta & CSR_INT_BIT_SW_ERR) {
1234 IWL_ERR(priv, "Microcode SW error detected. "
1235 " Restarting 0x%X.\n", inta);
1236 priv->isr_stats.sw++;
1237 priv->isr_stats.sw_err = inta;
1238 iwl_irq_handle_error(priv);
1239 handled |= CSR_INT_BIT_SW_ERR;
1240 }
1241
1242 /* uCode wakes up after power-down sleep */
1243 if (inta & CSR_INT_BIT_WAKEUP) {
1244 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1245 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1246 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1247 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1248 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1249 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1250 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1251 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1252
1253 priv->isr_stats.wakeup++;
1254
1255 handled |= CSR_INT_BIT_WAKEUP;
1256 }
1257
1258 /* All uCode command responses, including Tx command responses,
1259 * Rx "responses" (frame-received notification), and other
1260 * notifications from uCode come through here*/
1261 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1262 CSR_INT_BIT_RX_PERIODIC)) {
1263 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1264 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1265 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1266 iwl_write32(priv, CSR_FH_INT_STATUS,
1267 CSR49_FH_INT_RX_MASK);
1268 }
1269 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1270 handled |= CSR_INT_BIT_RX_PERIODIC;
1271 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1272 }
1273 /* Sending RX interrupt require many steps to be done in the
1274 * the device:
1275 * 1- write interrupt to current index in ICT table.
1276 * 2- dma RX frame.
1277 * 3- update RX shared data to indicate last write index.
1278 * 4- send interrupt.
1279 * This could lead to RX race, driver could receive RX interrupt
1280 * but the shared data changes does not reflect this.
1281 * this could lead to RX race, RX periodic will solve this race
1282 */
1283 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1284 CSR_INT_PERIODIC_DIS);
1285 iwl_rx_handle(priv);
1286 /* Only set RX periodic if real RX is received. */
1287 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1288 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1289 CSR_INT_PERIODIC_ENA);
1290
1291 priv->isr_stats.rx++;
1292 }
1293
1294 if (inta & CSR_INT_BIT_FH_TX) {
1295 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1296 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1297 priv->isr_stats.tx++;
1298 handled |= CSR_INT_BIT_FH_TX;
1299 /* FH finished to write, send event */
1300 priv->ucode_write_complete = 1;
1301 wake_up_interruptible(&priv->wait_command_queue);
1302 }
1303
1304 if (inta & ~handled) {
1305 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1306 priv->isr_stats.unhandled++;
1307 }
1308
1309 if (inta & ~(priv->inta_mask)) {
1310 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1311 inta & ~priv->inta_mask);
1312 }
1313
1314
1315 /* Re-enable all interrupts */
1316 /* only Re-enable if diabled by irq */
1317 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1318 iwl_enable_interrupts(priv);
1319
1320 spin_unlock_irqrestore(&priv->lock, flags);
1321
1322 }
1323
1324
1325 /******************************************************************************
1326 *
1327 * uCode download functions
1328 *
1329 ******************************************************************************/
1330
1331 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1332 {
1333 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1334 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1335 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1336 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1337 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1338 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1339 }
1340
1341 static void iwl_nic_start(struct iwl_priv *priv)
1342 {
1343 /* Remove all resets to allow NIC to operate */
1344 iwl_write32(priv, CSR_RESET, 0);
1345 }
1346
1347
1348 /**
1349 * iwl_read_ucode - Read uCode images from disk file.
1350 *
1351 * Copy into buffers for card to fetch via bus-mastering
1352 */
1353 static int iwl_read_ucode(struct iwl_priv *priv)
1354 {
1355 struct iwl_ucode_header *ucode;
1356 int ret = -EINVAL, index;
1357 const struct firmware *ucode_raw;
1358 const char *name_pre = priv->cfg->fw_name_pre;
1359 const unsigned int api_max = priv->cfg->ucode_api_max;
1360 const unsigned int api_min = priv->cfg->ucode_api_min;
1361 char buf[25];
1362 u8 *src;
1363 size_t len;
1364 u32 api_ver, build;
1365 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1366
1367 /* Ask kernel firmware_class module to get the boot firmware off disk.
1368 * request_firmware() is synchronous, file is in memory on return. */
1369 for (index = api_max; index >= api_min; index--) {
1370 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1371 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1372 if (ret < 0) {
1373 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1374 buf, ret);
1375 if (ret == -ENOENT)
1376 continue;
1377 else
1378 goto error;
1379 } else {
1380 if (index < api_max)
1381 IWL_ERR(priv, "Loaded firmware %s, "
1382 "which is deprecated. "
1383 "Please use API v%u instead.\n",
1384 buf, api_max);
1385
1386 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1387 buf, ucode_raw->size);
1388 break;
1389 }
1390 }
1391
1392 if (ret < 0)
1393 goto error;
1394
1395 /* Make sure that we got at least the v1 header! */
1396 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1397 IWL_ERR(priv, "File size way too small!\n");
1398 ret = -EINVAL;
1399 goto err_release;
1400 }
1401
1402 /* Data from ucode file: header followed by uCode images */
1403 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1404
1405 priv->ucode_ver = le32_to_cpu(ucode->ver);
1406 api_ver = IWL_UCODE_API(priv->ucode_ver);
1407 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1408 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1409 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1410 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1411 init_data_size =
1412 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1413 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1414 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1415
1416 /* api_ver should match the api version forming part of the
1417 * firmware filename ... but we don't check for that and only rely
1418 * on the API version read from firmware header from here on forward */
1419
1420 if (api_ver < api_min || api_ver > api_max) {
1421 IWL_ERR(priv, "Driver unable to support your firmware API. "
1422 "Driver supports v%u, firmware is v%u.\n",
1423 api_max, api_ver);
1424 priv->ucode_ver = 0;
1425 ret = -EINVAL;
1426 goto err_release;
1427 }
1428 if (api_ver != api_max)
1429 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1430 "got v%u. New firmware can be obtained "
1431 "from http://www.intellinuxwireless.org.\n",
1432 api_max, api_ver);
1433
1434 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1435 IWL_UCODE_MAJOR(priv->ucode_ver),
1436 IWL_UCODE_MINOR(priv->ucode_ver),
1437 IWL_UCODE_API(priv->ucode_ver),
1438 IWL_UCODE_SERIAL(priv->ucode_ver));
1439
1440 if (build)
1441 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1442
1443 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1444 priv->ucode_ver);
1445 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1446 inst_size);
1447 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1448 data_size);
1449 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1450 init_size);
1451 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1452 init_data_size);
1453 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1454 boot_size);
1455
1456 /* Verify size of file vs. image size info in file's header */
1457 if (ucode_raw->size !=
1458 priv->cfg->ops->ucode->get_header_size(api_ver) +
1459 inst_size + data_size + init_size +
1460 init_data_size + boot_size) {
1461
1462 IWL_DEBUG_INFO(priv,
1463 "uCode file size %d does not match expected size\n",
1464 (int)ucode_raw->size);
1465 ret = -EINVAL;
1466 goto err_release;
1467 }
1468
1469 /* Verify that uCode images will fit in card's SRAM */
1470 if (inst_size > priv->hw_params.max_inst_size) {
1471 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1472 inst_size);
1473 ret = -EINVAL;
1474 goto err_release;
1475 }
1476
1477 if (data_size > priv->hw_params.max_data_size) {
1478 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1479 data_size);
1480 ret = -EINVAL;
1481 goto err_release;
1482 }
1483 if (init_size > priv->hw_params.max_inst_size) {
1484 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1485 init_size);
1486 ret = -EINVAL;
1487 goto err_release;
1488 }
1489 if (init_data_size > priv->hw_params.max_data_size) {
1490 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1491 init_data_size);
1492 ret = -EINVAL;
1493 goto err_release;
1494 }
1495 if (boot_size > priv->hw_params.max_bsm_size) {
1496 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1497 boot_size);
1498 ret = -EINVAL;
1499 goto err_release;
1500 }
1501
1502 /* Allocate ucode buffers for card's bus-master loading ... */
1503
1504 /* Runtime instructions and 2 copies of data:
1505 * 1) unmodified from disk
1506 * 2) backup cache for save/restore during power-downs */
1507 priv->ucode_code.len = inst_size;
1508 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1509
1510 priv->ucode_data.len = data_size;
1511 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1512
1513 priv->ucode_data_backup.len = data_size;
1514 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1515
1516 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1517 !priv->ucode_data_backup.v_addr)
1518 goto err_pci_alloc;
1519
1520 /* Initialization instructions and data */
1521 if (init_size && init_data_size) {
1522 priv->ucode_init.len = init_size;
1523 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1524
1525 priv->ucode_init_data.len = init_data_size;
1526 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1527
1528 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1529 goto err_pci_alloc;
1530 }
1531
1532 /* Bootstrap (instructions only, no data) */
1533 if (boot_size) {
1534 priv->ucode_boot.len = boot_size;
1535 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1536
1537 if (!priv->ucode_boot.v_addr)
1538 goto err_pci_alloc;
1539 }
1540
1541 /* Copy images into buffers for card's bus-master reads ... */
1542
1543 /* Runtime instructions (first block of data in file) */
1544 len = inst_size;
1545 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1546 memcpy(priv->ucode_code.v_addr, src, len);
1547 src += len;
1548
1549 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1550 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1551
1552 /* Runtime data (2nd block)
1553 * NOTE: Copy into backup buffer will be done in iwl_up() */
1554 len = data_size;
1555 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1556 memcpy(priv->ucode_data.v_addr, src, len);
1557 memcpy(priv->ucode_data_backup.v_addr, src, len);
1558 src += len;
1559
1560 /* Initialization instructions (3rd block) */
1561 if (init_size) {
1562 len = init_size;
1563 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1564 len);
1565 memcpy(priv->ucode_init.v_addr, src, len);
1566 src += len;
1567 }
1568
1569 /* Initialization data (4th block) */
1570 if (init_data_size) {
1571 len = init_data_size;
1572 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1573 len);
1574 memcpy(priv->ucode_init_data.v_addr, src, len);
1575 src += len;
1576 }
1577
1578 /* Bootstrap instructions (5th block) */
1579 len = boot_size;
1580 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1581 memcpy(priv->ucode_boot.v_addr, src, len);
1582
1583 /* We have our copies now, allow OS release its copies */
1584 release_firmware(ucode_raw);
1585 return 0;
1586
1587 err_pci_alloc:
1588 IWL_ERR(priv, "failed to allocate pci memory\n");
1589 ret = -ENOMEM;
1590 iwl_dealloc_ucode_pci(priv);
1591
1592 err_release:
1593 release_firmware(ucode_raw);
1594
1595 error:
1596 return ret;
1597 }
1598
1599 /**
1600 * iwl_alive_start - called after REPLY_ALIVE notification received
1601 * from protocol/runtime uCode (initialization uCode's
1602 * Alive gets handled by iwl_init_alive_start()).
1603 */
1604 static void iwl_alive_start(struct iwl_priv *priv)
1605 {
1606 int ret = 0;
1607
1608 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1609
1610 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1611 /* We had an error bringing up the hardware, so take it
1612 * all the way back down so we can try again */
1613 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1614 goto restart;
1615 }
1616
1617 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1618 * This is a paranoid check, because we would not have gotten the
1619 * "runtime" alive if code weren't properly loaded. */
1620 if (iwl_verify_ucode(priv)) {
1621 /* Runtime instruction load was bad;
1622 * take it all the way back down so we can try again */
1623 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1624 goto restart;
1625 }
1626
1627 iwl_clear_stations_table(priv);
1628 ret = priv->cfg->ops->lib->alive_notify(priv);
1629 if (ret) {
1630 IWL_WARN(priv,
1631 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1632 goto restart;
1633 }
1634
1635 /* After the ALIVE response, we can send host commands to the uCode */
1636 set_bit(STATUS_ALIVE, &priv->status);
1637
1638 if (iwl_is_rfkill(priv))
1639 return;
1640
1641 ieee80211_wake_queues(priv->hw);
1642
1643 priv->active_rate = priv->rates_mask;
1644 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1645
1646 if (iwl_is_associated(priv)) {
1647 struct iwl_rxon_cmd *active_rxon =
1648 (struct iwl_rxon_cmd *)&priv->active_rxon;
1649 /* apply any changes in staging */
1650 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1651 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1652 } else {
1653 /* Initialize our rx_config data */
1654 iwl_connection_init_rx_config(priv, priv->iw_mode);
1655
1656 if (priv->cfg->ops->hcmd->set_rxon_chain)
1657 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1658
1659 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1660 }
1661
1662 /* Configure Bluetooth device coexistence support */
1663 iwl_send_bt_config(priv);
1664
1665 iwl_reset_run_time_calib(priv);
1666
1667 /* Configure the adapter for unassociated operation */
1668 iwlcore_commit_rxon(priv);
1669
1670 /* At this point, the NIC is initialized and operational */
1671 iwl_rf_kill_ct_config(priv);
1672
1673 iwl_leds_register(priv);
1674
1675 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1676 set_bit(STATUS_READY, &priv->status);
1677 wake_up_interruptible(&priv->wait_command_queue);
1678
1679 iwl_power_update_mode(priv, 1);
1680
1681 /* reassociate for ADHOC mode */
1682 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1683 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1684 priv->vif);
1685 if (beacon)
1686 iwl_mac_beacon_update(priv->hw, beacon);
1687 }
1688
1689
1690 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1691 iwl_set_mode(priv, priv->iw_mode);
1692
1693 return;
1694
1695 restart:
1696 queue_work(priv->workqueue, &priv->restart);
1697 }
1698
1699 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1700
1701 static void __iwl_down(struct iwl_priv *priv)
1702 {
1703 unsigned long flags;
1704 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1705
1706 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1707
1708 if (!exit_pending)
1709 set_bit(STATUS_EXIT_PENDING, &priv->status);
1710
1711 iwl_leds_unregister(priv);
1712
1713 iwl_clear_stations_table(priv);
1714
1715 /* Unblock any waiting calls */
1716 wake_up_interruptible_all(&priv->wait_command_queue);
1717
1718 /* Wipe out the EXIT_PENDING status bit if we are not actually
1719 * exiting the module */
1720 if (!exit_pending)
1721 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1722
1723 /* stop and reset the on-board processor */
1724 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1725
1726 /* tell the device to stop sending interrupts */
1727 spin_lock_irqsave(&priv->lock, flags);
1728 iwl_disable_interrupts(priv);
1729 spin_unlock_irqrestore(&priv->lock, flags);
1730 iwl_synchronize_irq(priv);
1731
1732 if (priv->mac80211_registered)
1733 ieee80211_stop_queues(priv->hw);
1734
1735 /* If we have not previously called iwl_init() then
1736 * clear all bits but the RF Kill bit and return */
1737 if (!iwl_is_init(priv)) {
1738 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1739 STATUS_RF_KILL_HW |
1740 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1741 STATUS_GEO_CONFIGURED |
1742 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1743 STATUS_EXIT_PENDING;
1744 goto exit;
1745 }
1746
1747 /* ...otherwise clear out all the status bits but the RF Kill
1748 * bit and continue taking the NIC down. */
1749 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1750 STATUS_RF_KILL_HW |
1751 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1752 STATUS_GEO_CONFIGURED |
1753 test_bit(STATUS_FW_ERROR, &priv->status) <<
1754 STATUS_FW_ERROR |
1755 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1756 STATUS_EXIT_PENDING;
1757
1758 /* device going down, Stop using ICT table */
1759 iwl_disable_ict(priv);
1760 spin_lock_irqsave(&priv->lock, flags);
1761 iwl_clear_bit(priv, CSR_GP_CNTRL,
1762 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1763 spin_unlock_irqrestore(&priv->lock, flags);
1764
1765 iwl_txq_ctx_stop(priv);
1766 iwl_rxq_stop(priv);
1767
1768 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1769 APMG_CLK_VAL_DMA_CLK_RQT);
1770
1771 udelay(5);
1772
1773 /* FIXME: apm_ops.suspend(priv) */
1774 if (exit_pending)
1775 priv->cfg->ops->lib->apm_ops.stop(priv);
1776 else
1777 priv->cfg->ops->lib->apm_ops.reset(priv);
1778 exit:
1779 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1780
1781 if (priv->ibss_beacon)
1782 dev_kfree_skb(priv->ibss_beacon);
1783 priv->ibss_beacon = NULL;
1784
1785 /* clear out any free frames */
1786 iwl_clear_free_frames(priv);
1787 }
1788
1789 static void iwl_down(struct iwl_priv *priv)
1790 {
1791 mutex_lock(&priv->mutex);
1792 __iwl_down(priv);
1793 mutex_unlock(&priv->mutex);
1794
1795 iwl_cancel_deferred_work(priv);
1796 }
1797
1798 #define HW_READY_TIMEOUT (50)
1799
1800 static int iwl_set_hw_ready(struct iwl_priv *priv)
1801 {
1802 int ret = 0;
1803
1804 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1805 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1806
1807 /* See if we got it */
1808 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1809 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1810 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1811 HW_READY_TIMEOUT);
1812 if (ret != -ETIMEDOUT)
1813 priv->hw_ready = true;
1814 else
1815 priv->hw_ready = false;
1816
1817 IWL_DEBUG_INFO(priv, "hardware %s\n",
1818 (priv->hw_ready == 1) ? "ready" : "not ready");
1819 return ret;
1820 }
1821
1822 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1823 {
1824 int ret = 0;
1825
1826 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1827
1828 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1829 CSR_HW_IF_CONFIG_REG_PREPARE);
1830
1831 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1832 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1833 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1834
1835 if (ret != -ETIMEDOUT)
1836 iwl_set_hw_ready(priv);
1837
1838 return ret;
1839 }
1840
1841 #define MAX_HW_RESTARTS 5
1842
1843 static int __iwl_up(struct iwl_priv *priv)
1844 {
1845 int i;
1846 int ret;
1847
1848 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1849 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1850 return -EIO;
1851 }
1852
1853 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1854 IWL_ERR(priv, "ucode not available for device bringup\n");
1855 return -EIO;
1856 }
1857
1858 iwl_prepare_card_hw(priv);
1859
1860 if (!priv->hw_ready) {
1861 IWL_WARN(priv, "Exit HW not ready\n");
1862 return -EIO;
1863 }
1864
1865 /* If platform's RF_KILL switch is NOT set to KILL */
1866 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1867 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1868 else
1869 set_bit(STATUS_RF_KILL_HW, &priv->status);
1870
1871 if (iwl_is_rfkill(priv)) {
1872 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1873
1874 iwl_enable_interrupts(priv);
1875 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1876 return 0;
1877 }
1878
1879 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1880
1881 ret = iwl_hw_nic_init(priv);
1882 if (ret) {
1883 IWL_ERR(priv, "Unable to init nic\n");
1884 return ret;
1885 }
1886
1887 /* make sure rfkill handshake bits are cleared */
1888 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1889 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1890 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1891
1892 /* clear (again), then enable host interrupts */
1893 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1894 iwl_enable_interrupts(priv);
1895
1896 /* really make sure rfkill handshake bits are cleared */
1897 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1898 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1899
1900 /* Copy original ucode data image from disk into backup cache.
1901 * This will be used to initialize the on-board processor's
1902 * data SRAM for a clean start when the runtime program first loads. */
1903 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1904 priv->ucode_data.len);
1905
1906 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1907
1908 iwl_clear_stations_table(priv);
1909
1910 /* load bootstrap state machine,
1911 * load bootstrap program into processor's memory,
1912 * prepare to load the "initialize" uCode */
1913 ret = priv->cfg->ops->lib->load_ucode(priv);
1914
1915 if (ret) {
1916 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1917 ret);
1918 continue;
1919 }
1920
1921 /* start card; "initialize" will load runtime ucode */
1922 iwl_nic_start(priv);
1923
1924 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1925
1926 return 0;
1927 }
1928
1929 set_bit(STATUS_EXIT_PENDING, &priv->status);
1930 __iwl_down(priv);
1931 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1932
1933 /* tried to restart and config the device for as long as our
1934 * patience could withstand */
1935 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1936 return -EIO;
1937 }
1938
1939
1940 /*****************************************************************************
1941 *
1942 * Workqueue callbacks
1943 *
1944 *****************************************************************************/
1945
1946 static void iwl_bg_init_alive_start(struct work_struct *data)
1947 {
1948 struct iwl_priv *priv =
1949 container_of(data, struct iwl_priv, init_alive_start.work);
1950
1951 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1952 return;
1953
1954 mutex_lock(&priv->mutex);
1955 priv->cfg->ops->lib->init_alive_start(priv);
1956 mutex_unlock(&priv->mutex);
1957 }
1958
1959 static void iwl_bg_alive_start(struct work_struct *data)
1960 {
1961 struct iwl_priv *priv =
1962 container_of(data, struct iwl_priv, alive_start.work);
1963
1964 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1965 return;
1966
1967 /* enable dram interrupt */
1968 iwl_reset_ict(priv);
1969
1970 mutex_lock(&priv->mutex);
1971 iwl_alive_start(priv);
1972 mutex_unlock(&priv->mutex);
1973 }
1974
1975 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1976 {
1977 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1978 run_time_calib_work);
1979
1980 mutex_lock(&priv->mutex);
1981
1982 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1983 test_bit(STATUS_SCANNING, &priv->status)) {
1984 mutex_unlock(&priv->mutex);
1985 return;
1986 }
1987
1988 if (priv->start_calib) {
1989 iwl_chain_noise_calibration(priv, &priv->statistics);
1990
1991 iwl_sensitivity_calibration(priv, &priv->statistics);
1992 }
1993
1994 mutex_unlock(&priv->mutex);
1995 return;
1996 }
1997
1998 static void iwl_bg_up(struct work_struct *data)
1999 {
2000 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2001
2002 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2003 return;
2004
2005 mutex_lock(&priv->mutex);
2006 __iwl_up(priv);
2007 mutex_unlock(&priv->mutex);
2008 }
2009
2010 static void iwl_bg_restart(struct work_struct *data)
2011 {
2012 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2013
2014 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2015 return;
2016
2017 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2018 mutex_lock(&priv->mutex);
2019 priv->vif = NULL;
2020 priv->is_open = 0;
2021 mutex_unlock(&priv->mutex);
2022 iwl_down(priv);
2023 ieee80211_restart_hw(priv->hw);
2024 } else {
2025 iwl_down(priv);
2026 queue_work(priv->workqueue, &priv->up);
2027 }
2028 }
2029
2030 static void iwl_bg_rx_replenish(struct work_struct *data)
2031 {
2032 struct iwl_priv *priv =
2033 container_of(data, struct iwl_priv, rx_replenish);
2034
2035 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2036 return;
2037
2038 mutex_lock(&priv->mutex);
2039 iwl_rx_replenish(priv);
2040 mutex_unlock(&priv->mutex);
2041 }
2042
2043 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2044
2045 void iwl_post_associate(struct iwl_priv *priv)
2046 {
2047 struct ieee80211_conf *conf = NULL;
2048 int ret = 0;
2049 unsigned long flags;
2050
2051 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2052 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2053 return;
2054 }
2055
2056 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2057 priv->assoc_id, priv->active_rxon.bssid_addr);
2058
2059
2060 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2061 return;
2062
2063
2064 if (!priv->vif || !priv->is_open)
2065 return;
2066
2067 iwl_scan_cancel_timeout(priv, 200);
2068
2069 conf = ieee80211_get_hw_conf(priv->hw);
2070
2071 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2072 iwlcore_commit_rxon(priv);
2073
2074 iwl_setup_rxon_timing(priv);
2075 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2076 sizeof(priv->rxon_timing), &priv->rxon_timing);
2077 if (ret)
2078 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2079 "Attempting to continue.\n");
2080
2081 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2082
2083 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2084
2085 if (priv->cfg->ops->hcmd->set_rxon_chain)
2086 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2087
2088 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2089
2090 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2091 priv->assoc_id, priv->beacon_int);
2092
2093 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2094 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2095 else
2096 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2097
2098 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2099 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2100 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2101 else
2102 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2103
2104 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2105 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2106
2107 }
2108
2109 iwlcore_commit_rxon(priv);
2110
2111 switch (priv->iw_mode) {
2112 case NL80211_IFTYPE_STATION:
2113 break;
2114
2115 case NL80211_IFTYPE_ADHOC:
2116
2117 /* assume default assoc id */
2118 priv->assoc_id = 1;
2119
2120 iwl_rxon_add_station(priv, priv->bssid, 0);
2121 iwl_send_beacon_cmd(priv);
2122
2123 break;
2124
2125 default:
2126 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2127 __func__, priv->iw_mode);
2128 break;
2129 }
2130
2131 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2132 priv->assoc_station_added = 1;
2133
2134 spin_lock_irqsave(&priv->lock, flags);
2135 iwl_activate_qos(priv, 0);
2136 spin_unlock_irqrestore(&priv->lock, flags);
2137
2138 /* the chain noise calibration will enabled PM upon completion
2139 * If chain noise has already been run, then we need to enable
2140 * power management here */
2141 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2142 iwl_power_update_mode(priv, 0);
2143
2144 /* Enable Rx differential gain and sensitivity calibrations */
2145 iwl_chain_noise_reset(priv);
2146 priv->start_calib = 1;
2147
2148 }
2149
2150 /*****************************************************************************
2151 *
2152 * mac80211 entry point functions
2153 *
2154 *****************************************************************************/
2155
2156 #define UCODE_READY_TIMEOUT (4 * HZ)
2157
2158 static int iwl_mac_start(struct ieee80211_hw *hw)
2159 {
2160 struct iwl_priv *priv = hw->priv;
2161 int ret;
2162
2163 IWL_DEBUG_MAC80211(priv, "enter\n");
2164
2165 /* we should be verifying the device is ready to be opened */
2166 mutex_lock(&priv->mutex);
2167
2168 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2169 * ucode filename and max sizes are card-specific. */
2170
2171 if (!priv->ucode_code.len) {
2172 ret = iwl_read_ucode(priv);
2173 if (ret) {
2174 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2175 mutex_unlock(&priv->mutex);
2176 return ret;
2177 }
2178 }
2179
2180 ret = __iwl_up(priv);
2181
2182 mutex_unlock(&priv->mutex);
2183
2184 if (ret)
2185 return ret;
2186
2187 if (iwl_is_rfkill(priv))
2188 goto out;
2189
2190 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2191
2192 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2193 * mac80211 will not be run successfully. */
2194 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2195 test_bit(STATUS_READY, &priv->status),
2196 UCODE_READY_TIMEOUT);
2197 if (!ret) {
2198 if (!test_bit(STATUS_READY, &priv->status)) {
2199 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2200 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2201 return -ETIMEDOUT;
2202 }
2203 }
2204
2205 out:
2206 priv->is_open = 1;
2207 IWL_DEBUG_MAC80211(priv, "leave\n");
2208 return 0;
2209 }
2210
2211 static void iwl_mac_stop(struct ieee80211_hw *hw)
2212 {
2213 struct iwl_priv *priv = hw->priv;
2214
2215 IWL_DEBUG_MAC80211(priv, "enter\n");
2216
2217 if (!priv->is_open)
2218 return;
2219
2220 priv->is_open = 0;
2221
2222 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2223 /* stop mac, cancel any scan request and clear
2224 * RXON_FILTER_ASSOC_MSK BIT
2225 */
2226 mutex_lock(&priv->mutex);
2227 iwl_scan_cancel_timeout(priv, 100);
2228 mutex_unlock(&priv->mutex);
2229 }
2230
2231 iwl_down(priv);
2232
2233 flush_workqueue(priv->workqueue);
2234
2235 /* enable interrupts again in order to receive rfkill changes */
2236 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2237 iwl_enable_interrupts(priv);
2238
2239 IWL_DEBUG_MAC80211(priv, "leave\n");
2240 }
2241
2242 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2243 {
2244 struct iwl_priv *priv = hw->priv;
2245
2246 IWL_DEBUG_MACDUMP(priv, "enter\n");
2247
2248 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2249 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2250
2251 if (iwl_tx_skb(priv, skb))
2252 dev_kfree_skb_any(skb);
2253
2254 IWL_DEBUG_MACDUMP(priv, "leave\n");
2255 return NETDEV_TX_OK;
2256 }
2257
2258 void iwl_config_ap(struct iwl_priv *priv)
2259 {
2260 int ret = 0;
2261 unsigned long flags;
2262
2263 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2264 return;
2265
2266 /* The following should be done only at AP bring up */
2267 if (!iwl_is_associated(priv)) {
2268
2269 /* RXON - unassoc (to set timing command) */
2270 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2271 iwlcore_commit_rxon(priv);
2272
2273 /* RXON Timing */
2274 iwl_setup_rxon_timing(priv);
2275 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2276 sizeof(priv->rxon_timing), &priv->rxon_timing);
2277 if (ret)
2278 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2279 "Attempting to continue.\n");
2280
2281 if (priv->cfg->ops->hcmd->set_rxon_chain)
2282 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2283
2284 /* FIXME: what should be the assoc_id for AP? */
2285 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2286 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2287 priv->staging_rxon.flags |=
2288 RXON_FLG_SHORT_PREAMBLE_MSK;
2289 else
2290 priv->staging_rxon.flags &=
2291 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2292
2293 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2294 if (priv->assoc_capability &
2295 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2296 priv->staging_rxon.flags |=
2297 RXON_FLG_SHORT_SLOT_MSK;
2298 else
2299 priv->staging_rxon.flags &=
2300 ~RXON_FLG_SHORT_SLOT_MSK;
2301
2302 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2303 priv->staging_rxon.flags &=
2304 ~RXON_FLG_SHORT_SLOT_MSK;
2305 }
2306 /* restore RXON assoc */
2307 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2308 iwlcore_commit_rxon(priv);
2309 spin_lock_irqsave(&priv->lock, flags);
2310 iwl_activate_qos(priv, 1);
2311 spin_unlock_irqrestore(&priv->lock, flags);
2312 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2313 }
2314 iwl_send_beacon_cmd(priv);
2315
2316 /* FIXME - we need to add code here to detect a totally new
2317 * configuration, reset the AP, unassoc, rxon timing, assoc,
2318 * clear sta table, add BCAST sta... */
2319 }
2320
2321 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2322 struct ieee80211_key_conf *keyconf, const u8 *addr,
2323 u32 iv32, u16 *phase1key)
2324 {
2325
2326 struct iwl_priv *priv = hw->priv;
2327 IWL_DEBUG_MAC80211(priv, "enter\n");
2328
2329 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2330
2331 IWL_DEBUG_MAC80211(priv, "leave\n");
2332 }
2333
2334 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2335 struct ieee80211_vif *vif,
2336 struct ieee80211_sta *sta,
2337 struct ieee80211_key_conf *key)
2338 {
2339 struct iwl_priv *priv = hw->priv;
2340 const u8 *addr;
2341 int ret;
2342 u8 sta_id;
2343 bool is_default_wep_key = false;
2344
2345 IWL_DEBUG_MAC80211(priv, "enter\n");
2346
2347 if (priv->hw_params.sw_crypto) {
2348 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2349 return -EOPNOTSUPP;
2350 }
2351 addr = sta ? sta->addr : iwl_bcast_addr;
2352 sta_id = iwl_find_station(priv, addr);
2353 if (sta_id == IWL_INVALID_STATION) {
2354 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2355 addr);
2356 return -EINVAL;
2357
2358 }
2359
2360 mutex_lock(&priv->mutex);
2361 iwl_scan_cancel_timeout(priv, 100);
2362 mutex_unlock(&priv->mutex);
2363
2364 /* If we are getting WEP group key and we didn't receive any key mapping
2365 * so far, we are in legacy wep mode (group key only), otherwise we are
2366 * in 1X mode.
2367 * In legacy wep mode, we use another host command to the uCode */
2368 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2369 priv->iw_mode != NL80211_IFTYPE_AP) {
2370 if (cmd == SET_KEY)
2371 is_default_wep_key = !priv->key_mapping_key;
2372 else
2373 is_default_wep_key =
2374 (key->hw_key_idx == HW_KEY_DEFAULT);
2375 }
2376
2377 switch (cmd) {
2378 case SET_KEY:
2379 if (is_default_wep_key)
2380 ret = iwl_set_default_wep_key(priv, key);
2381 else
2382 ret = iwl_set_dynamic_key(priv, key, sta_id);
2383
2384 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2385 break;
2386 case DISABLE_KEY:
2387 if (is_default_wep_key)
2388 ret = iwl_remove_default_wep_key(priv, key);
2389 else
2390 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2391
2392 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2393 break;
2394 default:
2395 ret = -EINVAL;
2396 }
2397
2398 IWL_DEBUG_MAC80211(priv, "leave\n");
2399
2400 return ret;
2401 }
2402
2403 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2404 enum ieee80211_ampdu_mlme_action action,
2405 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2406 {
2407 struct iwl_priv *priv = hw->priv;
2408 int ret;
2409
2410 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2411 sta->addr, tid);
2412
2413 if (!(priv->cfg->sku & IWL_SKU_N))
2414 return -EACCES;
2415
2416 switch (action) {
2417 case IEEE80211_AMPDU_RX_START:
2418 IWL_DEBUG_HT(priv, "start Rx\n");
2419 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2420 case IEEE80211_AMPDU_RX_STOP:
2421 IWL_DEBUG_HT(priv, "stop Rx\n");
2422 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2423 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2424 return 0;
2425 else
2426 return ret;
2427 case IEEE80211_AMPDU_TX_START:
2428 IWL_DEBUG_HT(priv, "start Tx\n");
2429 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2430 case IEEE80211_AMPDU_TX_STOP:
2431 IWL_DEBUG_HT(priv, "stop Tx\n");
2432 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2433 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2434 return 0;
2435 else
2436 return ret;
2437 default:
2438 IWL_DEBUG_HT(priv, "unknown\n");
2439 return -EINVAL;
2440 break;
2441 }
2442 return 0;
2443 }
2444
2445 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2446 struct ieee80211_low_level_stats *stats)
2447 {
2448 struct iwl_priv *priv = hw->priv;
2449
2450 priv = hw->priv;
2451 IWL_DEBUG_MAC80211(priv, "enter\n");
2452 IWL_DEBUG_MAC80211(priv, "leave\n");
2453
2454 return 0;
2455 }
2456
2457 /*****************************************************************************
2458 *
2459 * sysfs attributes
2460 *
2461 *****************************************************************************/
2462
2463 #ifdef CONFIG_IWLWIFI_DEBUG
2464
2465 /*
2466 * The following adds a new attribute to the sysfs representation
2467 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2468 * used for controlling the debug level.
2469 *
2470 * See the level definitions in iwl for details.
2471 */
2472
2473 static ssize_t show_debug_level(struct device *d,
2474 struct device_attribute *attr, char *buf)
2475 {
2476 struct iwl_priv *priv = dev_get_drvdata(d);
2477
2478 return sprintf(buf, "0x%08X\n", priv->debug_level);
2479 }
2480 static ssize_t store_debug_level(struct device *d,
2481 struct device_attribute *attr,
2482 const char *buf, size_t count)
2483 {
2484 struct iwl_priv *priv = dev_get_drvdata(d);
2485 unsigned long val;
2486 int ret;
2487
2488 ret = strict_strtoul(buf, 0, &val);
2489 if (ret)
2490 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2491 else
2492 priv->debug_level = val;
2493
2494 return strnlen(buf, count);
2495 }
2496
2497 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2498 show_debug_level, store_debug_level);
2499
2500
2501 #endif /* CONFIG_IWLWIFI_DEBUG */
2502
2503
2504 static ssize_t show_version(struct device *d,
2505 struct device_attribute *attr, char *buf)
2506 {
2507 struct iwl_priv *priv = dev_get_drvdata(d);
2508 struct iwl_alive_resp *palive = &priv->card_alive;
2509 ssize_t pos = 0;
2510 u16 eeprom_ver;
2511
2512 if (palive->is_valid)
2513 pos += sprintf(buf + pos,
2514 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2515 "fw type: 0x%01X 0x%01X\n",
2516 palive->ucode_major, palive->ucode_minor,
2517 palive->sw_rev[0], palive->sw_rev[1],
2518 palive->ver_type, palive->ver_subtype);
2519 else
2520 pos += sprintf(buf + pos, "fw not loaded\n");
2521
2522 if (priv->eeprom) {
2523 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2524 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2525 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2526 ? "OTP" : "EEPROM", eeprom_ver);
2527
2528 } else {
2529 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2530 }
2531
2532 return pos;
2533 }
2534
2535 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2536
2537 static ssize_t show_temperature(struct device *d,
2538 struct device_attribute *attr, char *buf)
2539 {
2540 struct iwl_priv *priv = dev_get_drvdata(d);
2541
2542 if (!iwl_is_alive(priv))
2543 return -EAGAIN;
2544
2545 return sprintf(buf, "%d\n", priv->temperature);
2546 }
2547
2548 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2549
2550 static ssize_t show_tx_power(struct device *d,
2551 struct device_attribute *attr, char *buf)
2552 {
2553 struct iwl_priv *priv = dev_get_drvdata(d);
2554
2555 if (!iwl_is_ready_rf(priv))
2556 return sprintf(buf, "off\n");
2557 else
2558 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2559 }
2560
2561 static ssize_t store_tx_power(struct device *d,
2562 struct device_attribute *attr,
2563 const char *buf, size_t count)
2564 {
2565 struct iwl_priv *priv = dev_get_drvdata(d);
2566 unsigned long val;
2567 int ret;
2568
2569 ret = strict_strtoul(buf, 10, &val);
2570 if (ret)
2571 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2572 else
2573 iwl_set_tx_power(priv, val, false);
2574
2575 return count;
2576 }
2577
2578 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2579
2580 static ssize_t show_flags(struct device *d,
2581 struct device_attribute *attr, char *buf)
2582 {
2583 struct iwl_priv *priv = dev_get_drvdata(d);
2584
2585 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2586 }
2587
2588 static ssize_t store_flags(struct device *d,
2589 struct device_attribute *attr,
2590 const char *buf, size_t count)
2591 {
2592 struct iwl_priv *priv = dev_get_drvdata(d);
2593 unsigned long val;
2594 u32 flags;
2595 int ret = strict_strtoul(buf, 0, &val);
2596 if (ret)
2597 return ret;
2598 flags = (u32)val;
2599
2600 mutex_lock(&priv->mutex);
2601 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2602 /* Cancel any currently running scans... */
2603 if (iwl_scan_cancel_timeout(priv, 100))
2604 IWL_WARN(priv, "Could not cancel scan.\n");
2605 else {
2606 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2607 priv->staging_rxon.flags = cpu_to_le32(flags);
2608 iwlcore_commit_rxon(priv);
2609 }
2610 }
2611 mutex_unlock(&priv->mutex);
2612
2613 return count;
2614 }
2615
2616 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2617
2618 static ssize_t show_filter_flags(struct device *d,
2619 struct device_attribute *attr, char *buf)
2620 {
2621 struct iwl_priv *priv = dev_get_drvdata(d);
2622
2623 return sprintf(buf, "0x%04X\n",
2624 le32_to_cpu(priv->active_rxon.filter_flags));
2625 }
2626
2627 static ssize_t store_filter_flags(struct device *d,
2628 struct device_attribute *attr,
2629 const char *buf, size_t count)
2630 {
2631 struct iwl_priv *priv = dev_get_drvdata(d);
2632 unsigned long val;
2633 u32 filter_flags;
2634 int ret = strict_strtoul(buf, 0, &val);
2635 if (ret)
2636 return ret;
2637 filter_flags = (u32)val;
2638
2639 mutex_lock(&priv->mutex);
2640 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2641 /* Cancel any currently running scans... */
2642 if (iwl_scan_cancel_timeout(priv, 100))
2643 IWL_WARN(priv, "Could not cancel scan.\n");
2644 else {
2645 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2646 "0x%04X\n", filter_flags);
2647 priv->staging_rxon.filter_flags =
2648 cpu_to_le32(filter_flags);
2649 iwlcore_commit_rxon(priv);
2650 }
2651 }
2652 mutex_unlock(&priv->mutex);
2653
2654 return count;
2655 }
2656
2657 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2658 store_filter_flags);
2659
2660 static ssize_t store_power_level(struct device *d,
2661 struct device_attribute *attr,
2662 const char *buf, size_t count)
2663 {
2664 struct iwl_priv *priv = dev_get_drvdata(d);
2665 int ret;
2666 unsigned long mode;
2667
2668
2669 mutex_lock(&priv->mutex);
2670
2671 ret = strict_strtoul(buf, 10, &mode);
2672 if (ret)
2673 goto out;
2674
2675 ret = iwl_power_set_user_mode(priv, mode);
2676 if (ret) {
2677 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2678 goto out;
2679 }
2680 ret = count;
2681
2682 out:
2683 mutex_unlock(&priv->mutex);
2684 return ret;
2685 }
2686
2687 static ssize_t show_power_level(struct device *d,
2688 struct device_attribute *attr, char *buf)
2689 {
2690 struct iwl_priv *priv = dev_get_drvdata(d);
2691 int level = priv->power_data.power_mode;
2692 char *p = buf;
2693
2694 p += sprintf(p, "%d\n", level);
2695 return p - buf + 1;
2696 }
2697
2698 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2699 store_power_level);
2700
2701 static ssize_t show_qos(struct device *d,
2702 struct device_attribute *attr, char *buf)
2703 {
2704 struct iwl_priv *priv = dev_get_drvdata(d);
2705 char *p = buf;
2706 int q;
2707
2708 for (q = 0; q < AC_NUM; q++) {
2709 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2710 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2711 priv->qos_data.def_qos_parm.ac[q].cw_min,
2712 priv->qos_data.def_qos_parm.ac[q].cw_max,
2713 priv->qos_data.def_qos_parm.ac[q].aifsn,
2714 priv->qos_data.def_qos_parm.ac[q].edca_txop);
2715 }
2716
2717 return p - buf + 1;
2718 }
2719
2720 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2721
2722 static ssize_t show_statistics(struct device *d,
2723 struct device_attribute *attr, char *buf)
2724 {
2725 struct iwl_priv *priv = dev_get_drvdata(d);
2726 u32 size = sizeof(struct iwl_notif_statistics);
2727 u32 len = 0, ofs = 0;
2728 u8 *data = (u8 *)&priv->statistics;
2729 int rc = 0;
2730
2731 if (!iwl_is_alive(priv))
2732 return -EAGAIN;
2733
2734 mutex_lock(&priv->mutex);
2735 rc = iwl_send_statistics_request(priv, 0);
2736 mutex_unlock(&priv->mutex);
2737
2738 if (rc) {
2739 len = sprintf(buf,
2740 "Error sending statistics request: 0x%08X\n", rc);
2741 return len;
2742 }
2743
2744 while (size && (PAGE_SIZE - len)) {
2745 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2746 PAGE_SIZE - len, 1);
2747 len = strlen(buf);
2748 if (PAGE_SIZE - len)
2749 buf[len++] = '\n';
2750
2751 ofs += 16;
2752 size -= min(size, 16U);
2753 }
2754
2755 return len;
2756 }
2757
2758 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2759
2760
2761 /*****************************************************************************
2762 *
2763 * driver setup and teardown
2764 *
2765 *****************************************************************************/
2766
2767 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2768 {
2769 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2770
2771 init_waitqueue_head(&priv->wait_command_queue);
2772
2773 INIT_WORK(&priv->up, iwl_bg_up);
2774 INIT_WORK(&priv->restart, iwl_bg_restart);
2775 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2776 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2777 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2778 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2779 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2780
2781 iwl_setup_scan_deferred_work(priv);
2782
2783 if (priv->cfg->ops->lib->setup_deferred_work)
2784 priv->cfg->ops->lib->setup_deferred_work(priv);
2785
2786 init_timer(&priv->statistics_periodic);
2787 priv->statistics_periodic.data = (unsigned long)priv;
2788 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2789
2790 if (!priv->cfg->use_isr_legacy)
2791 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2792 iwl_irq_tasklet, (unsigned long)priv);
2793 else
2794 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2795 iwl_irq_tasklet_legacy, (unsigned long)priv);
2796 }
2797
2798 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2799 {
2800 if (priv->cfg->ops->lib->cancel_deferred_work)
2801 priv->cfg->ops->lib->cancel_deferred_work(priv);
2802
2803 cancel_delayed_work_sync(&priv->init_alive_start);
2804 cancel_delayed_work(&priv->scan_check);
2805 cancel_delayed_work(&priv->alive_start);
2806 cancel_work_sync(&priv->beacon_update);
2807 del_timer_sync(&priv->statistics_periodic);
2808 }
2809
2810 static struct attribute *iwl_sysfs_entries[] = {
2811 &dev_attr_flags.attr,
2812 &dev_attr_filter_flags.attr,
2813 &dev_attr_power_level.attr,
2814 &dev_attr_statistics.attr,
2815 &dev_attr_temperature.attr,
2816 &dev_attr_tx_power.attr,
2817 #ifdef CONFIG_IWLWIFI_DEBUG
2818 &dev_attr_debug_level.attr,
2819 #endif
2820 &dev_attr_version.attr,
2821 &dev_attr_qos.attr,
2822 NULL
2823 };
2824
2825 static struct attribute_group iwl_attribute_group = {
2826 .name = NULL, /* put in device directory */
2827 .attrs = iwl_sysfs_entries,
2828 };
2829
2830 static struct ieee80211_ops iwl_hw_ops = {
2831 .tx = iwl_mac_tx,
2832 .start = iwl_mac_start,
2833 .stop = iwl_mac_stop,
2834 .add_interface = iwl_mac_add_interface,
2835 .remove_interface = iwl_mac_remove_interface,
2836 .config = iwl_mac_config,
2837 .configure_filter = iwl_configure_filter,
2838 .set_key = iwl_mac_set_key,
2839 .update_tkip_key = iwl_mac_update_tkip_key,
2840 .get_stats = iwl_mac_get_stats,
2841 .get_tx_stats = iwl_mac_get_tx_stats,
2842 .conf_tx = iwl_mac_conf_tx,
2843 .reset_tsf = iwl_mac_reset_tsf,
2844 .bss_info_changed = iwl_bss_info_changed,
2845 .ampdu_action = iwl_mac_ampdu_action,
2846 .hw_scan = iwl_mac_hw_scan
2847 };
2848
2849 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2850 {
2851 int err = 0;
2852 struct iwl_priv *priv;
2853 struct ieee80211_hw *hw;
2854 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2855 unsigned long flags;
2856 u16 pci_cmd;
2857
2858 /************************
2859 * 1. Allocating HW data
2860 ************************/
2861
2862 /* Disabling hardware scan means that mac80211 will perform scans
2863 * "the hard way", rather than using device's scan. */
2864 if (cfg->mod_params->disable_hw_scan) {
2865 if (cfg->mod_params->debug & IWL_DL_INFO)
2866 dev_printk(KERN_DEBUG, &(pdev->dev),
2867 "Disabling hw_scan\n");
2868 iwl_hw_ops.hw_scan = NULL;
2869 }
2870
2871 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2872 if (!hw) {
2873 err = -ENOMEM;
2874 goto out;
2875 }
2876 priv = hw->priv;
2877 /* At this point both hw and priv are allocated. */
2878
2879 SET_IEEE80211_DEV(hw, &pdev->dev);
2880
2881 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2882 priv->cfg = cfg;
2883 priv->pci_dev = pdev;
2884 priv->inta_mask = CSR_INI_SET_MASK;
2885
2886 #ifdef CONFIG_IWLWIFI_DEBUG
2887 priv->debug_level = priv->cfg->mod_params->debug;
2888 atomic_set(&priv->restrict_refcnt, 0);
2889 #endif
2890
2891 /**************************
2892 * 2. Initializing PCI bus
2893 **************************/
2894 if (pci_enable_device(pdev)) {
2895 err = -ENODEV;
2896 goto out_ieee80211_free_hw;
2897 }
2898
2899 pci_set_master(pdev);
2900
2901 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2902 if (!err)
2903 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2904 if (err) {
2905 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2906 if (!err)
2907 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2908 /* both attempts failed: */
2909 if (err) {
2910 IWL_WARN(priv, "No suitable DMA available.\n");
2911 goto out_pci_disable_device;
2912 }
2913 }
2914
2915 err = pci_request_regions(pdev, DRV_NAME);
2916 if (err)
2917 goto out_pci_disable_device;
2918
2919 pci_set_drvdata(pdev, priv);
2920
2921
2922 /***********************
2923 * 3. Read REV register
2924 ***********************/
2925 priv->hw_base = pci_iomap(pdev, 0, 0);
2926 if (!priv->hw_base) {
2927 err = -ENODEV;
2928 goto out_pci_release_regions;
2929 }
2930
2931 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2932 (unsigned long long) pci_resource_len(pdev, 0));
2933 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2934
2935 /* this spin lock will be used in apm_ops.init and EEPROM access
2936 * we should init now
2937 */
2938 spin_lock_init(&priv->reg_lock);
2939 iwl_hw_detect(priv);
2940 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2941 priv->cfg->name, priv->hw_rev);
2942
2943 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2944 * PCI Tx retries from interfering with C3 CPU state */
2945 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2946
2947 iwl_prepare_card_hw(priv);
2948 if (!priv->hw_ready) {
2949 IWL_WARN(priv, "Failed, HW not ready\n");
2950 goto out_iounmap;
2951 }
2952
2953 /* amp init */
2954 err = priv->cfg->ops->lib->apm_ops.init(priv);
2955 if (err < 0) {
2956 IWL_ERR(priv, "Failed to init APMG\n");
2957 goto out_iounmap;
2958 }
2959 /*****************
2960 * 4. Read EEPROM
2961 *****************/
2962 /* Read the EEPROM */
2963 err = iwl_eeprom_init(priv);
2964 if (err) {
2965 IWL_ERR(priv, "Unable to init EEPROM\n");
2966 goto out_iounmap;
2967 }
2968 err = iwl_eeprom_check_version(priv);
2969 if (err)
2970 goto out_free_eeprom;
2971
2972 /* extract MAC Address */
2973 iwl_eeprom_get_mac(priv, priv->mac_addr);
2974 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2975 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2976
2977 /************************
2978 * 5. Setup HW constants
2979 ************************/
2980 if (iwl_set_hw_params(priv)) {
2981 IWL_ERR(priv, "failed to set hw parameters\n");
2982 goto out_free_eeprom;
2983 }
2984
2985 /*******************
2986 * 6. Setup priv
2987 *******************/
2988
2989 err = iwl_init_drv(priv);
2990 if (err)
2991 goto out_free_eeprom;
2992 /* At this point both hw and priv are initialized. */
2993
2994 /********************
2995 * 7. Setup services
2996 ********************/
2997 spin_lock_irqsave(&priv->lock, flags);
2998 iwl_disable_interrupts(priv);
2999 spin_unlock_irqrestore(&priv->lock, flags);
3000
3001 pci_enable_msi(priv->pci_dev);
3002
3003 iwl_alloc_isr_ict(priv);
3004 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3005 IRQF_SHARED, DRV_NAME, priv);
3006 if (err) {
3007 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3008 goto out_disable_msi;
3009 }
3010 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3011 if (err) {
3012 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3013 goto out_free_irq;
3014 }
3015
3016 iwl_setup_deferred_work(priv);
3017 iwl_setup_rx_handlers(priv);
3018
3019 /**********************************
3020 * 8. Setup and register mac80211
3021 **********************************/
3022
3023 /* enable interrupts if needed: hw bug w/a */
3024 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3025 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3026 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3027 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3028 }
3029
3030 iwl_enable_interrupts(priv);
3031
3032 err = iwl_setup_mac(priv);
3033 if (err)
3034 goto out_remove_sysfs;
3035
3036 err = iwl_dbgfs_register(priv, DRV_NAME);
3037 if (err)
3038 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3039
3040 /* If platform's RF_KILL switch is NOT set to KILL */
3041 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3042 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3043 else
3044 set_bit(STATUS_RF_KILL_HW, &priv->status);
3045
3046 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3047 test_bit(STATUS_RF_KILL_HW, &priv->status));
3048
3049 iwl_power_initialize(priv);
3050 return 0;
3051
3052 out_remove_sysfs:
3053 destroy_workqueue(priv->workqueue);
3054 priv->workqueue = NULL;
3055 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3056 out_free_irq:
3057 free_irq(priv->pci_dev->irq, priv);
3058 iwl_free_isr_ict(priv);
3059 out_disable_msi:
3060 pci_disable_msi(priv->pci_dev);
3061 iwl_uninit_drv(priv);
3062 out_free_eeprom:
3063 iwl_eeprom_free(priv);
3064 out_iounmap:
3065 pci_iounmap(pdev, priv->hw_base);
3066 out_pci_release_regions:
3067 pci_set_drvdata(pdev, NULL);
3068 pci_release_regions(pdev);
3069 out_pci_disable_device:
3070 pci_disable_device(pdev);
3071 out_ieee80211_free_hw:
3072 ieee80211_free_hw(priv->hw);
3073 out:
3074 return err;
3075 }
3076
3077 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3078 {
3079 struct iwl_priv *priv = pci_get_drvdata(pdev);
3080 unsigned long flags;
3081
3082 if (!priv)
3083 return;
3084
3085 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3086
3087 iwl_dbgfs_unregister(priv);
3088 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3089
3090 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3091 * to be called and iwl_down since we are removing the device
3092 * we need to set STATUS_EXIT_PENDING bit.
3093 */
3094 set_bit(STATUS_EXIT_PENDING, &priv->status);
3095 if (priv->mac80211_registered) {
3096 ieee80211_unregister_hw(priv->hw);
3097 priv->mac80211_registered = 0;
3098 } else {
3099 iwl_down(priv);
3100 }
3101
3102 /* make sure we flush any pending irq or
3103 * tasklet for the driver
3104 */
3105 spin_lock_irqsave(&priv->lock, flags);
3106 iwl_disable_interrupts(priv);
3107 spin_unlock_irqrestore(&priv->lock, flags);
3108
3109 iwl_synchronize_irq(priv);
3110
3111 iwl_dealloc_ucode_pci(priv);
3112
3113 if (priv->rxq.bd)
3114 iwl_rx_queue_free(priv, &priv->rxq);
3115 iwl_hw_txq_ctx_free(priv);
3116
3117 iwl_clear_stations_table(priv);
3118 iwl_eeprom_free(priv);
3119
3120
3121 /*netif_stop_queue(dev); */
3122 flush_workqueue(priv->workqueue);
3123
3124 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3125 * priv->workqueue... so we can't take down the workqueue
3126 * until now... */
3127 destroy_workqueue(priv->workqueue);
3128 priv->workqueue = NULL;
3129
3130 free_irq(priv->pci_dev->irq, priv);
3131 pci_disable_msi(priv->pci_dev);
3132 pci_iounmap(pdev, priv->hw_base);
3133 pci_release_regions(pdev);
3134 pci_disable_device(pdev);
3135 pci_set_drvdata(pdev, NULL);
3136
3137 iwl_uninit_drv(priv);
3138
3139 iwl_free_isr_ict(priv);
3140
3141 if (priv->ibss_beacon)
3142 dev_kfree_skb(priv->ibss_beacon);
3143
3144 ieee80211_free_hw(priv->hw);
3145 }
3146
3147
3148 /*****************************************************************************
3149 *
3150 * driver and module entry point
3151 *
3152 *****************************************************************************/
3153
3154 /* Hardware specific file defines the PCI IDs table for that hardware module */
3155 static struct pci_device_id iwl_hw_card_ids[] = {
3156 #ifdef CONFIG_IWL4965
3157 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3158 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3159 #endif /* CONFIG_IWL4965 */
3160 #ifdef CONFIG_IWL5000
3161 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3162 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3163 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3164 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3165 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3166 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3167 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3168 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3169 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3170 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3171 /* 5350 WiFi/WiMax */
3172 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3173 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3174 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3175 /* 5150 Wifi/WiMax */
3176 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3177 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3178 /* 6000/6050 Series */
3179 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3180 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3181 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3182 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3183 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
3184 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3185 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
3186 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3187 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3188 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3189 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3190 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3191 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3192 /* 1000 Series WiFi */
3193 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3194 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3195 #endif /* CONFIG_IWL5000 */
3196
3197 {0}
3198 };
3199 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3200
3201 static struct pci_driver iwl_driver = {
3202 .name = DRV_NAME,
3203 .id_table = iwl_hw_card_ids,
3204 .probe = iwl_pci_probe,
3205 .remove = __devexit_p(iwl_pci_remove),
3206 #ifdef CONFIG_PM
3207 .suspend = iwl_pci_suspend,
3208 .resume = iwl_pci_resume,
3209 #endif
3210 };
3211
3212 static int __init iwl_init(void)
3213 {
3214
3215 int ret;
3216 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3217 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3218
3219 ret = iwlagn_rate_control_register();
3220 if (ret) {
3221 printk(KERN_ERR DRV_NAME
3222 "Unable to register rate control algorithm: %d\n", ret);
3223 return ret;
3224 }
3225
3226 ret = pci_register_driver(&iwl_driver);
3227 if (ret) {
3228 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3229 goto error_register;
3230 }
3231
3232 return ret;
3233
3234 error_register:
3235 iwlagn_rate_control_unregister();
3236 return ret;
3237 }
3238
3239 static void __exit iwl_exit(void)
3240 {
3241 pci_unregister_driver(&iwl_driver);
3242 iwlagn_rate_control_unregister();
3243 }
3244
3245 module_exit(iwl_exit);
3246 module_init(iwl_init);
3247
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