1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
62
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
67
68
69 #include <linux/config.h>
70 #include <linux/init.h>
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/sched.h>
74 #include <linux/slab.h>
75 #include <linux/delay.h>
76 #include <linux/interrupt.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/crc32.h>
80 #include <linux/device.h>
81 #include <linux/spinlock.h>
82 #include <linux/ethtool.h>
83 #include <linux/mii.h>
84 #include <linux/workqueue.h>
85
86 #include <linux/netdevice.h>
87 #include <linux/etherdevice.h>
88 #include <linux/skbuff.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 #include "smc91x.h"
94
95 #ifdef CONFIG_ISA
96 /*
97 * the LAN91C111 can be at any of the following port addresses. To change,
98 * for a slightly different card, you can add it to the array. Keep in
99 * mind that the array must end in zero.
100 */
101 static unsigned int smc_portlist[] __initdata = {
102 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
103 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
104 };
105
106 #ifndef SMC_IOADDR
107 # define SMC_IOADDR -1
108 #endif
109 static unsigned long io = SMC_IOADDR;
110 module_param(io, ulong, 0400);
111 MODULE_PARM_DESC(io, "I/O base address");
112
113 #ifndef SMC_IRQ
114 # define SMC_IRQ -1
115 #endif
116 static int irq = SMC_IRQ;
117 module_param(irq, int, 0400);
118 MODULE_PARM_DESC(irq, "IRQ number");
119
120 #endif /* CONFIG_ISA */
121
122 #ifndef SMC_NOWAIT
123 # define SMC_NOWAIT 0
124 #endif
125 static int nowait = SMC_NOWAIT;
126 module_param(nowait, int, 0400);
127 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128
129 /*
130 * Transmit timeout, default 5 seconds.
131 */
132 static int watchdog = 5000;
133 module_param(watchdog, int, 0400);
134 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
135
136 MODULE_LICENSE("GPL");
137
138 /*
139 * The internal workings of the driver. If you are changing anything
140 * here with the SMC stuff, you should have the datasheet and know
141 * what you are doing.
142 */
143 #define CARDNAME "smc91x"
144
145 /*
146 * Use power-down feature of the chip
147 */
148 #define POWER_DOWN 1
149
150 /*
151 * Wait time for memory to be free. This probably shouldn't be
152 * tuned that much, as waiting for this means nothing else happens
153 * in the system
154 */
155 #define MEMORY_WAIT_TIME 16
156
157 /*
158 * This selects whether TX packets are sent one by one to the SMC91x internal
159 * memory and throttled until transmission completes. This may prevent
160 * RX overruns a litle by keeping much of the memory free for RX packets
161 * but to the expense of reduced TX throughput and increased IRQ overhead.
162 * Note this is not a cure for a too slow data bus or too high IRQ latency.
163 */
164 #define THROTTLE_TX_PKTS 0
165
166 /*
167 * The MII clock high/low times. 2x this number gives the MII clock period
168 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
169 */
170 #define MII_DELAY 1
171
172 /* store this information for the driver.. */
173 struct smc_local {
174 /*
175 * If I have to wait until memory is available to send a
176 * packet, I will store the skbuff here, until I get the
177 * desired memory. Then, I'll send it out and free it.
178 */
179 struct sk_buff *pending_tx_skb;
180 struct tasklet_struct tx_task;
181
182 /*
183 * these are things that the kernel wants me to keep, so users
184 * can find out semi-useless statistics of how well the card is
185 * performing
186 */
187 struct net_device_stats stats;
188
189 /* version/revision of the SMC91x chip */
190 int version;
191
192 /* Contains the current active transmission mode */
193 int tcr_cur_mode;
194
195 /* Contains the current active receive mode */
196 int rcr_cur_mode;
197
198 /* Contains the current active receive/phy mode */
199 int rpc_cur_mode;
200 int ctl_rfduplx;
201 int ctl_rspeed;
202
203 u32 msg_enable;
204 u32 phy_type;
205 struct mii_if_info mii;
206
207 /* work queue */
208 struct work_struct phy_configure;
209 int work_pending;
210
211 spinlock_t lock;
212
213 #ifdef SMC_USE_PXA_DMA
214 /* DMA needs the physical address of the chip */
215 u_long physaddr;
216 #endif
217 };
218
219 #if SMC_DEBUG > 0
220 #define DBG(n, args...) \
221 do { \
222 if (SMC_DEBUG >= (n)) \
223 printk(args); \
224 } while (0)
225
226 #define PRINTK(args...) printk(args)
227 #else
228 #define DBG(n, args...) do { } while(0)
229 #define PRINTK(args...) printk(KERN_DEBUG args)
230 #endif
231
232 #if SMC_DEBUG > 3
233 static void PRINT_PKT(u_char *buf, int length)
234 {
235 int i;
236 int remainder;
237 int lines;
238
239 lines = length / 16;
240 remainder = length % 16;
241
242 for (i = 0; i < lines ; i ++) {
243 int cur;
244 for (cur = 0; cur < 8; cur++) {
245 u_char a, b;
246 a = *buf++;
247 b = *buf++;
248 printk("%02x%02x ", a, b);
249 }
250 printk("\n");
251 }
252 for (i = 0; i < remainder/2 ; i++) {
253 u_char a, b;
254 a = *buf++;
255 b = *buf++;
256 printk("%02x%02x ", a, b);
257 }
258 printk("\n");
259 }
260 #else
261 #define PRINT_PKT(x...) do { } while(0)
262 #endif
263
264
265 /* this enables an interrupt in the interrupt mask register */
266 #define SMC_ENABLE_INT(x) do { \
267 unsigned char mask; \
268 spin_lock_irq(&lp->lock); \
269 mask = SMC_GET_INT_MASK(); \
270 mask |= (x); \
271 SMC_SET_INT_MASK(mask); \
272 spin_unlock_irq(&lp->lock); \
273 } while (0)
274
275 /* this disables an interrupt from the interrupt mask register */
276 #define SMC_DISABLE_INT(x) do { \
277 unsigned char mask; \
278 spin_lock_irq(&lp->lock); \
279 mask = SMC_GET_INT_MASK(); \
280 mask &= ~(x); \
281 SMC_SET_INT_MASK(mask); \
282 spin_unlock_irq(&lp->lock); \
283 } while (0)
284
285 /*
286 * Wait while MMU is busy. This is usually in the order of a few nanosecs
287 * if at all, but let's avoid deadlocking the system if the hardware
288 * decides to go south.
289 */
290 #define SMC_WAIT_MMU_BUSY() do { \
291 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
292 unsigned long timeout = jiffies + 2; \
293 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
294 if (time_after(jiffies, timeout)) { \
295 printk("%s: timeout %s line %d\n", \
296 dev->name, __FILE__, __LINE__); \
297 break; \
298 } \
299 cpu_relax(); \
300 } \
301 } \
302 } while (0)
303
304
305 /*
306 * this does a soft reset on the device
307 */
308 static void smc_reset(struct net_device *dev)
309 {
310 unsigned long ioaddr = dev->base_addr;
311 struct smc_local *lp = netdev_priv(dev);
312 unsigned int ctl, cfg;
313
314 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
315
316 /* Disable all interrupts */
317 spin_lock(&lp->lock);
318 SMC_SELECT_BANK(2);
319 SMC_SET_INT_MASK(0);
320 spin_unlock(&lp->lock);
321
322 /*
323 * This resets the registers mostly to defaults, but doesn't
324 * affect EEPROM. That seems unnecessary
325 */
326 SMC_SELECT_BANK(0);
327 SMC_SET_RCR(RCR_SOFTRST);
328
329 /*
330 * Setup the Configuration Register
331 * This is necessary because the CONFIG_REG is not affected
332 * by a soft reset
333 */
334 SMC_SELECT_BANK(1);
335
336 cfg = CONFIG_DEFAULT;
337
338 /*
339 * Setup for fast accesses if requested. If the card/system
340 * can't handle it then there will be no recovery except for
341 * a hard reset or power cycle
342 */
343 if (nowait)
344 cfg |= CONFIG_NO_WAIT;
345
346 /*
347 * Release from possible power-down state
348 * Configuration register is not affected by Soft Reset
349 */
350 cfg |= CONFIG_EPH_POWER_EN;
351
352 SMC_SET_CONFIG(cfg);
353
354 /* this should pause enough for the chip to be happy */
355 /*
356 * elaborate? What does the chip _need_? --jgarzik
357 *
358 * This seems to be undocumented, but something the original
359 * driver(s) have always done. Suspect undocumented timing
360 * info/determined empirically. --rmk
361 */
362 udelay(1);
363
364 /* Disable transmit and receive functionality */
365 SMC_SELECT_BANK(0);
366 SMC_SET_RCR(RCR_CLEAR);
367 SMC_SET_TCR(TCR_CLEAR);
368
369 SMC_SELECT_BANK(1);
370 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
371
372 /*
373 * Set the control register to automatically release successfully
374 * transmitted packets, to make the best use out of our limited
375 * memory
376 */
377 if(!THROTTLE_TX_PKTS)
378 ctl |= CTL_AUTO_RELEASE;
379 else
380 ctl &= ~CTL_AUTO_RELEASE;
381 SMC_SET_CTL(ctl);
382
383 /* Reset the MMU */
384 SMC_SELECT_BANK(2);
385 SMC_SET_MMU_CMD(MC_RESET);
386 SMC_WAIT_MMU_BUSY();
387
388 /* clear anything saved */
389 if (lp->pending_tx_skb != NULL) {
390 dev_kfree_skb (lp->pending_tx_skb);
391 lp->pending_tx_skb = NULL;
392 lp->stats.tx_errors++;
393 lp->stats.tx_aborted_errors++;
394 }
395 }
396
397 /*
398 * Enable Interrupts, Receive, and Transmit
399 */
400 static void smc_enable(struct net_device *dev)
401 {
402 unsigned long ioaddr = dev->base_addr;
403 struct smc_local *lp = netdev_priv(dev);
404 int mask;
405
406 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
407
408 /* see the header file for options in TCR/RCR DEFAULT */
409 SMC_SELECT_BANK(0);
410 SMC_SET_TCR(lp->tcr_cur_mode);
411 SMC_SET_RCR(lp->rcr_cur_mode);
412
413 SMC_SELECT_BANK(1);
414 SMC_SET_MAC_ADDR(dev->dev_addr);
415
416 /* now, enable interrupts */
417 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
418 if (lp->version >= (CHIP_91100 << 4))
419 mask |= IM_MDINT;
420 SMC_SELECT_BANK(2);
421 SMC_SET_INT_MASK(mask);
422
423 /*
424 * From this point the register bank must _NOT_ be switched away
425 * to something else than bank 2 without proper locking against
426 * races with any tasklet or interrupt handlers until smc_shutdown()
427 * or smc_reset() is called.
428 */
429 }
430
431 /*
432 * this puts the device in an inactive state
433 */
434 static void smc_shutdown(struct net_device *dev)
435 {
436 unsigned long ioaddr = dev->base_addr;
437 struct smc_local *lp = netdev_priv(dev);
438
439 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
440
441 /* no more interrupts for me */
442 spin_lock(&lp->lock);
443 SMC_SELECT_BANK(2);
444 SMC_SET_INT_MASK(0);
445 spin_unlock(&lp->lock);
446
447 /* and tell the card to stay away from that nasty outside world */
448 SMC_SELECT_BANK(0);
449 SMC_SET_RCR(RCR_CLEAR);
450 SMC_SET_TCR(TCR_CLEAR);
451
452 #ifdef POWER_DOWN
453 /* finally, shut the chip down */
454 SMC_SELECT_BANK(1);
455 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
456 #endif
457 }
458
459 /*
460 * This is the procedure to handle the receipt of a packet.
461 */
462 static inline void smc_rcv(struct net_device *dev)
463 {
464 struct smc_local *lp = netdev_priv(dev);
465 unsigned long ioaddr = dev->base_addr;
466 unsigned int packet_number, status, packet_len;
467
468 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
469
470 packet_number = SMC_GET_RXFIFO();
471 if (unlikely(packet_number & RXFIFO_REMPTY)) {
472 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
473 return;
474 }
475
476 /* read from start of packet */
477 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
478
479 /* First two words are status and packet length */
480 SMC_GET_PKT_HDR(status, packet_len);
481 packet_len &= 0x07ff; /* mask off top bits */
482 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
483 dev->name, packet_number, status,
484 packet_len, packet_len);
485
486 if (unlikely(status & RS_ERRORS)) {
487 SMC_WAIT_MMU_BUSY();
488 SMC_SET_MMU_CMD(MC_RELEASE);
489 lp->stats.rx_errors++;
490 if (status & RS_ALGNERR)
491 lp->stats.rx_frame_errors++;
492 if (status & (RS_TOOSHORT | RS_TOOLONG))
493 lp->stats.rx_length_errors++;
494 if (status & RS_BADCRC)
495 lp->stats.rx_crc_errors++;
496 } else {
497 struct sk_buff *skb;
498 unsigned char *data;
499 unsigned int data_len;
500
501 /* set multicast stats */
502 if (status & RS_MULTICAST)
503 lp->stats.multicast++;
504
505 /*
506 * Actual payload is packet_len - 6 (or 5 if odd byte).
507 * We want skb_reserve(2) and the final ctrl word
508 * (2 bytes, possibly containing the payload odd byte).
509 * Furthermore, we add 2 bytes to allow rounding up to
510 * multiple of 4 bytes on 32 bit buses.
511 * Ence packet_len - 6 + 2 + 2 + 2.
512 */
513 skb = dev_alloc_skb(packet_len);
514 if (unlikely(skb == NULL)) {
515 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
516 dev->name);
517 SMC_WAIT_MMU_BUSY();
518 SMC_SET_MMU_CMD(MC_RELEASE);
519 lp->stats.rx_dropped++;
520 return;
521 }
522
523 /* Align IP header to 32 bits */
524 skb_reserve(skb, 2);
525
526 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
527 if (lp->version == 0x90)
528 status |= RS_ODDFRAME;
529
530 /*
531 * If odd length: packet_len - 5,
532 * otherwise packet_len - 6.
533 * With the trailing ctrl byte it's packet_len - 4.
534 */
535 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
536 data = skb_put(skb, data_len);
537 SMC_PULL_DATA(data, packet_len - 4);
538
539 SMC_WAIT_MMU_BUSY();
540 SMC_SET_MMU_CMD(MC_RELEASE);
541
542 PRINT_PKT(data, packet_len - 4);
543
544 dev->last_rx = jiffies;
545 skb->dev = dev;
546 skb->protocol = eth_type_trans(skb, dev);
547 netif_rx(skb);
548 lp->stats.rx_packets++;
549 lp->stats.rx_bytes += data_len;
550 }
551 }
552
553 #ifdef CONFIG_SMP
554 /*
555 * On SMP we have the following problem:
556 *
557 * A = smc_hardware_send_pkt()
558 * B = smc_hard_start_xmit()
559 * C = smc_interrupt()
560 *
561 * A and B can never be executed simultaneously. However, at least on UP,
562 * it is possible (and even desirable) for C to interrupt execution of
563 * A or B in order to have better RX reliability and avoid overruns.
564 * C, just like A and B, must have exclusive access to the chip and
565 * each of them must lock against any other concurrent access.
566 * Unfortunately this is not possible to have C suspend execution of A or
567 * B taking place on another CPU. On UP this is no an issue since A and B
568 * are run from softirq context and C from hard IRQ context, and there is
569 * no other CPU where concurrent access can happen.
570 * If ever there is a way to force at least B and C to always be executed
571 * on the same CPU then we could use read/write locks to protect against
572 * any other concurrent access and C would always interrupt B. But life
573 * isn't that easy in a SMP world...
574 */
575 #define smc_special_trylock(lock) \
576 ({ \
577 int __ret; \
578 local_irq_disable(); \
579 __ret = spin_trylock(lock); \
580 if (!__ret) \
581 local_irq_enable(); \
582 __ret; \
583 })
584 #define smc_special_lock(lock) spin_lock_irq(lock)
585 #define smc_special_unlock(lock) spin_unlock_irq(lock)
586 #else
587 #define smc_special_trylock(lock) (1)
588 #define smc_special_lock(lock) do { } while (0)
589 #define smc_special_unlock(lock) do { } while (0)
590 #endif
591
592 /*
593 * This is called to actually send a packet to the chip.
594 */
595 static void smc_hardware_send_pkt(unsigned long data)
596 {
597 struct net_device *dev = (struct net_device *)data;
598 struct smc_local *lp = netdev_priv(dev);
599 unsigned long ioaddr = dev->base_addr;
600 struct sk_buff *skb;
601 unsigned int packet_no, len;
602 unsigned char *buf;
603
604 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
605
606 if (!smc_special_trylock(&lp->lock)) {
607 netif_stop_queue(dev);
608 tasklet_schedule(&lp->tx_task);
609 return;
610 }
611
612 skb = lp->pending_tx_skb;
613 lp->pending_tx_skb = NULL;
614 packet_no = SMC_GET_AR();
615 if (unlikely(packet_no & AR_FAILED)) {
616 printk("%s: Memory allocation failed.\n", dev->name);
617 lp->stats.tx_errors++;
618 lp->stats.tx_fifo_errors++;
619 smc_special_unlock(&lp->lock);
620 goto done;
621 }
622
623 /* point to the beginning of the packet */
624 SMC_SET_PN(packet_no);
625 SMC_SET_PTR(PTR_AUTOINC);
626
627 buf = skb->data;
628 len = skb->len;
629 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
630 dev->name, packet_no, len, len, buf);
631 PRINT_PKT(buf, len);
632
633 /*
634 * Send the packet length (+6 for status words, length, and ctl.
635 * The card will pad to 64 bytes with zeroes if packet is too small.
636 */
637 SMC_PUT_PKT_HDR(0, len + 6);
638
639 /* send the actual data */
640 SMC_PUSH_DATA(buf, len & ~1);
641
642 /* Send final ctl word with the last byte if there is one */
643 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
644
645 /*
646 * If THROTTLE_TX_PKTS is set, we look at the TX_EMPTY flag
647 * before queueing this packet for TX, and if it's clear then
648 * we stop the queue here. This will have the effect of
649 * having at most 2 packets queued for TX in the chip's memory
650 * at all time. If THROTTLE_TX_PKTS is not set then the queue
651 * is stopped only when memory allocation (MC_ALLOC) does not
652 * succeed right away.
653 */
654 if (THROTTLE_TX_PKTS && !(SMC_GET_INT() & IM_TX_EMPTY_INT))
655 netif_stop_queue(dev);
656
657 /* queue the packet for TX */
658 SMC_SET_MMU_CMD(MC_ENQUEUE);
659 SMC_ACK_INT(IM_TX_EMPTY_INT);
660 smc_special_unlock(&lp->lock);
661
662 dev->trans_start = jiffies;
663 lp->stats.tx_packets++;
664 lp->stats.tx_bytes += len;
665
666 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
667
668 done: if (!THROTTLE_TX_PKTS)
669 netif_wake_queue(dev);
670
671 dev_kfree_skb(skb);
672 }
673
674 /*
675 * Since I am not sure if I will have enough room in the chip's ram
676 * to store the packet, I call this routine which either sends it
677 * now, or set the card to generates an interrupt when ready
678 * for the packet.
679 */
680 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
681 {
682 struct smc_local *lp = netdev_priv(dev);
683 unsigned long ioaddr = dev->base_addr;
684 unsigned int numPages, poll_count, status;
685
686 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
687
688 BUG_ON(lp->pending_tx_skb != NULL);
689 lp->pending_tx_skb = skb;
690
691 /*
692 * The MMU wants the number of pages to be the number of 256 bytes
693 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
694 *
695 * The 91C111 ignores the size bits, but earlier models don't.
696 *
697 * Pkt size for allocating is data length +6 (for additional status
698 * words, length and ctl)
699 *
700 * If odd size then last byte is included in ctl word.
701 */
702 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
703 if (unlikely(numPages > 7)) {
704 printk("%s: Far too big packet error.\n", dev->name);
705 lp->pending_tx_skb = NULL;
706 lp->stats.tx_errors++;
707 lp->stats.tx_dropped++;
708 dev_kfree_skb(skb);
709 return 0;
710 }
711
712 smc_special_lock(&lp->lock);
713
714 /* now, try to allocate the memory */
715 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
716
717 /*
718 * Poll the chip for a short amount of time in case the
719 * allocation succeeds quickly.
720 */
721 poll_count = MEMORY_WAIT_TIME;
722 do {
723 status = SMC_GET_INT();
724 if (status & IM_ALLOC_INT) {
725 SMC_ACK_INT(IM_ALLOC_INT);
726 break;
727 }
728 } while (--poll_count);
729
730 smc_special_unlock(&lp->lock);
731
732 if (!poll_count) {
733 /* oh well, wait until the chip finds memory later */
734 netif_stop_queue(dev);
735 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
736 SMC_ENABLE_INT(IM_ALLOC_INT);
737 } else {
738 /*
739 * Allocation succeeded: push packet to the chip's own memory
740 * immediately.
741 */
742 smc_hardware_send_pkt((unsigned long)dev);
743 }
744
745 return 0;
746 }
747
748 /*
749 * This handles a TX interrupt, which is only called when:
750 * - a TX error occurred, or
751 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
752 */
753 static void smc_tx(struct net_device *dev)
754 {
755 unsigned long ioaddr = dev->base_addr;
756 struct smc_local *lp = netdev_priv(dev);
757 unsigned int saved_packet, packet_no, tx_status, pkt_len;
758
759 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
760
761 /* If the TX FIFO is empty then nothing to do */
762 packet_no = SMC_GET_TXFIFO();
763 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
764 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
765 return;
766 }
767
768 /* select packet to read from */
769 saved_packet = SMC_GET_PN();
770 SMC_SET_PN(packet_no);
771
772 /* read the first word (status word) from this packet */
773 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
774 SMC_GET_PKT_HDR(tx_status, pkt_len);
775 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
776 dev->name, tx_status, packet_no);
777
778 if (!(tx_status & TS_SUCCESS))
779 lp->stats.tx_errors++;
780 if (tx_status & TS_LOSTCAR)
781 lp->stats.tx_carrier_errors++;
782
783 if (tx_status & TS_LATCOL) {
784 PRINTK("%s: late collision occurred on last xmit\n", dev->name);
785 lp->stats.tx_window_errors++;
786 if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
787 printk(KERN_INFO "%s: unexpectedly large numbers of "
788 "late collisions. Please check duplex "
789 "setting.\n", dev->name);
790 }
791 }
792
793 /* kill the packet */
794 SMC_WAIT_MMU_BUSY();
795 SMC_SET_MMU_CMD(MC_FREEPKT);
796
797 /* Don't restore Packet Number Reg until busy bit is cleared */
798 SMC_WAIT_MMU_BUSY();
799 SMC_SET_PN(saved_packet);
800
801 /* re-enable transmit */
802 SMC_SELECT_BANK(0);
803 SMC_SET_TCR(lp->tcr_cur_mode);
804 SMC_SELECT_BANK(2);
805 }
806
807
808 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
809
810 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
811 {
812 unsigned long ioaddr = dev->base_addr;
813 unsigned int mii_reg, mask;
814
815 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
816 mii_reg |= MII_MDOE;
817
818 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
819 if (val & mask)
820 mii_reg |= MII_MDO;
821 else
822 mii_reg &= ~MII_MDO;
823
824 SMC_SET_MII(mii_reg);
825 udelay(MII_DELAY);
826 SMC_SET_MII(mii_reg | MII_MCLK);
827 udelay(MII_DELAY);
828 }
829 }
830
831 static unsigned int smc_mii_in(struct net_device *dev, int bits)
832 {
833 unsigned long ioaddr = dev->base_addr;
834 unsigned int mii_reg, mask, val;
835
836 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
837 SMC_SET_MII(mii_reg);
838
839 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
840 if (SMC_GET_MII() & MII_MDI)
841 val |= mask;
842
843 SMC_SET_MII(mii_reg);
844 udelay(MII_DELAY);
845 SMC_SET_MII(mii_reg | MII_MCLK);
846 udelay(MII_DELAY);
847 }
848
849 return val;
850 }
851
852 /*
853 * Reads a register from the MII Management serial interface
854 */
855 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
856 {
857 unsigned long ioaddr = dev->base_addr;
858 unsigned int phydata;
859
860 SMC_SELECT_BANK(3);
861
862 /* Idle - 32 ones */
863 smc_mii_out(dev, 0xffffffff, 32);
864
865 /* Start code (01) + read (10) + phyaddr + phyreg */
866 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
867
868 /* Turnaround (2bits) + phydata */
869 phydata = smc_mii_in(dev, 18);
870
871 /* Return to idle state */
872 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
873
874 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
875 __FUNCTION__, phyaddr, phyreg, phydata);
876
877 SMC_SELECT_BANK(2);
878 return phydata;
879 }
880
881 /*
882 * Writes a register to the MII Management serial interface
883 */
884 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
885 int phydata)
886 {
887 unsigned long ioaddr = dev->base_addr;
888
889 SMC_SELECT_BANK(3);
890
891 /* Idle - 32 ones */
892 smc_mii_out(dev, 0xffffffff, 32);
893
894 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
895 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
896
897 /* Return to idle state */
898 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
899
900 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
901 __FUNCTION__, phyaddr, phyreg, phydata);
902
903 SMC_SELECT_BANK(2);
904 }
905
906 /*
907 * Finds and reports the PHY address
908 */
909 static void smc_phy_detect(struct net_device *dev)
910 {
911 struct smc_local *lp = netdev_priv(dev);
912 int phyaddr;
913
914 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
915
916 lp->phy_type = 0;
917
918 /*
919 * Scan all 32 PHY addresses if necessary, starting at
920 * PHY#1 to PHY#31, and then PHY#0 last.
921 */
922 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
923 unsigned int id1, id2;
924
925 /* Read the PHY identifiers */
926 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
927 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
928
929 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
930 dev->name, id1, id2);
931
932 /* Make sure it is a valid identifier */
933 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
934 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
935 /* Save the PHY's address */
936 lp->mii.phy_id = phyaddr & 31;
937 lp->phy_type = id1 << 16 | id2;
938 break;
939 }
940 }
941 }
942
943 /*
944 * Sets the PHY to a configuration as determined by the user
945 */
946 static int smc_phy_fixed(struct net_device *dev)
947 {
948 struct smc_local *lp = netdev_priv(dev);
949 unsigned long ioaddr = dev->base_addr;
950 int phyaddr = lp->mii.phy_id;
951 int bmcr, cfg1;
952
953 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
954
955 /* Enter Link Disable state */
956 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
957 cfg1 |= PHY_CFG1_LNKDIS;
958 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
959
960 /*
961 * Set our fixed capabilities
962 * Disable auto-negotiation
963 */
964 bmcr = 0;
965
966 if (lp->ctl_rfduplx)
967 bmcr |= BMCR_FULLDPLX;
968
969 if (lp->ctl_rspeed == 100)
970 bmcr |= BMCR_SPEED100;
971
972 /* Write our capabilities to the phy control register */
973 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
974
975 /* Re-Configure the Receive/Phy Control register */
976 SMC_SELECT_BANK(0);
977 SMC_SET_RPC(lp->rpc_cur_mode);
978 SMC_SELECT_BANK(2);
979
980 return 1;
981 }
982
983 /*
984 * smc_phy_reset - reset the phy
985 * @dev: net device
986 * @phy: phy address
987 *
988 * Issue a software reset for the specified PHY and
989 * wait up to 100ms for the reset to complete. We should
990 * not access the PHY for 50ms after issuing the reset.
991 *
992 * The time to wait appears to be dependent on the PHY.
993 *
994 * Must be called with lp->lock locked.
995 */
996 static int smc_phy_reset(struct net_device *dev, int phy)
997 {
998 struct smc_local *lp = netdev_priv(dev);
999 unsigned int bmcr;
1000 int timeout;
1001
1002 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1003
1004 for (timeout = 2; timeout; timeout--) {
1005 spin_unlock_irq(&lp->lock);
1006 msleep(50);
1007 spin_lock_irq(&lp->lock);
1008
1009 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1010 if (!(bmcr & BMCR_RESET))
1011 break;
1012 }
1013
1014 return bmcr & BMCR_RESET;
1015 }
1016
1017 /*
1018 * smc_phy_powerdown - powerdown phy
1019 * @dev: net device
1020 * @phy: phy address
1021 *
1022 * Power down the specified PHY
1023 */
1024 static void smc_phy_powerdown(struct net_device *dev, int phy)
1025 {
1026 unsigned int bmcr;
1027
1028 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1029 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1030 }
1031
1032 /*
1033 * smc_phy_check_media - check the media status and adjust TCR
1034 * @dev: net device
1035 * @init: set true for initialisation
1036 *
1037 * Select duplex mode depending on negotiation state. This
1038 * also updates our carrier state.
1039 */
1040 static void smc_phy_check_media(struct net_device *dev, int init)
1041 {
1042 struct smc_local *lp = netdev_priv(dev);
1043 unsigned long ioaddr = dev->base_addr;
1044
1045 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1046 /* duplex state has changed */
1047 if (lp->mii.full_duplex) {
1048 lp->tcr_cur_mode |= TCR_SWFDUP;
1049 } else {
1050 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1051 }
1052
1053 SMC_SELECT_BANK(0);
1054 SMC_SET_TCR(lp->tcr_cur_mode);
1055 }
1056 }
1057
1058 /*
1059 * Configures the specified PHY through the MII management interface
1060 * using Autonegotiation.
1061 * Calls smc_phy_fixed() if the user has requested a certain config.
1062 * If RPC ANEG bit is set, the media selection is dependent purely on
1063 * the selection by the MII (either in the MII BMCR reg or the result
1064 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1065 * is controlled by the RPC SPEED and RPC DPLX bits.
1066 */
1067 static void smc_phy_configure(void *data)
1068 {
1069 struct net_device *dev = data;
1070 struct smc_local *lp = netdev_priv(dev);
1071 unsigned long ioaddr = dev->base_addr;
1072 int phyaddr = lp->mii.phy_id;
1073 int my_phy_caps; /* My PHY capabilities */
1074 int my_ad_caps; /* My Advertised capabilities */
1075 int status;
1076
1077 DBG(3, "%s:smc_program_phy()\n", dev->name);
1078
1079 spin_lock_irq(&lp->lock);
1080
1081 /*
1082 * We should not be called if phy_type is zero.
1083 */
1084 if (lp->phy_type == 0)
1085 goto smc_phy_configure_exit;
1086
1087 if (smc_phy_reset(dev, phyaddr)) {
1088 printk("%s: PHY reset timed out\n", dev->name);
1089 goto smc_phy_configure_exit;
1090 }
1091
1092 /*
1093 * Enable PHY Interrupts (for register 18)
1094 * Interrupts listed here are disabled
1095 */
1096 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1097 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1098 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1099 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1100
1101 /* Configure the Receive/Phy Control register */
1102 SMC_SELECT_BANK(0);
1103 SMC_SET_RPC(lp->rpc_cur_mode);
1104
1105 /* If the user requested no auto neg, then go set his request */
1106 if (lp->mii.force_media) {
1107 smc_phy_fixed(dev);
1108 goto smc_phy_configure_exit;
1109 }
1110
1111 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1112 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1113
1114 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1115 printk(KERN_INFO "Auto negotiation NOT supported\n");
1116 smc_phy_fixed(dev);
1117 goto smc_phy_configure_exit;
1118 }
1119
1120 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1121
1122 if (my_phy_caps & BMSR_100BASE4)
1123 my_ad_caps |= ADVERTISE_100BASE4;
1124 if (my_phy_caps & BMSR_100FULL)
1125 my_ad_caps |= ADVERTISE_100FULL;
1126 if (my_phy_caps & BMSR_100HALF)
1127 my_ad_caps |= ADVERTISE_100HALF;
1128 if (my_phy_caps & BMSR_10FULL)
1129 my_ad_caps |= ADVERTISE_10FULL;
1130 if (my_phy_caps & BMSR_10HALF)
1131 my_ad_caps |= ADVERTISE_10HALF;
1132
1133 /* Disable capabilities not selected by our user */
1134 if (lp->ctl_rspeed != 100)
1135 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1136
1137 if (!lp->ctl_rfduplx)
1138 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1139
1140 /* Update our Auto-Neg Advertisement Register */
1141 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1142 lp->mii.advertising = my_ad_caps;
1143
1144 /*
1145 * Read the register back. Without this, it appears that when
1146 * auto-negotiation is restarted, sometimes it isn't ready and
1147 * the link does not come up.
1148 */
1149 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1150
1151 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1152 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1153
1154 /* Restart auto-negotiation process in order to advertise my caps */
1155 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1156
1157 smc_phy_check_media(dev, 1);
1158
1159 smc_phy_configure_exit:
1160 spin_unlock_irq(&lp->lock);
1161 lp->work_pending = 0;
1162 }
1163
1164 /*
1165 * smc_phy_interrupt
1166 *
1167 * Purpose: Handle interrupts relating to PHY register 18. This is
1168 * called from the "hard" interrupt handler under our private spinlock.
1169 */
1170 static void smc_phy_interrupt(struct net_device *dev)
1171 {
1172 struct smc_local *lp = netdev_priv(dev);
1173 int phyaddr = lp->mii.phy_id;
1174 int phy18;
1175
1176 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1177
1178 if (lp->phy_type == 0)
1179 return;
1180
1181 for(;;) {
1182 smc_phy_check_media(dev, 0);
1183
1184 /* Read PHY Register 18, Status Output */
1185 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1186 if ((phy18 & PHY_INT_INT) == 0)
1187 break;
1188 }
1189 }
1190
1191 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1192
1193 static void smc_10bt_check_media(struct net_device *dev, int init)
1194 {
1195 struct smc_local *lp = netdev_priv(dev);
1196 unsigned long ioaddr = dev->base_addr;
1197 unsigned int old_carrier, new_carrier;
1198
1199 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1200
1201 SMC_SELECT_BANK(0);
1202 new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0;
1203 SMC_SELECT_BANK(2);
1204
1205 if (init || (old_carrier != new_carrier)) {
1206 if (!new_carrier) {
1207 netif_carrier_off(dev);
1208 } else {
1209 netif_carrier_on(dev);
1210 }
1211 if (netif_msg_link(lp))
1212 printk(KERN_INFO "%s: link %s\n", dev->name,
1213 new_carrier ? "up" : "down");
1214 }
1215 }
1216
1217 static void smc_eph_interrupt(struct net_device *dev)
1218 {
1219 unsigned long ioaddr = dev->base_addr;
1220 unsigned int ctl;
1221
1222 smc_10bt_check_media(dev, 0);
1223
1224 SMC_SELECT_BANK(1);
1225 ctl = SMC_GET_CTL();
1226 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1227 SMC_SET_CTL(ctl);
1228 SMC_SELECT_BANK(2);
1229 }
1230
1231 /*
1232 * This is the main routine of the driver, to handle the device when
1233 * it needs some attention.
1234 */
1235 static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1236 {
1237 struct net_device *dev = dev_id;
1238 unsigned long ioaddr = dev->base_addr;
1239 struct smc_local *lp = netdev_priv(dev);
1240 int status, mask, timeout, card_stats;
1241 int saved_pointer;
1242
1243 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1244
1245 spin_lock(&lp->lock);
1246
1247 /* A preamble may be used when there is a potential race
1248 * between the interruptible transmit functions and this
1249 * ISR. */
1250 SMC_INTERRUPT_PREAMBLE;
1251
1252 saved_pointer = SMC_GET_PTR();
1253 mask = SMC_GET_INT_MASK();
1254 SMC_SET_INT_MASK(0);
1255
1256 /* set a timeout value, so I don't stay here forever */
1257 timeout = 8;
1258
1259 do {
1260 status = SMC_GET_INT();
1261
1262 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1263 dev->name, status, mask,
1264 ({ int meminfo; SMC_SELECT_BANK(0);
1265 meminfo = SMC_GET_MIR();
1266 SMC_SELECT_BANK(2); meminfo; }),
1267 SMC_GET_FIFO());
1268
1269 status &= mask;
1270 if (!status)
1271 break;
1272
1273 if (status & IM_RCV_INT) {
1274 DBG(3, "%s: RX irq\n", dev->name);
1275 smc_rcv(dev);
1276 } else if (status & IM_TX_INT) {
1277 DBG(3, "%s: TX int\n", dev->name);
1278 smc_tx(dev);
1279 SMC_ACK_INT(IM_TX_INT);
1280 if (THROTTLE_TX_PKTS)
1281 netif_wake_queue(dev);
1282 } else if (status & IM_ALLOC_INT) {
1283 DBG(3, "%s: Allocation irq\n", dev->name);
1284 tasklet_hi_schedule(&lp->tx_task);
1285 mask &= ~IM_ALLOC_INT;
1286 } else if (status & IM_TX_EMPTY_INT) {
1287 DBG(3, "%s: TX empty\n", dev->name);
1288 mask &= ~IM_TX_EMPTY_INT;
1289
1290 /* update stats */
1291 SMC_SELECT_BANK(0);
1292 card_stats = SMC_GET_COUNTER();
1293 SMC_SELECT_BANK(2);
1294
1295 /* single collisions */
1296 lp->stats.collisions += card_stats & 0xF;
1297 card_stats >>= 4;
1298
1299 /* multiple collisions */
1300 lp->stats.collisions += card_stats & 0xF;
1301 } else if (status & IM_RX_OVRN_INT) {
1302 DBG(1, "%s: RX overrun\n", dev->name);
1303 SMC_ACK_INT(IM_RX_OVRN_INT);
1304 lp->stats.rx_errors++;
1305 lp->stats.rx_fifo_errors++;
1306 } else if (status & IM_EPH_INT) {
1307 smc_eph_interrupt(dev);
1308 } else if (status & IM_MDINT) {
1309 SMC_ACK_INT(IM_MDINT);
1310 smc_phy_interrupt(dev);
1311 } else if (status & IM_ERCV_INT) {
1312 SMC_ACK_INT(IM_ERCV_INT);
1313 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1314 }
1315 } while (--timeout);
1316
1317 /* restore register states */
1318 SMC_SET_PTR(saved_pointer);
1319 SMC_SET_INT_MASK(mask);
1320
1321 spin_unlock(&lp->lock);
1322
1323 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1324
1325 /*
1326 * We return IRQ_HANDLED unconditionally here even if there was
1327 * nothing to do. There is a possibility that a packet might
1328 * get enqueued into the chip right after TX_EMPTY_INT is raised
1329 * but just before the CPU acknowledges the IRQ.
1330 * Better take an unneeded IRQ in some occasions than complexifying
1331 * the code for all cases.
1332 */
1333 return IRQ_HANDLED;
1334 }
1335
1336 #ifdef CONFIG_NET_POLL_CONTROLLER
1337 /*
1338 * Polling receive - used by netconsole and other diagnostic tools
1339 * to allow network i/o with interrupts disabled.
1340 */
1341 static void smc_poll_controller(struct net_device *dev)
1342 {
1343 disable_irq(dev->irq);
1344 smc_interrupt(dev->irq, dev, NULL);
1345 enable_irq(dev->irq);
1346 }
1347 #endif
1348
1349 /* Our watchdog timed out. Called by the networking layer */
1350 static void smc_timeout(struct net_device *dev)
1351 {
1352 struct smc_local *lp = netdev_priv(dev);
1353 unsigned long ioaddr = dev->base_addr;
1354 int status, mask, meminfo, fifo;
1355
1356 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1357
1358 spin_lock_irq(&lp->lock);
1359 status = SMC_GET_INT();
1360 mask = SMC_GET_INT_MASK();
1361 fifo = SMC_GET_FIFO();
1362 SMC_SELECT_BANK(0);
1363 meminfo = SMC_GET_MIR();
1364 SMC_SELECT_BANK(2);
1365 spin_unlock_irq(&lp->lock);
1366 PRINTK( "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1367 dev->name, status, mask, meminfo, fifo );
1368
1369 smc_reset(dev);
1370 smc_enable(dev);
1371
1372 /*
1373 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1374 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1375 * which calls schedule(). Hence we use a work queue.
1376 */
1377 if (lp->phy_type != 0) {
1378 if (schedule_work(&lp->phy_configure)) {
1379 lp->work_pending = 1;
1380 }
1381 }
1382
1383 /* We can accept TX packets again */
1384 dev->trans_start = jiffies;
1385 netif_wake_queue(dev);
1386 }
1387
1388 /*
1389 * This routine will, depending on the values passed to it,
1390 * either make it accept multicast packets, go into
1391 * promiscuous mode (for TCPDUMP and cousins) or accept
1392 * a select set of multicast packets
1393 */
1394 static void smc_set_multicast_list(struct net_device *dev)
1395 {
1396 struct smc_local *lp = netdev_priv(dev);
1397 unsigned long ioaddr = dev->base_addr;
1398 unsigned char multicast_table[8];
1399 int update_multicast = 0;
1400
1401 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1402
1403 if (dev->flags & IFF_PROMISC) {
1404 DBG(2, "%s: RCR_PRMS\n", dev->name);
1405 lp->rcr_cur_mode |= RCR_PRMS;
1406 }
1407
1408 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1409 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1410 when promiscuous mode is turned on.
1411 */
1412
1413 /*
1414 * Here, I am setting this to accept all multicast packets.
1415 * I don't need to zero the multicast table, because the flag is
1416 * checked before the table is
1417 */
1418 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1419 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1420 lp->rcr_cur_mode |= RCR_ALMUL;
1421 }
1422
1423 /*
1424 * This sets the internal hardware table to filter out unwanted
1425 * multicast packets before they take up memory.
1426 *
1427 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1428 * address are the offset into the table. If that bit is 1, then the
1429 * multicast packet is accepted. Otherwise, it's dropped silently.
1430 *
1431 * To use the 6 bits as an offset into the table, the high 3 bits are
1432 * the number of the 8 bit register, while the low 3 bits are the bit
1433 * within that register.
1434 */
1435 else if (dev->mc_count) {
1436 int i;
1437 struct dev_mc_list *cur_addr;
1438
1439 /* table for flipping the order of 3 bits */
1440 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1441
1442 /* start with a table of all zeros: reject all */
1443 memset(multicast_table, 0, sizeof(multicast_table));
1444
1445 cur_addr = dev->mc_list;
1446 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1447 int position;
1448
1449 /* do we have a pointer here? */
1450 if (!cur_addr)
1451 break;
1452 /* make sure this is a multicast address -
1453 shouldn't this be a given if we have it here ? */
1454 if (!(*cur_addr->dmi_addr & 1))
1455 continue;
1456
1457 /* only use the low order bits */
1458 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1459
1460 /* do some messy swapping to put the bit in the right spot */
1461 multicast_table[invert3[position&7]] |=
1462 (1<<invert3[(position>>3)&7]);
1463 }
1464
1465 /* be sure I get rid of flags I might have set */
1466 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1467
1468 /* now, the table can be loaded into the chipset */
1469 update_multicast = 1;
1470 } else {
1471 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1472 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1473
1474 /*
1475 * since I'm disabling all multicast entirely, I need to
1476 * clear the multicast list
1477 */
1478 memset(multicast_table, 0, sizeof(multicast_table));
1479 update_multicast = 1;
1480 }
1481
1482 spin_lock_irq(&lp->lock);
1483 SMC_SELECT_BANK(0);
1484 SMC_SET_RCR(lp->rcr_cur_mode);
1485 if (update_multicast) {
1486 SMC_SELECT_BANK(3);
1487 SMC_SET_MCAST(multicast_table);
1488 }
1489 SMC_SELECT_BANK(2);
1490 spin_unlock_irq(&lp->lock);
1491 }
1492
1493
1494 /*
1495 * Open and Initialize the board
1496 *
1497 * Set up everything, reset the card, etc..
1498 */
1499 static int
1500 smc_open(struct net_device *dev)
1501 {
1502 struct smc_local *lp = netdev_priv(dev);
1503
1504 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1505
1506 /*
1507 * Check that the address is valid. If its not, refuse
1508 * to bring the device up. The user must specify an
1509 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1510 */
1511 if (!is_valid_ether_addr(dev->dev_addr)) {
1512 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1513 return -EINVAL;
1514 }
1515
1516 /* Setup the default Register Modes */
1517 lp->tcr_cur_mode = TCR_DEFAULT;
1518 lp->rcr_cur_mode = RCR_DEFAULT;
1519 lp->rpc_cur_mode = RPC_DEFAULT;
1520
1521 /*
1522 * If we are not using a MII interface, we need to
1523 * monitor our own carrier signal to detect faults.
1524 */
1525 if (lp->phy_type == 0)
1526 lp->tcr_cur_mode |= TCR_MON_CSN;
1527
1528 /* reset the hardware */
1529 smc_reset(dev);
1530 smc_enable(dev);
1531
1532 /* Configure the PHY, initialize the link state */
1533 if (lp->phy_type != 0)
1534 smc_phy_configure(dev);
1535 else {
1536 spin_lock_irq(&lp->lock);
1537 smc_10bt_check_media(dev, 1);
1538 spin_unlock_irq(&lp->lock);
1539 }
1540
1541 netif_start_queue(dev);
1542 return 0;
1543 }
1544
1545 /*
1546 * smc_close
1547 *
1548 * this makes the board clean up everything that it can
1549 * and not talk to the outside world. Caused by
1550 * an 'ifconfig ethX down'
1551 */
1552 static int smc_close(struct net_device *dev)
1553 {
1554 struct smc_local *lp = netdev_priv(dev);
1555
1556 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1557
1558 netif_stop_queue(dev);
1559 netif_carrier_off(dev);
1560
1561 /* clear everything */
1562 smc_shutdown(dev);
1563
1564 if (lp->phy_type != 0) {
1565 /* We need to ensure that no calls to
1566 smc_phy_configure are pending.
1567
1568 flush_scheduled_work() cannot be called because we
1569 are running with the netlink semaphore held (from
1570 devinet_ioctl()) and the pending work queue
1571 contains linkwatch_event() (scheduled by
1572 netif_carrier_off() above). linkwatch_event() also
1573 wants the netlink semaphore.
1574 */
1575 while(lp->work_pending)
1576 schedule();
1577 smc_phy_powerdown(dev, lp->mii.phy_id);
1578 }
1579
1580 if (lp->pending_tx_skb) {
1581 dev_kfree_skb(lp->pending_tx_skb);
1582 lp->pending_tx_skb = NULL;
1583 }
1584
1585 return 0;
1586 }
1587
1588 /*
1589 * Get the current statistics.
1590 * This may be called with the card open or closed.
1591 */
1592 static struct net_device_stats *smc_query_statistics(struct net_device *dev)
1593 {
1594 struct smc_local *lp = netdev_priv(dev);
1595
1596 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1597
1598 return &lp->stats;
1599 }
1600
1601 /*
1602 * Ethtool support
1603 */
1604 static int
1605 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1606 {
1607 struct smc_local *lp = netdev_priv(dev);
1608 int ret;
1609
1610 cmd->maxtxpkt = 1;
1611 cmd->maxrxpkt = 1;
1612
1613 if (lp->phy_type != 0) {
1614 spin_lock_irq(&lp->lock);
1615 ret = mii_ethtool_gset(&lp->mii, cmd);
1616 spin_unlock_irq(&lp->lock);
1617 } else {
1618 cmd->supported = SUPPORTED_10baseT_Half |
1619 SUPPORTED_10baseT_Full |
1620 SUPPORTED_TP | SUPPORTED_AUI;
1621
1622 if (lp->ctl_rspeed == 10)
1623 cmd->speed = SPEED_10;
1624 else if (lp->ctl_rspeed == 100)
1625 cmd->speed = SPEED_100;
1626
1627 cmd->autoneg = AUTONEG_DISABLE;
1628 cmd->transceiver = XCVR_INTERNAL;
1629 cmd->port = 0;
1630 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1631
1632 ret = 0;
1633 }
1634
1635 return ret;
1636 }
1637
1638 static int
1639 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1640 {
1641 struct smc_local *lp = netdev_priv(dev);
1642 int ret;
1643
1644 if (lp->phy_type != 0) {
1645 spin_lock_irq(&lp->lock);
1646 ret = mii_ethtool_sset(&lp->mii, cmd);
1647 spin_unlock_irq(&lp->lock);
1648 } else {
1649 if (cmd->autoneg != AUTONEG_DISABLE ||
1650 cmd->speed != SPEED_10 ||
1651 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1652 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1653 return -EINVAL;
1654
1655 // lp->port = cmd->port;
1656 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1657
1658 // if (netif_running(dev))
1659 // smc_set_port(dev);
1660
1661 ret = 0;
1662 }
1663
1664 return ret;
1665 }
1666
1667 static void
1668 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1669 {
1670 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1671 strncpy(info->version, version, sizeof(info->version));
1672 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1673 }
1674
1675 static int smc_ethtool_nwayreset(struct net_device *dev)
1676 {
1677 struct smc_local *lp = netdev_priv(dev);
1678 int ret = -EINVAL;
1679
1680 if (lp->phy_type != 0) {
1681 spin_lock_irq(&lp->lock);
1682 ret = mii_nway_restart(&lp->mii);
1683 spin_unlock_irq(&lp->lock);
1684 }
1685
1686 return ret;
1687 }
1688
1689 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1690 {
1691 struct smc_local *lp = netdev_priv(dev);
1692 return lp->msg_enable;
1693 }
1694
1695 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1696 {
1697 struct smc_local *lp = netdev_priv(dev);
1698 lp->msg_enable = level;
1699 }
1700
1701 static struct ethtool_ops smc_ethtool_ops = {
1702 .get_settings = smc_ethtool_getsettings,
1703 .set_settings = smc_ethtool_setsettings,
1704 .get_drvinfo = smc_ethtool_getdrvinfo,
1705
1706 .get_msglevel = smc_ethtool_getmsglevel,
1707 .set_msglevel = smc_ethtool_setmsglevel,
1708 .nway_reset = smc_ethtool_nwayreset,
1709 .get_link = ethtool_op_get_link,
1710 // .get_eeprom = smc_ethtool_geteeprom,
1711 // .set_eeprom = smc_ethtool_seteeprom,
1712 };
1713
1714 /*
1715 * smc_findirq
1716 *
1717 * This routine has a simple purpose -- make the SMC chip generate an
1718 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1719 */
1720 /*
1721 * does this still work?
1722 *
1723 * I just deleted auto_irq.c, since it was never built...
1724 * --jgarzik
1725 */
1726 static int __init smc_findirq(unsigned long ioaddr)
1727 {
1728 int timeout = 20;
1729 unsigned long cookie;
1730
1731 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1732
1733 cookie = probe_irq_on();
1734
1735 /*
1736 * What I try to do here is trigger an ALLOC_INT. This is done
1737 * by allocating a small chunk of memory, which will give an interrupt
1738 * when done.
1739 */
1740 /* enable ALLOCation interrupts ONLY */
1741 SMC_SELECT_BANK(2);
1742 SMC_SET_INT_MASK(IM_ALLOC_INT);
1743
1744 /*
1745 * Allocate 512 bytes of memory. Note that the chip was just
1746 * reset so all the memory is available
1747 */
1748 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1749
1750 /*
1751 * Wait until positive that the interrupt has been generated
1752 */
1753 do {
1754 int int_status;
1755 udelay(10);
1756 int_status = SMC_GET_INT();
1757 if (int_status & IM_ALLOC_INT)
1758 break; /* got the interrupt */
1759 } while (--timeout);
1760
1761 /*
1762 * there is really nothing that I can do here if timeout fails,
1763 * as autoirq_report will return a 0 anyway, which is what I
1764 * want in this case. Plus, the clean up is needed in both
1765 * cases.
1766 */
1767
1768 /* and disable all interrupts again */
1769 SMC_SET_INT_MASK(0);
1770
1771 /* and return what I found */
1772 return probe_irq_off(cookie);
1773 }
1774
1775 /*
1776 * Function: smc_probe(unsigned long ioaddr)
1777 *
1778 * Purpose:
1779 * Tests to see if a given ioaddr points to an SMC91x chip.
1780 * Returns a 0 on success
1781 *
1782 * Algorithm:
1783 * (1) see if the high byte of BANK_SELECT is 0x33
1784 * (2) compare the ioaddr with the base register's address
1785 * (3) see if I recognize the chip ID in the appropriate register
1786 *
1787 * Here I do typical initialization tasks.
1788 *
1789 * o Initialize the structure if needed
1790 * o print out my vanity message if not done so already
1791 * o print out what type of hardware is detected
1792 * o print out the ethernet address
1793 * o find the IRQ
1794 * o set up my private data
1795 * o configure the dev structure with my subroutines
1796 * o actually GRAB the irq.
1797 * o GRAB the region
1798 */
1799 static int __init smc_probe(struct net_device *dev, unsigned long ioaddr)
1800 {
1801 struct smc_local *lp = netdev_priv(dev);
1802 static int version_printed = 0;
1803 int i, retval;
1804 unsigned int val, revision_register;
1805 const char *version_string;
1806
1807 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1808
1809 /* First, see if the high byte is 0x33 */
1810 val = SMC_CURRENT_BANK();
1811 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1812 if ((val & 0xFF00) != 0x3300) {
1813 if ((val & 0xFF) == 0x33) {
1814 printk(KERN_WARNING
1815 "%s: Detected possible byte-swapped interface"
1816 " at IOADDR 0x%lx\n", CARDNAME, ioaddr);
1817 }
1818 retval = -ENODEV;
1819 goto err_out;
1820 }
1821
1822 /*
1823 * The above MIGHT indicate a device, but I need to write to
1824 * further test this.
1825 */
1826 SMC_SELECT_BANK(0);
1827 val = SMC_CURRENT_BANK();
1828 if ((val & 0xFF00) != 0x3300) {
1829 retval = -ENODEV;
1830 goto err_out;
1831 }
1832
1833 /*
1834 * well, we've already written once, so hopefully another
1835 * time won't hurt. This time, I need to switch the bank
1836 * register to bank 1, so I can access the base address
1837 * register
1838 */
1839 SMC_SELECT_BANK(1);
1840 val = SMC_GET_BASE();
1841 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1842 if ((ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) {
1843 printk("%s: IOADDR %lx doesn't match configuration (%x).\n",
1844 CARDNAME, ioaddr, val);
1845 }
1846
1847 /*
1848 * check if the revision register is something that I
1849 * recognize. These might need to be added to later,
1850 * as future revisions could be added.
1851 */
1852 SMC_SELECT_BANK(3);
1853 revision_register = SMC_GET_REV();
1854 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1855 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1856 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1857 /* I don't recognize this chip, so... */
1858 printk("%s: IO 0x%lx: Unrecognized revision register 0x%04x"
1859 ", Contact author.\n", CARDNAME,
1860 ioaddr, revision_register);
1861
1862 retval = -ENODEV;
1863 goto err_out;
1864 }
1865
1866 /* At this point I'll assume that the chip is an SMC91x. */
1867 if (version_printed++ == 0)
1868 printk("%s", version);
1869
1870 /* fill in some of the fields */
1871 dev->base_addr = ioaddr;
1872 lp->version = revision_register & 0xff;
1873 spin_lock_init(&lp->lock);
1874
1875 /* Get the MAC address */
1876 SMC_SELECT_BANK(1);
1877 SMC_GET_MAC_ADDR(dev->dev_addr);
1878
1879 /* now, reset the chip, and put it into a known state */
1880 smc_reset(dev);
1881
1882 /*
1883 * If dev->irq is 0, then the device has to be banged on to see
1884 * what the IRQ is.
1885 *
1886 * This banging doesn't always detect the IRQ, for unknown reasons.
1887 * a workaround is to reset the chip and try again.
1888 *
1889 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1890 * be what is requested on the command line. I don't do that, mostly
1891 * because the card that I have uses a non-standard method of accessing
1892 * the IRQs, and because this _should_ work in most configurations.
1893 *
1894 * Specifying an IRQ is done with the assumption that the user knows
1895 * what (s)he is doing. No checking is done!!!!
1896 */
1897 if (dev->irq < 1) {
1898 int trials;
1899
1900 trials = 3;
1901 while (trials--) {
1902 dev->irq = smc_findirq(ioaddr);
1903 if (dev->irq)
1904 break;
1905 /* kick the card and try again */
1906 smc_reset(dev);
1907 }
1908 }
1909 if (dev->irq == 0) {
1910 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1911 dev->name);
1912 retval = -ENODEV;
1913 goto err_out;
1914 }
1915 dev->irq = irq_canonicalize(dev->irq);
1916
1917 /* Fill in the fields of the device structure with ethernet values. */
1918 ether_setup(dev);
1919
1920 dev->open = smc_open;
1921 dev->stop = smc_close;
1922 dev->hard_start_xmit = smc_hard_start_xmit;
1923 dev->tx_timeout = smc_timeout;
1924 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1925 dev->get_stats = smc_query_statistics;
1926 dev->set_multicast_list = smc_set_multicast_list;
1927 dev->ethtool_ops = &smc_ethtool_ops;
1928 #ifdef CONFIG_NET_POLL_CONTROLLER
1929 dev->poll_controller = smc_poll_controller;
1930 #endif
1931
1932 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1933 INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
1934 lp->mii.phy_id_mask = 0x1f;
1935 lp->mii.reg_num_mask = 0x1f;
1936 lp->mii.force_media = 0;
1937 lp->mii.full_duplex = 0;
1938 lp->mii.dev = dev;
1939 lp->mii.mdio_read = smc_phy_read;
1940 lp->mii.mdio_write = smc_phy_write;
1941
1942 /*
1943 * Locate the phy, if any.
1944 */
1945 if (lp->version >= (CHIP_91100 << 4))
1946 smc_phy_detect(dev);
1947
1948 /* Set default parameters */
1949 lp->msg_enable = NETIF_MSG_LINK;
1950 lp->ctl_rfduplx = 0;
1951 lp->ctl_rspeed = 10;
1952
1953 if (lp->version >= (CHIP_91100 << 4)) {
1954 lp->ctl_rfduplx = 1;
1955 lp->ctl_rspeed = 100;
1956 }
1957
1958 /* Grab the IRQ */
1959 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1960 if (retval)
1961 goto err_out;
1962
1963 set_irq_type(dev->irq, IRQT_RISING);
1964
1965 #ifdef SMC_USE_PXA_DMA
1966 {
1967 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1968 smc_pxa_dma_irq, NULL);
1969 if (dma >= 0)
1970 dev->dma = dma;
1971 }
1972 #endif
1973
1974 retval = register_netdev(dev);
1975 if (retval == 0) {
1976 /* now, print out the card info, in a short format.. */
1977 printk("%s: %s (rev %d) at %#lx IRQ %d",
1978 dev->name, version_string, revision_register & 0x0f,
1979 dev->base_addr, dev->irq);
1980
1981 if (dev->dma != (unsigned char)-1)
1982 printk(" DMA %d", dev->dma);
1983
1984 printk("%s%s\n", nowait ? " [nowait]" : "",
1985 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1986
1987 if (!is_valid_ether_addr(dev->dev_addr)) {
1988 printk("%s: Invalid ethernet MAC address. Please "
1989 "set using ifconfig\n", dev->name);
1990 } else {
1991 /* Print the Ethernet address */
1992 printk("%s: Ethernet addr: ", dev->name);
1993 for (i = 0; i < 5; i++)
1994 printk("%2.2x:", dev->dev_addr[i]);
1995 printk("%2.2x\n", dev->dev_addr[5]);
1996 }
1997
1998 if (lp->phy_type == 0) {
1999 PRINTK("%s: No PHY found\n", dev->name);
2000 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2001 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2002 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2003 PRINTK("%s: PHY LAN83C180\n", dev->name);
2004 }
2005 }
2006
2007 err_out:
2008 #ifdef SMC_USE_PXA_DMA
2009 if (retval && dev->dma != (unsigned char)-1)
2010 pxa_free_dma(dev->dma);
2011 #endif
2012 return retval;
2013 }
2014
2015 static int smc_enable_device(unsigned long attrib_phys)
2016 {
2017 unsigned long flags;
2018 unsigned char ecor, ecsr;
2019 void *addr;
2020
2021 /*
2022 * Map the attribute space. This is overkill, but clean.
2023 */
2024 addr = ioremap(attrib_phys, ATTRIB_SIZE);
2025 if (!addr)
2026 return -ENOMEM;
2027
2028 /*
2029 * Reset the device. We must disable IRQs around this
2030 * since a reset causes the IRQ line become active.
2031 */
2032 local_irq_save(flags);
2033 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2034 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2035 readb(addr + (ECOR << SMC_IO_SHIFT));
2036
2037 /*
2038 * Wait 100us for the chip to reset.
2039 */
2040 udelay(100);
2041
2042 /*
2043 * The device will ignore all writes to the enable bit while
2044 * reset is asserted, even if the reset bit is cleared in the
2045 * same write. Must clear reset first, then enable the device.
2046 */
2047 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2048 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2049
2050 /*
2051 * Set the appropriate byte/word mode.
2052 */
2053 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2054 #ifndef SMC_CAN_USE_16BIT
2055 ecsr |= ECSR_IOIS8;
2056 #endif
2057 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2058 local_irq_restore(flags);
2059
2060 iounmap(addr);
2061
2062 /*
2063 * Wait for the chip to wake up. We could poll the control
2064 * register in the main register space, but that isn't mapped
2065 * yet. We know this is going to take 750us.
2066 */
2067 msleep(1);
2068
2069 return 0;
2070 }
2071
2072 /*
2073 * smc_init(void)
2074 * Input parameters:
2075 * dev->base_addr == 0, try to find all possible locations
2076 * dev->base_addr > 0x1ff, this is the address to check
2077 * dev->base_addr == <anything else>, return failure code
2078 *
2079 * Output:
2080 * 0 --> there is a device
2081 * anything else, error
2082 */
2083 static int smc_drv_probe(struct device *dev)
2084 {
2085 struct platform_device *pdev = to_platform_device(dev);
2086 struct net_device *ndev;
2087 struct resource *res, *ext = NULL;
2088 unsigned int *addr;
2089 int ret;
2090
2091 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2092 if (!res) {
2093 ret = -ENODEV;
2094 goto out;
2095 }
2096
2097 /*
2098 * Request the regions.
2099 */
2100 if (!request_mem_region(res->start, SMC_IO_EXTENT, "smc91x")) {
2101 ret = -EBUSY;
2102 goto out;
2103 }
2104
2105 ndev = alloc_etherdev(sizeof(struct smc_local));
2106 if (!ndev) {
2107 printk("%s: could not allocate device.\n", CARDNAME);
2108 ret = -ENOMEM;
2109 goto release_1;
2110 }
2111 SET_MODULE_OWNER(ndev);
2112 SET_NETDEV_DEV(ndev, dev);
2113
2114 ndev->dma = (unsigned char)-1;
2115 ndev->irq = platform_get_irq(pdev, 0);
2116
2117 ext = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2118 if (ext) {
2119 if (!request_mem_region(ext->start, ATTRIB_SIZE, ndev->name)) {
2120 ret = -EBUSY;
2121 goto release_1;
2122 }
2123
2124 #if defined(CONFIG_SA1100_ASSABET)
2125 NCR_0 |= NCR_ENET_OSC_EN;
2126 #endif
2127
2128 ret = smc_enable_device(ext->start);
2129 if (ret)
2130 goto release_both;
2131 }
2132
2133 addr = ioremap(res->start, SMC_IO_EXTENT);
2134 if (!addr) {
2135 ret = -ENOMEM;
2136 goto release_both;
2137 }
2138
2139 dev_set_drvdata(dev, ndev);
2140 ret = smc_probe(ndev, (unsigned long)addr);
2141 if (ret != 0) {
2142 dev_set_drvdata(dev, NULL);
2143 iounmap(addr);
2144 release_both:
2145 if (ext)
2146 release_mem_region(ext->start, ATTRIB_SIZE);
2147 free_netdev(ndev);
2148 release_1:
2149 release_mem_region(res->start, SMC_IO_EXTENT);
2150 out:
2151 printk("%s: not found (%d).\n", CARDNAME, ret);
2152 }
2153 #ifdef SMC_USE_PXA_DMA
2154 else {
2155 struct smc_local *lp = netdev_priv(ndev);
2156 lp->physaddr = res->start;
2157 }
2158 #endif
2159
2160 return ret;
2161 }
2162
2163 static int smc_drv_remove(struct device *dev)
2164 {
2165 struct platform_device *pdev = to_platform_device(dev);
2166 struct net_device *ndev = dev_get_drvdata(dev);
2167 struct resource *res;
2168
2169 dev_set_drvdata(dev, NULL);
2170
2171 unregister_netdev(ndev);
2172
2173 free_irq(ndev->irq, ndev);
2174
2175 #ifdef SMC_USE_PXA_DMA
2176 if (ndev->dma != (unsigned char)-1)
2177 pxa_free_dma(ndev->dma);
2178 #endif
2179 iounmap((void *)ndev->base_addr);
2180 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2181 if (res)
2182 release_mem_region(res->start, ATTRIB_SIZE);
2183 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2184 release_mem_region(res->start, SMC_IO_EXTENT);
2185
2186 free_netdev(ndev);
2187
2188 return 0;
2189 }
2190
2191 static int smc_drv_suspend(struct device *dev, u32 state, u32 level)
2192 {
2193 struct net_device *ndev = dev_get_drvdata(dev);
2194
2195 if (ndev && level == SUSPEND_DISABLE) {
2196 if (netif_running(ndev)) {
2197 netif_device_detach(ndev);
2198 smc_shutdown(ndev);
2199 }
2200 }
2201 return 0;
2202 }
2203
2204 static int smc_drv_resume(struct device *dev, u32 level)
2205 {
2206 struct platform_device *pdev = to_platform_device(dev);
2207 struct net_device *ndev = dev_get_drvdata(dev);
2208
2209 if (ndev && level == RESUME_ENABLE) {
2210 struct smc_local *lp = netdev_priv(ndev);
2211
2212 if (pdev->num_resources == 3)
2213 smc_enable_device(pdev->resource[2].start);
2214 if (netif_running(ndev)) {
2215 smc_reset(ndev);
2216 smc_enable(ndev);
2217 if (lp->phy_type != 0)
2218 smc_phy_configure(ndev);
2219 netif_device_attach(ndev);
2220 }
2221 }
2222 return 0;
2223 }
2224
2225 static struct device_driver smc_driver = {
2226 .name = CARDNAME,
2227 .bus = &platform_bus_type,
2228 .probe = smc_drv_probe,
2229 .remove = smc_drv_remove,
2230 .suspend = smc_drv_suspend,
2231 .resume = smc_drv_resume,
2232 };
2233
2234 static int __init smc_init(void)
2235 {
2236 #ifdef MODULE
2237 #ifdef CONFIG_ISA
2238 if (io == -1)
2239 printk(KERN_WARNING
2240 "%s: You shouldn't use auto-probing with insmod!\n",
2241 CARDNAME);
2242 #endif
2243 #endif
2244
2245 return driver_register(&smc_driver);
2246 }
2247
2248 static void __exit smc_cleanup(void)
2249 {
2250 driver_unregister(&smc_driver);
2251 }
2252
2253 module_init(smc_init);
2254 module_exit(smc_cleanup);
2255
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