1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.06 Sep. 24 2002
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19 http://www.sis.com.tw/support/databook.htm
20
21 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
22 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
23 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
24 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
25 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
26 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
27 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
28 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
29 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
30 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
31 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
32 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
33 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
34 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
35 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
36 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
37 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
38 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
39 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
40 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
41 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
42 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
43 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
44 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
45 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
46 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
47 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
48 */
49
50 #include <linux/module.h>
51 #include <linux/moduleparam.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/timer.h>
55 #include <linux/errno.h>
56 #include <linux/ioport.h>
57 #include <linux/slab.h>
58 #include <linux/interrupt.h>
59 #include <linux/pci.h>
60 #include <linux/netdevice.h>
61 #include <linux/init.h>
62 #include <linux/mii.h>
63 #include <linux/etherdevice.h>
64 #include <linux/skbuff.h>
65 #include <linux/delay.h>
66 #include <linux/ethtool.h>
67 #include <linux/crc32.h>
68 #include <linux/bitops.h>
69
70 #include <asm/processor.h> /* Processor type for cache alignment. */
71 #include <asm/io.h>
72 #include <asm/uaccess.h> /* User space memory access functions */
73
74 #include "sis900.h"
75
76 #define SIS900_MODULE_NAME "sis900"
77 #define SIS900_DRV_VERSION "v1.08.07 11/02/2003"
78
79 static char version[] __devinitdata =
80 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
81
82 static int max_interrupt_work = 40;
83 static int multicast_filter_limit = 128;
84
85 #define sis900_debug debug
86 static int sis900_debug;
87
88 /* Time in jiffies before concluding the transmitter is hung. */
89 #define TX_TIMEOUT (4*HZ)
90 /* SiS 900 is capable of 32 bits BM DMA */
91 #define SIS900_DMA_MASK 0xffffffff
92
93 enum {
94 SIS_900 = 0,
95 SIS_7016
96 };
97 static char * card_names[] = {
98 "SiS 900 PCI Fast Ethernet",
99 "SiS 7016 PCI Fast Ethernet"
100 };
101 static struct pci_device_id sis900_pci_tbl [] = {
102 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
103 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
104 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
105 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
106 {0,}
107 };
108 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
109
110 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
111
112 static struct mii_chip_info {
113 const char * name;
114 u16 phy_id0;
115 u16 phy_id1;
116 u8 phy_types;
117 #define HOME 0x0001
118 #define LAN 0x0002
119 #define MIX 0x0003
120 #define UNKNOWN 0x0
121 } mii_chip_table[] = {
122 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
123 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
124 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
125 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
126 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
127 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
128 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
129 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
130 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
131 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
132 {NULL,},
133 };
134
135 struct mii_phy {
136 struct mii_phy * next;
137 int phy_addr;
138 u16 phy_id0;
139 u16 phy_id1;
140 u16 status;
141 u8 phy_types;
142 };
143
144 typedef struct _BufferDesc {
145 u32 link;
146 u32 cmdsts;
147 u32 bufptr;
148 } BufferDesc;
149
150 struct sis900_private {
151 struct net_device_stats stats;
152 struct pci_dev * pci_dev;
153
154 spinlock_t lock;
155
156 struct mii_phy * mii;
157 struct mii_phy * first_mii; /* record the first mii structure */
158 unsigned int cur_phy;
159
160 struct timer_list timer; /* Link status detection timer. */
161 u8 autong_complete; /* 1: auto-negotiate complete */
162
163 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
164 unsigned int cur_tx, dirty_tx;
165
166 /* The saved address of a sent/receive-in-place packet buffer */
167 struct sk_buff *tx_skbuff[NUM_TX_DESC];
168 struct sk_buff *rx_skbuff[NUM_RX_DESC];
169 BufferDesc *tx_ring;
170 BufferDesc *rx_ring;
171
172 dma_addr_t tx_ring_dma;
173 dma_addr_t rx_ring_dma;
174
175 unsigned int tx_full; /* The Tx queue is full. */
176 u8 host_bridge_rev;
177 };
178
179 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
180 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
181 MODULE_LICENSE("GPL");
182
183 module_param(multicast_filter_limit, int, 0444);
184 module_param(max_interrupt_work, int, 0444);
185 module_param(debug, int, 0444);
186 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
187 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
188 MODULE_PARM_DESC(debug, "SiS 900/7016 debug level (2-4)");
189
190 static int sis900_open(struct net_device *net_dev);
191 static int sis900_mii_probe (struct net_device * net_dev);
192 static void sis900_init_rxfilter (struct net_device * net_dev);
193 static u16 read_eeprom(long ioaddr, int location);
194 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
195 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
196 static void sis900_timer(unsigned long data);
197 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
198 static void sis900_tx_timeout(struct net_device *net_dev);
199 static void sis900_init_tx_ring(struct net_device *net_dev);
200 static void sis900_init_rx_ring(struct net_device *net_dev);
201 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
202 static int sis900_rx(struct net_device *net_dev);
203 static void sis900_finish_xmit (struct net_device *net_dev);
204 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
205 static int sis900_close(struct net_device *net_dev);
206 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
207 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
208 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
209 static void set_rx_mode(struct net_device *net_dev);
210 static void sis900_reset(struct net_device *net_dev);
211 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
212 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
213 static u16 sis900_default_phy(struct net_device * net_dev);
214 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
215 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
216 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
217 static void sis900_set_mode (long ioaddr, int speed, int duplex);
218 static struct ethtool_ops sis900_ethtool_ops;
219
220 /**
221 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
222 * @pci_dev: the sis900 pci device
223 * @net_dev: the net device to get address for
224 *
225 * Older SiS900 and friends, use EEPROM to store MAC address.
226 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
227 */
228
229 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
230 {
231 long ioaddr = pci_resource_start(pci_dev, 0);
232 u16 signature;
233 int i;
234
235 /* check to see if we have sane EEPROM */
236 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
237 if (signature == 0xffff || signature == 0x0000) {
238 printk (KERN_INFO "%s: Error EERPOM read %x\n",
239 pci_name(pci_dev), signature);
240 return 0;
241 }
242
243 /* get MAC address from EEPROM */
244 for (i = 0; i < 3; i++)
245 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
246
247 return 1;
248 }
249
250 /**
251 * sis630e_get_mac_addr - Get MAC address for SiS630E model
252 * @pci_dev: the sis900 pci device
253 * @net_dev: the net device to get address for
254 *
255 * SiS630E model, use APC CMOS RAM to store MAC address.
256 * APC CMOS RAM is accessed through ISA bridge.
257 * MAC address is read into @net_dev->dev_addr.
258 */
259
260 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
261 struct net_device *net_dev)
262 {
263 struct pci_dev *isa_bridge = NULL;
264 u8 reg;
265 int i;
266
267 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
268 if (!isa_bridge)
269 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
270 if (!isa_bridge) {
271 printk("%s: Can not find ISA bridge\n", pci_name(pci_dev));
272 return 0;
273 }
274 pci_read_config_byte(isa_bridge, 0x48, ®);
275 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
276
277 for (i = 0; i < 6; i++) {
278 outb(0x09 + i, 0x70);
279 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
280 }
281 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
282 pci_dev_put(isa_bridge);
283
284 return 1;
285 }
286
287
288 /**
289 * sis635_get_mac_addr - Get MAC address for SIS635 model
290 * @pci_dev: the sis900 pci device
291 * @net_dev: the net device to get address for
292 *
293 * SiS635 model, set MAC Reload Bit to load Mac address from APC
294 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
295 * @net_dev->dev_addr.
296 */
297
298 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
299 struct net_device *net_dev)
300 {
301 long ioaddr = net_dev->base_addr;
302 u32 rfcrSave;
303 u32 i;
304
305 rfcrSave = inl(rfcr + ioaddr);
306
307 outl(rfcrSave | RELOAD, ioaddr + cr);
308 outl(0, ioaddr + cr);
309
310 /* disable packet filtering before setting filter */
311 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
312
313 /* load MAC addr to filter data register */
314 for (i = 0 ; i < 3 ; i++) {
315 outl((i << RFADDR_shift), ioaddr + rfcr);
316 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
317 }
318
319 /* enable packet filtering */
320 outl(rfcrSave | RFEN, rfcr + ioaddr);
321
322 return 1;
323 }
324
325 /**
326 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
327 * @pci_dev: the sis900 pci device
328 * @net_dev: the net device to get address for
329 *
330 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
331 * is shared by
332 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
333 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
334 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
335 * EEDONE signal to refuse EEPROM access by LAN.
336 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
337 * The signature field in SiS962 or SiS963 spec is meaningless.
338 * MAC address is read into @net_dev->dev_addr.
339 */
340
341 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
342 struct net_device *net_dev)
343 {
344 long ioaddr = net_dev->base_addr;
345 long ee_addr = ioaddr + mear;
346 u32 waittime = 0;
347 int i;
348
349 outl(EEREQ, ee_addr);
350 while(waittime < 2000) {
351 if(inl(ee_addr) & EEGNT) {
352
353 /* get MAC address from EEPROM */
354 for (i = 0; i < 3; i++)
355 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
356
357 outl(EEDONE, ee_addr);
358 return 1;
359 } else {
360 udelay(1);
361 waittime ++;
362 }
363 }
364 outl(EEDONE, ee_addr);
365 return 0;
366 }
367
368 /**
369 * sis900_probe - Probe for sis900 device
370 * @pci_dev: the sis900 pci device
371 * @pci_id: the pci device ID
372 *
373 * Check and probe sis900 net device for @pci_dev.
374 * Get mac address according to the chip revision,
375 * and assign SiS900-specific entries in the device structure.
376 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
377 */
378
379 static int __devinit sis900_probe(struct pci_dev *pci_dev,
380 const struct pci_device_id *pci_id)
381 {
382 struct sis900_private *sis_priv;
383 struct net_device *net_dev;
384 struct pci_dev *dev;
385 dma_addr_t ring_dma;
386 void *ring_space;
387 long ioaddr;
388 int i, ret;
389 u8 revision;
390 char *card_name = card_names[pci_id->driver_data];
391
392 /* when built into the kernel, we only print version if device is found */
393 #ifndef MODULE
394 static int printed_version;
395 if (!printed_version++)
396 printk(version);
397 #endif
398
399 /* setup various bits in PCI command register */
400 ret = pci_enable_device(pci_dev);
401 if(ret) return ret;
402
403 i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK);
404 if(i){
405 printk(KERN_ERR "sis900.c: architecture does not support"
406 "32bit PCI busmaster DMA\n");
407 return i;
408 }
409
410 pci_set_master(pci_dev);
411
412 net_dev = alloc_etherdev(sizeof(struct sis900_private));
413 if (!net_dev)
414 return -ENOMEM;
415 SET_MODULE_OWNER(net_dev);
416 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
417
418 /* We do a request_region() to register /proc/ioports info. */
419 ioaddr = pci_resource_start(pci_dev, 0);
420 ret = pci_request_regions(pci_dev, "sis900");
421 if (ret)
422 goto err_out;
423
424 sis_priv = net_dev->priv;
425 net_dev->base_addr = ioaddr;
426 net_dev->irq = pci_dev->irq;
427 sis_priv->pci_dev = pci_dev;
428 spin_lock_init(&sis_priv->lock);
429
430 pci_set_drvdata(pci_dev, net_dev);
431
432 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
433 if (!ring_space) {
434 ret = -ENOMEM;
435 goto err_out_cleardev;
436 }
437 sis_priv->tx_ring = (BufferDesc *)ring_space;
438 sis_priv->tx_ring_dma = ring_dma;
439
440 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
441 if (!ring_space) {
442 ret = -ENOMEM;
443 goto err_unmap_tx;
444 }
445 sis_priv->rx_ring = (BufferDesc *)ring_space;
446 sis_priv->rx_ring_dma = ring_dma;
447
448 /* The SiS900-specific entries in the device structure. */
449 net_dev->open = &sis900_open;
450 net_dev->hard_start_xmit = &sis900_start_xmit;
451 net_dev->stop = &sis900_close;
452 net_dev->get_stats = &sis900_get_stats;
453 net_dev->set_config = &sis900_set_config;
454 net_dev->set_multicast_list = &set_rx_mode;
455 net_dev->do_ioctl = &mii_ioctl;
456 net_dev->tx_timeout = sis900_tx_timeout;
457 net_dev->watchdog_timeo = TX_TIMEOUT;
458 net_dev->ethtool_ops = &sis900_ethtool_ops;
459
460 /* Get Mac address according to the chip revision */
461 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
462 ret = 0;
463
464 if (revision == SIS630E_900_REV)
465 ret = sis630e_get_mac_addr(pci_dev, net_dev);
466 else if ((revision > 0x81) && (revision <= 0x90) )
467 ret = sis635_get_mac_addr(pci_dev, net_dev);
468 else if (revision == SIS96x_900_REV)
469 ret = sis96x_get_mac_addr(pci_dev, net_dev);
470 else
471 ret = sis900_get_mac_addr(pci_dev, net_dev);
472
473 if (ret == 0) {
474 ret = -ENODEV;
475 goto err_unmap_rx;
476 }
477
478 /* 630ET : set the mii access mode as software-mode */
479 if (revision == SIS630ET_900_REV)
480 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
481
482 /* probe for mii transceiver */
483 if (sis900_mii_probe(net_dev) == 0) {
484 ret = -ENODEV;
485 goto err_unmap_rx;
486 }
487
488 /* save our host bridge revision */
489 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
490 if (dev) {
491 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
492 pci_dev_put(dev);
493 }
494
495 ret = register_netdev(net_dev);
496 if (ret)
497 goto err_unmap_rx;
498
499 /* print some information about our NIC */
500 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
501 card_name, ioaddr, net_dev->irq);
502 for (i = 0; i < 5; i++)
503 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
504 printk("%2.2x.\n", net_dev->dev_addr[i]);
505
506 return 0;
507
508 err_unmap_rx:
509 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
510 sis_priv->rx_ring_dma);
511 err_unmap_tx:
512 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
513 sis_priv->tx_ring_dma);
514 err_out_cleardev:
515 pci_set_drvdata(pci_dev, NULL);
516 pci_release_regions(pci_dev);
517 err_out:
518 free_netdev(net_dev);
519 return ret;
520 }
521
522 /**
523 * sis900_mii_probe - Probe MII PHY for sis900
524 * @net_dev: the net device to probe for
525 *
526 * Search for total of 32 possible mii phy addresses.
527 * Identify and set current phy if found one,
528 * return error if it failed to found.
529 */
530
531 static int __init sis900_mii_probe(struct net_device * net_dev)
532 {
533 struct sis900_private * sis_priv = net_dev->priv;
534 const char *dev_name = pci_name(sis_priv->pci_dev);
535 u16 poll_bit = MII_STAT_LINK, status = 0;
536 unsigned long timeout = jiffies + 5 * HZ;
537 int phy_addr;
538 u8 revision;
539
540 sis_priv->mii = NULL;
541
542 /* search for total of 32 possible mii phy addresses */
543 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
544 struct mii_phy * mii_phy = NULL;
545 u16 mii_status;
546 int i;
547
548 mii_phy = NULL;
549 for(i = 0; i < 2; i++)
550 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
551
552 if (mii_status == 0xffff || mii_status == 0x0000)
553 /* the mii is not accessible, try next one */
554 continue;
555
556 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
557 printk(KERN_INFO "Cannot allocate mem for struct mii_phy\n");
558 mii_phy = sis_priv->first_mii;
559 while (mii_phy) {
560 struct mii_phy *phy;
561 phy = mii_phy;
562 mii_phy = mii_phy->next;
563 kfree(phy);
564 }
565 return 0;
566 }
567
568 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
569 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
570 mii_phy->phy_addr = phy_addr;
571 mii_phy->status = mii_status;
572 mii_phy->next = sis_priv->mii;
573 sis_priv->mii = mii_phy;
574 sis_priv->first_mii = mii_phy;
575
576 for (i = 0; mii_chip_table[i].phy_id1; i++)
577 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
578 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
579 mii_phy->phy_types = mii_chip_table[i].phy_types;
580 if (mii_chip_table[i].phy_types == MIX)
581 mii_phy->phy_types =
582 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
583 printk(KERN_INFO "%s: %s transceiver found at address %d.\n",
584 dev_name, mii_chip_table[i].name,
585 phy_addr);
586 break;
587 }
588
589 if( !mii_chip_table[i].phy_id1 ) {
590 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
591 dev_name, phy_addr);
592 mii_phy->phy_types = UNKNOWN;
593 }
594 }
595
596 if (sis_priv->mii == NULL) {
597 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
598 return 0;
599 }
600
601 /* select default PHY for mac */
602 sis_priv->mii = NULL;
603 sis900_default_phy( net_dev );
604
605 /* Reset phy if default phy is internal sis900 */
606 if ((sis_priv->mii->phy_id0 == 0x001D) &&
607 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
608 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
609
610 /* workaround for ICS1893 PHY */
611 if ((sis_priv->mii->phy_id0 == 0x0015) &&
612 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
613 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
614
615 if(status & MII_STAT_LINK){
616 while (poll_bit) {
617 yield();
618
619 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
620 if (time_after_eq(jiffies, timeout)) {
621 printk(KERN_WARNING "%s: reset phy and link down now\n",
622 dev_name);
623 return -ETIME;
624 }
625 }
626 }
627
628 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
629 if (revision == SIS630E_900_REV) {
630 /* SiS 630E has some bugs on default value of PHY registers */
631 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
632 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
633 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
634 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
635 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
636 }
637
638 if (sis_priv->mii->status & MII_STAT_LINK)
639 netif_carrier_on(net_dev);
640 else
641 netif_carrier_off(net_dev);
642
643 return 1;
644 }
645
646 /**
647 * sis900_default_phy - Select default PHY for sis900 mac.
648 * @net_dev: the net device to probe for
649 *
650 * Select first detected PHY with link as default.
651 * If no one is link on, select PHY whose types is HOME as default.
652 * If HOME doesn't exist, select LAN.
653 */
654
655 static u16 sis900_default_phy(struct net_device * net_dev)
656 {
657 struct sis900_private * sis_priv = net_dev->priv;
658 struct mii_phy *phy = NULL, *phy_home = NULL,
659 *default_phy = NULL, *phy_lan = NULL;
660 u16 status;
661
662 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
663 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
664 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
665
666 /* Link ON & Not select default PHY & not ghost PHY */
667 if ((status & MII_STAT_LINK) && !default_phy &&
668 (phy->phy_types != UNKNOWN))
669 default_phy = phy;
670 else {
671 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
672 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
673 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
674 if (phy->phy_types == HOME)
675 phy_home = phy;
676 else if(phy->phy_types == LAN)
677 phy_lan = phy;
678 }
679 }
680
681 if (!default_phy && phy_home)
682 default_phy = phy_home;
683 else if (!default_phy && phy_lan)
684 default_phy = phy_lan;
685 else if (!default_phy)
686 default_phy = sis_priv->first_mii;
687
688 if (sis_priv->mii != default_phy) {
689 sis_priv->mii = default_phy;
690 sis_priv->cur_phy = default_phy->phy_addr;
691 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
692 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
693 }
694
695 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
696 status &= (~MII_CNTL_ISOLATE);
697
698 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
699 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
700 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
701
702 return status;
703 }
704
705
706 /**
707 * sis900_set_capability - set the media capability of network adapter.
708 * @net_dev : the net device to probe for
709 * @phy : default PHY
710 *
711 * Set the media capability of network adapter according to
712 * mii status register. It's necessary before auto-negotiate.
713 */
714
715 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
716 {
717 u16 cap;
718 u16 status;
719
720 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
721 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
722
723 cap = MII_NWAY_CSMA_CD |
724 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
725 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
726 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
727 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
728
729 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
730 }
731
732
733 /* Delay between EEPROM clock transitions. */
734 #define eeprom_delay() inl(ee_addr)
735
736 /**
737 * read_eeprom - Read Serial EEPROM
738 * @ioaddr: base i/o address
739 * @location: the EEPROM location to read
740 *
741 * Read Serial EEPROM through EEPROM Access Register.
742 * Note that location is in word (16 bits) unit
743 */
744
745 static u16 __devinit read_eeprom(long ioaddr, int location)
746 {
747 int i;
748 u16 retval = 0;
749 long ee_addr = ioaddr + mear;
750 u32 read_cmd = location | EEread;
751
752 outl(0, ee_addr);
753 eeprom_delay();
754 outl(EECS, ee_addr);
755 eeprom_delay();
756
757 /* Shift the read command (9) bits out. */
758 for (i = 8; i >= 0; i--) {
759 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
760 outl(dataval, ee_addr);
761 eeprom_delay();
762 outl(dataval | EECLK, ee_addr);
763 eeprom_delay();
764 }
765 outl(EECS, ee_addr);
766 eeprom_delay();
767
768 /* read the 16-bits data in */
769 for (i = 16; i > 0; i--) {
770 outl(EECS, ee_addr);
771 eeprom_delay();
772 outl(EECS | EECLK, ee_addr);
773 eeprom_delay();
774 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
775 eeprom_delay();
776 }
777
778 /* Terminate the EEPROM access. */
779 outl(0, ee_addr);
780 eeprom_delay();
781
782 return (retval);
783 }
784
785 /* Read and write the MII management registers using software-generated
786 serial MDIO protocol. Note that the command bits and data bits are
787 send out separately */
788 #define mdio_delay() inl(mdio_addr)
789
790 static void mdio_idle(long mdio_addr)
791 {
792 outl(MDIO | MDDIR, mdio_addr);
793 mdio_delay();
794 outl(MDIO | MDDIR | MDC, mdio_addr);
795 }
796
797 /* Syncronize the MII management interface by shifting 32 one bits out. */
798 static void mdio_reset(long mdio_addr)
799 {
800 int i;
801
802 for (i = 31; i >= 0; i--) {
803 outl(MDDIR | MDIO, mdio_addr);
804 mdio_delay();
805 outl(MDDIR | MDIO | MDC, mdio_addr);
806 mdio_delay();
807 }
808 return;
809 }
810
811 /**
812 * mdio_read - read MII PHY register
813 * @net_dev: the net device to read
814 * @phy_id: the phy address to read
815 * @location: the phy regiester id to read
816 *
817 * Read MII registers through MDIO and MDC
818 * using MDIO management frame structure and protocol(defined by ISO/IEC).
819 * Please see SiS7014 or ICS spec
820 */
821
822 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
823 {
824 long mdio_addr = net_dev->base_addr + mear;
825 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
826 u16 retval = 0;
827 int i;
828
829 mdio_reset(mdio_addr);
830 mdio_idle(mdio_addr);
831
832 for (i = 15; i >= 0; i--) {
833 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
834 outl(dataval, mdio_addr);
835 mdio_delay();
836 outl(dataval | MDC, mdio_addr);
837 mdio_delay();
838 }
839
840 /* Read the 16 data bits. */
841 for (i = 16; i > 0; i--) {
842 outl(0, mdio_addr);
843 mdio_delay();
844 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
845 outl(MDC, mdio_addr);
846 mdio_delay();
847 }
848 outl(0x00, mdio_addr);
849
850 return retval;
851 }
852
853 /**
854 * mdio_write - write MII PHY register
855 * @net_dev: the net device to write
856 * @phy_id: the phy address to write
857 * @location: the phy regiester id to write
858 * @value: the register value to write with
859 *
860 * Write MII registers with @value through MDIO and MDC
861 * using MDIO management frame structure and protocol(defined by ISO/IEC)
862 * please see SiS7014 or ICS spec
863 */
864
865 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
866 int value)
867 {
868 long mdio_addr = net_dev->base_addr + mear;
869 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
870 int i;
871
872 mdio_reset(mdio_addr);
873 mdio_idle(mdio_addr);
874
875 /* Shift the command bits out. */
876 for (i = 15; i >= 0; i--) {
877 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
878 outb(dataval, mdio_addr);
879 mdio_delay();
880 outb(dataval | MDC, mdio_addr);
881 mdio_delay();
882 }
883 mdio_delay();
884
885 /* Shift the value bits out. */
886 for (i = 15; i >= 0; i--) {
887 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
888 outl(dataval, mdio_addr);
889 mdio_delay();
890 outl(dataval | MDC, mdio_addr);
891 mdio_delay();
892 }
893 mdio_delay();
894
895 /* Clear out extra bits. */
896 for (i = 2; i > 0; i--) {
897 outb(0, mdio_addr);
898 mdio_delay();
899 outb(MDC, mdio_addr);
900 mdio_delay();
901 }
902 outl(0x00, mdio_addr);
903
904 return;
905 }
906
907
908 /**
909 * sis900_reset_phy - reset sis900 mii phy.
910 * @net_dev: the net device to write
911 * @phy_addr: default phy address
912 *
913 * Some specific phy can't work properly without reset.
914 * This function will be called during initialization and
915 * link status change from ON to DOWN.
916 */
917
918 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
919 {
920 int i = 0;
921 u16 status;
922
923 while (i++ < 2)
924 status = mdio_read(net_dev, phy_addr, MII_STATUS);
925
926 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
927
928 return status;
929 }
930
931 /**
932 * sis900_open - open sis900 device
933 * @net_dev: the net device to open
934 *
935 * Do some initialization and start net interface.
936 * enable interrupts and set sis900 timer.
937 */
938
939 static int
940 sis900_open(struct net_device *net_dev)
941 {
942 struct sis900_private *sis_priv = net_dev->priv;
943 long ioaddr = net_dev->base_addr;
944 u8 revision;
945 int ret;
946
947 /* Soft reset the chip. */
948 sis900_reset(net_dev);
949
950 /* Equalizer workaround Rule */
951 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
952 sis630_set_eq(net_dev, revision);
953
954 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
955 net_dev->name, net_dev);
956 if (ret)
957 return ret;
958
959 sis900_init_rxfilter(net_dev);
960
961 sis900_init_tx_ring(net_dev);
962 sis900_init_rx_ring(net_dev);
963
964 set_rx_mode(net_dev);
965
966 netif_start_queue(net_dev);
967
968 /* Workaround for EDB */
969 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
970
971 /* Enable all known interrupts by setting the interrupt mask. */
972 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
973 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
974 outl(IE, ioaddr + ier);
975
976 sis900_check_mode(net_dev, sis_priv->mii);
977
978 /* Set the timer to switch to check for link beat and perhaps switch
979 to an alternate media type. */
980 init_timer(&sis_priv->timer);
981 sis_priv->timer.expires = jiffies + HZ;
982 sis_priv->timer.data = (unsigned long)net_dev;
983 sis_priv->timer.function = &sis900_timer;
984 add_timer(&sis_priv->timer);
985
986 return 0;
987 }
988
989 /**
990 * sis900_init_rxfilter - Initialize the Rx filter
991 * @net_dev: the net device to initialize for
992 *
993 * Set receive filter address to our MAC address
994 * and enable packet filtering.
995 */
996
997 static void
998 sis900_init_rxfilter (struct net_device * net_dev)
999 {
1000 long ioaddr = net_dev->base_addr;
1001 u32 rfcrSave;
1002 u32 i;
1003
1004 rfcrSave = inl(rfcr + ioaddr);
1005
1006 /* disable packet filtering before setting filter */
1007 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1008
1009 /* load MAC addr to filter data register */
1010 for (i = 0 ; i < 3 ; i++) {
1011 u32 w;
1012
1013 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1014 outl((i << RFADDR_shift), ioaddr + rfcr);
1015 outl(w, ioaddr + rfdr);
1016
1017 if (sis900_debug > 2) {
1018 printk(KERN_INFO "%s: Receive Filter Addrss[%d]=%x\n",
1019 net_dev->name, i, inl(ioaddr + rfdr));
1020 }
1021 }
1022
1023 /* enable packet filtering */
1024 outl(rfcrSave | RFEN, rfcr + ioaddr);
1025 }
1026
1027 /**
1028 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1029 * @net_dev: the net device to initialize for
1030 *
1031 * Initialize the Tx descriptor ring,
1032 */
1033
1034 static void
1035 sis900_init_tx_ring(struct net_device *net_dev)
1036 {
1037 struct sis900_private *sis_priv = net_dev->priv;
1038 long ioaddr = net_dev->base_addr;
1039 int i;
1040
1041 sis_priv->tx_full = 0;
1042 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1043
1044 for (i = 0; i < NUM_TX_DESC; i++) {
1045 sis_priv->tx_skbuff[i] = NULL;
1046
1047 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1048 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1049 sis_priv->tx_ring[i].cmdsts = 0;
1050 sis_priv->tx_ring[i].bufptr = 0;
1051 }
1052
1053 /* load Transmit Descriptor Register */
1054 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1055 if (sis900_debug > 2)
1056 printk(KERN_INFO "%s: TX descriptor register loaded with: %8.8x\n",
1057 net_dev->name, inl(ioaddr + txdp));
1058 }
1059
1060 /**
1061 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1062 * @net_dev: the net device to initialize for
1063 *
1064 * Initialize the Rx descriptor ring,
1065 * and pre-allocate recevie buffers (socket buffer)
1066 */
1067
1068 static void
1069 sis900_init_rx_ring(struct net_device *net_dev)
1070 {
1071 struct sis900_private *sis_priv = net_dev->priv;
1072 long ioaddr = net_dev->base_addr;
1073 int i;
1074
1075 sis_priv->cur_rx = 0;
1076 sis_priv->dirty_rx = 0;
1077
1078 /* init RX descriptor */
1079 for (i = 0; i < NUM_RX_DESC; i++) {
1080 sis_priv->rx_skbuff[i] = NULL;
1081
1082 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1083 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1084 sis_priv->rx_ring[i].cmdsts = 0;
1085 sis_priv->rx_ring[i].bufptr = 0;
1086 }
1087
1088 /* allocate sock buffers */
1089 for (i = 0; i < NUM_RX_DESC; i++) {
1090 struct sk_buff *skb;
1091
1092 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1093 /* not enough memory for skbuff, this makes a "hole"
1094 on the buffer ring, it is not clear how the
1095 hardware will react to this kind of degenerated
1096 buffer */
1097 break;
1098 }
1099 skb->dev = net_dev;
1100 sis_priv->rx_skbuff[i] = skb;
1101 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1102 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1103 skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1104 }
1105 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1106
1107 /* load Receive Descriptor Register */
1108 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1109 if (sis900_debug > 2)
1110 printk(KERN_INFO "%s: RX descriptor register loaded with: %8.8x\n",
1111 net_dev->name, inl(ioaddr + rxdp));
1112 }
1113
1114 /**
1115 * sis630_set_eq - set phy equalizer value for 630 LAN
1116 * @net_dev: the net device to set equalizer value
1117 * @revision: 630 LAN revision number
1118 *
1119 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1120 * PHY register 14h(Test)
1121 * Bit 14: 0 -- Automatically dectect (default)
1122 * 1 -- Manually set Equalizer filter
1123 * Bit 13: 0 -- (Default)
1124 * 1 -- Speed up convergence of equalizer setting
1125 * Bit 9 : 0 -- (Default)
1126 * 1 -- Disable Baseline Wander
1127 * Bit 3~7 -- Equalizer filter setting
1128 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1129 * Then calculate equalizer value
1130 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1131 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1132 * Calculate Equalizer value:
1133 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1134 * When the equalizer is stable, this value is not a fixed value. It will be within
1135 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1136 * 0 <= max <= 4 --> set equalizer to max
1137 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1138 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1139 */
1140
1141 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1142 {
1143 struct sis900_private *sis_priv = net_dev->priv;
1144 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1145 int i, maxcount=10;
1146
1147 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1148 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1149 return;
1150
1151 if (netif_carrier_ok(net_dev)) {
1152 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1153 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1154 (0x2200 | reg14h) & 0xBFFF);
1155 for (i=0; i < maxcount; i++) {
1156 eq_value = (0x00F8 & mdio_read(net_dev,
1157 sis_priv->cur_phy, MII_RESV)) >> 3;
1158 if (i == 0)
1159 max_value=min_value=eq_value;
1160 max_value = (eq_value > max_value) ?
1161 eq_value : max_value;
1162 min_value = (eq_value < min_value) ?
1163 eq_value : min_value;
1164 }
1165 /* 630E rule to determine the equalizer value */
1166 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1167 revision == SIS630ET_900_REV) {
1168 if (max_value < 5)
1169 eq_value = max_value;
1170 else if (max_value >= 5 && max_value < 15)
1171 eq_value = (max_value == min_value) ?
1172 max_value+2 : max_value+1;
1173 else if (max_value >= 15)
1174 eq_value=(max_value == min_value) ?
1175 max_value+6 : max_value+5;
1176 }
1177 /* 630B0&B1 rule to determine the equalizer value */
1178 if (revision == SIS630A_900_REV &&
1179 (sis_priv->host_bridge_rev == SIS630B0 ||
1180 sis_priv->host_bridge_rev == SIS630B1)) {
1181 if (max_value == 0)
1182 eq_value = 3;
1183 else
1184 eq_value = (max_value + min_value + 1)/2;
1185 }
1186 /* write equalizer value and setting */
1187 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1188 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1189 reg14h = (reg14h | 0x6000) & 0xFDFF;
1190 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1191 } else {
1192 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1193 if (revision == SIS630A_900_REV &&
1194 (sis_priv->host_bridge_rev == SIS630B0 ||
1195 sis_priv->host_bridge_rev == SIS630B1))
1196 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1197 (reg14h | 0x2200) & 0xBFFF);
1198 else
1199 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1200 (reg14h | 0x2000) & 0xBFFF);
1201 }
1202 return;
1203 }
1204
1205 /**
1206 * sis900_timer - sis900 timer routine
1207 * @data: pointer to sis900 net device
1208 *
1209 * On each timer ticks we check two things,
1210 * link status (ON/OFF) and link mode (10/100/Full/Half)
1211 */
1212
1213 static void sis900_timer(unsigned long data)
1214 {
1215 struct net_device *net_dev = (struct net_device *)data;
1216 struct sis900_private *sis_priv = net_dev->priv;
1217 struct mii_phy *mii_phy = sis_priv->mii;
1218 static int next_tick = 5*HZ;
1219 u16 status;
1220 u8 revision;
1221
1222 if (!sis_priv->autong_complete){
1223 int speed, duplex = 0;
1224
1225 sis900_read_mode(net_dev, &speed, &duplex);
1226 if (duplex){
1227 sis900_set_mode(net_dev->base_addr, speed, duplex);
1228 pci_read_config_byte(sis_priv->pci_dev,
1229 PCI_CLASS_REVISION, &revision);
1230 sis630_set_eq(net_dev, revision);
1231 netif_start_queue(net_dev);
1232 }
1233
1234 sis_priv->timer.expires = jiffies + HZ;
1235 add_timer(&sis_priv->timer);
1236 return;
1237 }
1238
1239 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1240 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1241
1242 /* Link OFF -> ON */
1243 if (!netif_carrier_ok(net_dev)) {
1244 LookForLink:
1245 /* Search for new PHY */
1246 status = sis900_default_phy(net_dev);
1247 mii_phy = sis_priv->mii;
1248
1249 if (status & MII_STAT_LINK){
1250 sis900_check_mode(net_dev, mii_phy);
1251 netif_carrier_on(net_dev);
1252 }
1253 } else {
1254 /* Link ON -> OFF */
1255 if (!(status & MII_STAT_LINK)){
1256 netif_carrier_off(net_dev);
1257 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1258
1259 /* Change mode issue */
1260 if ((mii_phy->phy_id0 == 0x001D) &&
1261 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1262 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1263
1264 pci_read_config_byte(sis_priv->pci_dev,
1265 PCI_CLASS_REVISION, &revision);
1266 sis630_set_eq(net_dev, revision);
1267
1268 goto LookForLink;
1269 }
1270 }
1271
1272 sis_priv->timer.expires = jiffies + next_tick;
1273 add_timer(&sis_priv->timer);
1274 }
1275
1276 /**
1277 * sis900_check_mode - check the media mode for sis900
1278 * @net_dev: the net device to be checked
1279 * @mii_phy: the mii phy
1280 *
1281 * Older driver gets the media mode from mii status output
1282 * register. Now we set our media capability and auto-negotiate
1283 * to get the upper bound of speed and duplex between two ends.
1284 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1285 * and autong_complete should be set to 1.
1286 */
1287
1288 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1289 {
1290 struct sis900_private *sis_priv = net_dev->priv;
1291 long ioaddr = net_dev->base_addr;
1292 int speed, duplex;
1293
1294 if (mii_phy->phy_types == LAN) {
1295 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1296 sis900_set_capability(net_dev , mii_phy);
1297 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1298 } else {
1299 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1300 speed = HW_SPEED_HOME;
1301 duplex = FDX_CAPABLE_HALF_SELECTED;
1302 sis900_set_mode(ioaddr, speed, duplex);
1303 sis_priv->autong_complete = 1;
1304 }
1305 }
1306
1307 /**
1308 * sis900_set_mode - Set the media mode of mac register.
1309 * @ioaddr: the address of the device
1310 * @speed : the transmit speed to be determined
1311 * @duplex: the duplex mode to be determined
1312 *
1313 * Set the media mode of mac register txcfg/rxcfg according to
1314 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1315 * bus is used instead of PCI bus. When this bit is set 1, the
1316 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1317 * double words.
1318 */
1319
1320 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1321 {
1322 u32 tx_flags = 0, rx_flags = 0;
1323
1324 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1325 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1326 (TX_FILL_THRESH << TxFILLT_shift);
1327 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1328 } else {
1329 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1330 (TX_FILL_THRESH << TxFILLT_shift);
1331 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1332 }
1333
1334 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1335 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1336 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1337 } else {
1338 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1339 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1340 }
1341
1342 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1343 tx_flags |= (TxCSI | TxHBI);
1344 rx_flags |= RxATX;
1345 }
1346
1347 outl (tx_flags, ioaddr + txcfg);
1348 outl (rx_flags, ioaddr + rxcfg);
1349 }
1350
1351 /**
1352 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1353 * @net_dev: the net device to read mode for
1354 * @phy_addr: mii phy address
1355 *
1356 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1357 * autong_complete should be set to 0 when starting auto-negotiation.
1358 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1359 * sis900_timer will wait for link on again if autong_complete = 0.
1360 */
1361
1362 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1363 {
1364 struct sis900_private *sis_priv = net_dev->priv;
1365 int i = 0;
1366 u32 status;
1367
1368 while (i++ < 2)
1369 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1370
1371 if (!(status & MII_STAT_LINK)){
1372 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1373 sis_priv->autong_complete = 1;
1374 netif_carrier_off(net_dev);
1375 return;
1376 }
1377
1378 /* (Re)start AutoNegotiate */
1379 mdio_write(net_dev, phy_addr, MII_CONTROL,
1380 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1381 sis_priv->autong_complete = 0;
1382 }
1383
1384
1385 /**
1386 * sis900_read_mode - read media mode for sis900 internal phy
1387 * @net_dev: the net device to read mode for
1388 * @speed : the transmit speed to be determined
1389 * @duplex : the duplex mode to be determined
1390 *
1391 * The capability of remote end will be put in mii register autorec
1392 * after auto-negotiation. Use AND operation to get the upper bound
1393 * of speed and duplex between two ends.
1394 */
1395
1396 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1397 {
1398 struct sis900_private *sis_priv = net_dev->priv;
1399 struct mii_phy *phy = sis_priv->mii;
1400 int phy_addr = sis_priv->cur_phy;
1401 u32 status;
1402 u16 autoadv, autorec;
1403 int i = 0;
1404
1405 while (i++ < 2)
1406 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1407
1408 if (!(status & MII_STAT_LINK))
1409 return;
1410
1411 /* AutoNegotiate completed */
1412 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1413 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1414 status = autoadv & autorec;
1415
1416 *speed = HW_SPEED_10_MBPS;
1417 *duplex = FDX_CAPABLE_HALF_SELECTED;
1418
1419 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1420 *speed = HW_SPEED_100_MBPS;
1421 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1422 *duplex = FDX_CAPABLE_FULL_SELECTED;
1423
1424 sis_priv->autong_complete = 1;
1425
1426 /* Workaround for Realtek RTL8201 PHY issue */
1427 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1428 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1429 *duplex = FDX_CAPABLE_FULL_SELECTED;
1430 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1431 *speed = HW_SPEED_100_MBPS;
1432 }
1433
1434 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1435 net_dev->name,
1436 *speed == HW_SPEED_100_MBPS ?
1437 "100mbps" : "10mbps",
1438 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1439 "full" : "half");
1440 }
1441
1442 /**
1443 * sis900_tx_timeout - sis900 transmit timeout routine
1444 * @net_dev: the net device to transmit
1445 *
1446 * print transmit timeout status
1447 * disable interrupts and do some tasks
1448 */
1449
1450 static void sis900_tx_timeout(struct net_device *net_dev)
1451 {
1452 struct sis900_private *sis_priv = net_dev->priv;
1453 long ioaddr = net_dev->base_addr;
1454 unsigned long flags;
1455 int i;
1456
1457 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1458 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1459
1460 /* Disable interrupts by clearing the interrupt mask. */
1461 outl(0x0000, ioaddr + imr);
1462
1463 /* use spinlock to prevent interrupt handler accessing buffer ring */
1464 spin_lock_irqsave(&sis_priv->lock, flags);
1465
1466 /* discard unsent packets */
1467 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1468 for (i = 0; i < NUM_TX_DESC; i++) {
1469 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1470
1471 if (skb) {
1472 pci_unmap_single(sis_priv->pci_dev,
1473 sis_priv->tx_ring[i].bufptr, skb->len,
1474 PCI_DMA_TODEVICE);
1475 dev_kfree_skb_irq(skb);
1476 sis_priv->tx_skbuff[i] = NULL;
1477 sis_priv->tx_ring[i].cmdsts = 0;
1478 sis_priv->tx_ring[i].bufptr = 0;
1479 sis_priv->stats.tx_dropped++;
1480 }
1481 }
1482 sis_priv->tx_full = 0;
1483 netif_wake_queue(net_dev);
1484
1485 spin_unlock_irqrestore(&sis_priv->lock, flags);
1486
1487 net_dev->trans_start = jiffies;
1488
1489 /* load Transmit Descriptor Register */
1490 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1491
1492 /* Enable all known interrupts by setting the interrupt mask. */
1493 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1494 return;
1495 }
1496
1497 /**
1498 * sis900_start_xmit - sis900 start transmit routine
1499 * @skb: socket buffer pointer to put the data being transmitted
1500 * @net_dev: the net device to transmit with
1501 *
1502 * Set the transmit buffer descriptor,
1503 * and write TxENA to enable transmit state machine.
1504 * tell upper layer if the buffer is full
1505 */
1506
1507 static int
1508 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1509 {
1510 struct sis900_private *sis_priv = net_dev->priv;
1511 long ioaddr = net_dev->base_addr;
1512 unsigned int entry;
1513 unsigned long flags;
1514 unsigned int index_cur_tx, index_dirty_tx;
1515 unsigned int count_dirty_tx;
1516
1517 /* Don't transmit data before the complete of auto-negotiation */
1518 if(!sis_priv->autong_complete){
1519 netif_stop_queue(net_dev);
1520 return 1;
1521 }
1522
1523 spin_lock_irqsave(&sis_priv->lock, flags);
1524
1525 /* Calculate the next Tx descriptor entry. */
1526 entry = sis_priv->cur_tx % NUM_TX_DESC;
1527 sis_priv->tx_skbuff[entry] = skb;
1528
1529 /* set the transmit buffer descriptor and enable Transmit State Machine */
1530 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1531 skb->data, skb->len, PCI_DMA_TODEVICE);
1532 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1533 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1534
1535 sis_priv->cur_tx ++;
1536 index_cur_tx = sis_priv->cur_tx;
1537 index_dirty_tx = sis_priv->dirty_tx;
1538
1539 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1540 count_dirty_tx ++;
1541
1542 if (index_cur_tx == index_dirty_tx) {
1543 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1544 sis_priv->tx_full = 1;
1545 netif_stop_queue(net_dev);
1546 } else if (count_dirty_tx < NUM_TX_DESC) {
1547 /* Typical path, tell upper layer that more transmission is possible */
1548 netif_start_queue(net_dev);
1549 } else {
1550 /* buffer full, tell upper layer no more transmission */
1551 sis_priv->tx_full = 1;
1552 netif_stop_queue(net_dev);
1553 }
1554
1555 spin_unlock_irqrestore(&sis_priv->lock, flags);
1556
1557 net_dev->trans_start = jiffies;
1558
1559 if (sis900_debug > 3)
1560 printk(KERN_INFO "%s: Queued Tx packet at %p size %d "
1561 "to slot %d.\n",
1562 net_dev->name, skb->data, (int)skb->len, entry);
1563
1564 return 0;
1565 }
1566
1567 /**
1568 * sis900_interrupt - sis900 interrupt handler
1569 * @irq: the irq number
1570 * @dev_instance: the client data object
1571 * @regs: snapshot of processor context
1572 *
1573 * The interrupt handler does all of the Rx thread work,
1574 * and cleans up after the Tx thread
1575 */
1576
1577 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1578 {
1579 struct net_device *net_dev = dev_instance;
1580 struct sis900_private *sis_priv = net_dev->priv;
1581 int boguscnt = max_interrupt_work;
1582 long ioaddr = net_dev->base_addr;
1583 u32 status;
1584 unsigned int handled = 0;
1585
1586 spin_lock (&sis_priv->lock);
1587
1588 do {
1589 status = inl(ioaddr + isr);
1590
1591 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1592 /* nothing intresting happened */
1593 break;
1594 handled = 1;
1595
1596 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1597 if (status & (RxORN | RxERR | RxOK))
1598 /* Rx interrupt */
1599 sis900_rx(net_dev);
1600
1601 if (status & (TxURN | TxERR | TxIDLE))
1602 /* Tx interrupt */
1603 sis900_finish_xmit(net_dev);
1604
1605 /* something strange happened !!! */
1606 if (status & HIBERR) {
1607 printk(KERN_INFO "%s: Abnormal interrupt,"
1608 "status %#8.8x.\n", net_dev->name, status);
1609 break;
1610 }
1611 if (--boguscnt < 0) {
1612 printk(KERN_INFO "%s: Too much work at interrupt, "
1613 "interrupt status = %#8.8x.\n",
1614 net_dev->name, status);
1615 break;
1616 }
1617 } while (1);
1618
1619 if (sis900_debug > 3)
1620 printk(KERN_INFO "%s: exiting interrupt, "
1621 "interrupt status = 0x%#8.8x.\n",
1622 net_dev->name, inl(ioaddr + isr));
1623
1624 spin_unlock (&sis_priv->lock);
1625 return IRQ_RETVAL(handled);
1626 }
1627
1628 /**
1629 * sis900_rx - sis900 receive routine
1630 * @net_dev: the net device which receives data
1631 *
1632 * Process receive interrupt events,
1633 * put buffer to higher layer and refill buffer pool
1634 * Note: This fucntion is called by interrupt handler,
1635 * don't do "too much" work here
1636 */
1637
1638 static int sis900_rx(struct net_device *net_dev)
1639 {
1640 struct sis900_private *sis_priv = net_dev->priv;
1641 long ioaddr = net_dev->base_addr;
1642 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1643 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1644
1645 if (sis900_debug > 3)
1646 printk(KERN_INFO "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1647 "status:0x%8.8x\n",
1648 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1649
1650 while (rx_status & OWN) {
1651 unsigned int rx_size;
1652
1653 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1654
1655 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1656 /* corrupted packet received */
1657 if (sis900_debug > 3)
1658 printk(KERN_INFO "%s: Corrupted packet "
1659 "received, buffer status = 0x%8.8x.\n",
1660 net_dev->name, rx_status);
1661 sis_priv->stats.rx_errors++;
1662 if (rx_status & OVERRUN)
1663 sis_priv->stats.rx_over_errors++;
1664 if (rx_status & (TOOLONG|RUNT))
1665 sis_priv->stats.rx_length_errors++;
1666 if (rx_status & (RXISERR | FAERR))
1667 sis_priv->stats.rx_frame_errors++;
1668 if (rx_status & CRCERR)
1669 sis_priv->stats.rx_crc_errors++;
1670 /* reset buffer descriptor state */
1671 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1672 } else {
1673 struct sk_buff * skb;
1674
1675 /* This situation should never happen, but due to
1676 some unknow bugs, it is possible that
1677 we are working on NULL sk_buff :-( */
1678 if (sis_priv->rx_skbuff[entry] == NULL) {
1679 printk(KERN_INFO "%s: NULL pointer "
1680 "encountered in Rx ring, skipping\n",
1681 net_dev->name);
1682 break;
1683 }
1684
1685 pci_unmap_single(sis_priv->pci_dev,
1686 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1687 PCI_DMA_FROMDEVICE);
1688 /* give the socket buffer to upper layers */
1689 skb = sis_priv->rx_skbuff[entry];
1690 skb_put(skb, rx_size);
1691 skb->protocol = eth_type_trans(skb, net_dev);
1692 netif_rx(skb);
1693
1694 /* some network statistics */
1695 if ((rx_status & BCAST) == MCAST)
1696 sis_priv->stats.multicast++;
1697 net_dev->last_rx = jiffies;
1698 sis_priv->stats.rx_bytes += rx_size;
1699 sis_priv->stats.rx_packets++;
1700
1701 /* refill the Rx buffer, what if there is not enought
1702 * memory for new socket buffer ?? */
1703 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1704 /* not enough memory for skbuff, this makes a
1705 * "hole" on the buffer ring, it is not clear
1706 * how the hardware will react to this kind
1707 * of degenerated buffer */
1708 printk(KERN_INFO "%s: Memory squeeze,"
1709 "deferring packet.\n",
1710 net_dev->name);
1711 sis_priv->rx_skbuff[entry] = NULL;
1712 /* reset buffer descriptor state */
1713 sis_priv->rx_ring[entry].cmdsts = 0;
1714 sis_priv->rx_ring[entry].bufptr = 0;
1715 sis_priv->stats.rx_dropped++;
1716 break;
1717 }
1718 skb->dev = net_dev;
1719 sis_priv->rx_skbuff[entry] = skb;
1720 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1721 sis_priv->rx_ring[entry].bufptr =
1722 pci_map_single(sis_priv->pci_dev, skb->tail,
1723 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1724 sis_priv->dirty_rx++;
1725 }
1726 sis_priv->cur_rx++;
1727 entry = sis_priv->cur_rx % NUM_RX_DESC;
1728 rx_status = sis_priv->rx_ring[entry].cmdsts;
1729 } // while
1730
1731 /* refill the Rx buffer, what if the rate of refilling is slower
1732 * than consuming ?? */
1733 for (;sis_priv->cur_rx - sis_priv->dirty_rx > 0; sis_priv->dirty_rx++) {
1734 struct sk_buff *skb;
1735
1736 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1737
1738 if (sis_priv->rx_skbuff[entry] == NULL) {
1739 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1740 /* not enough memory for skbuff, this makes a
1741 * "hole" on the buffer ring, it is not clear
1742 * how the hardware will react to this kind
1743 * of degenerated buffer */
1744 printk(KERN_INFO "%s: Memory squeeze,"
1745 "deferring packet.\n",
1746 net_dev->name);
1747 sis_priv->stats.rx_dropped++;
1748 break;
1749 }
1750 skb->dev = net_dev;
1751 sis_priv->rx_skbuff[entry] = skb;
1752 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1753 sis_priv->rx_ring[entry].bufptr =
1754 pci_map_single(sis_priv->pci_dev, skb->tail,
1755 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1756 }
1757 }
1758 /* re-enable the potentially idle receive state matchine */
1759 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1760
1761 return 0;
1762 }
1763
1764 /**
1765 * sis900_finish_xmit - finish up transmission of packets
1766 * @net_dev: the net device to be transmitted on
1767 *
1768 * Check for error condition and free socket buffer etc
1769 * schedule for more transmission as needed
1770 * Note: This fucntion is called by interrupt handler,
1771 * don't do "too much" work here
1772 */
1773
1774 static void sis900_finish_xmit (struct net_device *net_dev)
1775 {
1776 struct sis900_private *sis_priv = net_dev->priv;
1777
1778 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1779 struct sk_buff *skb;
1780 unsigned int entry;
1781 u32 tx_status;
1782
1783 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1784 tx_status = sis_priv->tx_ring[entry].cmdsts;
1785
1786 if (tx_status & OWN) {
1787 /* The packet is not transmitted yet (owned by hardware) !
1788 * Note: the interrupt is generated only when Tx Machine
1789 * is idle, so this is an almost impossible case */
1790 break;
1791 }
1792
1793 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1794 /* packet unsuccessfully transmitted */
1795 if (sis900_debug > 3)
1796 printk(KERN_INFO "%s: Transmit "
1797 "error, Tx status %8.8x.\n",
1798 net_dev->name, tx_status);
1799 sis_priv->stats.tx_errors++;
1800 if (tx_status & UNDERRUN)
1801 sis_priv->stats.tx_fifo_errors++;
1802 if (tx_status & ABORT)
1803 sis_priv->stats.tx_aborted_errors++;
1804 if (tx_status & NOCARRIER)
1805 sis_priv->stats.tx_carrier_errors++;
1806 if (tx_status & OWCOLL)
1807 sis_priv->stats.tx_window_errors++;
1808 } else {
1809 /* packet successfully transmitted */
1810 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1811 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1812 sis_priv->stats.tx_packets++;
1813 }
1814 /* Free the original skb. */
1815 skb = sis_priv->tx_skbuff[entry];
1816 pci_unmap_single(sis_priv->pci_dev,
1817 sis_priv->tx_ring[entry].bufptr, skb->len,
1818 PCI_DMA_TODEVICE);
1819 dev_kfree_skb_irq(skb);
1820 sis_priv->tx_skbuff[entry] = NULL;
1821 sis_priv->tx_ring[entry].bufptr = 0;
1822 sis_priv->tx_ring[entry].cmdsts = 0;
1823 }
1824
1825 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1826 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1827 /* The ring is no longer full, clear tx_full and schedule
1828 * more transmission by netif_wake_queue(net_dev) */
1829 sis_priv->tx_full = 0;
1830 netif_wake_queue (net_dev);
1831 }
1832 }
1833
1834 /**
1835 * sis900_close - close sis900 device
1836 * @net_dev: the net device to be closed
1837 *
1838 * Disable interrupts, stop the Tx and Rx Status Machine
1839 * free Tx and RX socket buffer
1840 */
1841
1842 static int sis900_close(struct net_device *net_dev)
1843 {
1844 long ioaddr = net_dev->base_addr;
1845 struct sis900_private *sis_priv = net_dev->priv;
1846 struct sk_buff *skb;
1847 int i;
1848
1849 netif_stop_queue(net_dev);
1850
1851 /* Disable interrupts by clearing the interrupt mask. */
1852 outl(0x0000, ioaddr + imr);
1853 outl(0x0000, ioaddr + ier);
1854
1855 /* Stop the chip's Tx and Rx Status Machine */
1856 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1857
1858 del_timer(&sis_priv->timer);
1859
1860 free_irq(net_dev->irq, net_dev);
1861
1862 /* Free Tx and RX skbuff */
1863 for (i = 0; i < NUM_RX_DESC; i++) {
1864 skb = sis_priv->rx_skbuff[i];
1865 if (skb) {
1866 pci_unmap_single(sis_priv->pci_dev,
1867 sis_priv->rx_ring[i].bufptr,
1868 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1869 dev_kfree_skb(skb);
1870 sis_priv->rx_skbuff[i] = NULL;
1871 }
1872 }
1873 for (i = 0; i < NUM_TX_DESC; i++) {
1874 skb = sis_priv->tx_skbuff[i];
1875 if (skb) {
1876 pci_unmap_single(sis_priv->pci_dev,
1877 sis_priv->tx_ring[i].bufptr, skb->len,
1878 PCI_DMA_TODEVICE);
1879 dev_kfree_skb(skb);
1880 sis_priv->tx_skbuff[i] = NULL;
1881 }
1882 }
1883
1884 /* Green! Put the chip in low-power mode. */
1885
1886 return 0;
1887 }
1888
1889 /**
1890 * sis900_get_drvinfo - Return information about driver
1891 * @net_dev: the net device to probe
1892 * @info: container for info returned
1893 *
1894 * Process ethtool command such as "ehtool -i" to show information
1895 */
1896
1897 static void sis900_get_drvinfo(struct net_device *net_dev,
1898 struct ethtool_drvinfo *info)
1899 {
1900 struct sis900_private *sis_priv = net_dev->priv;
1901
1902 strcpy (info->driver, SIS900_MODULE_NAME);
1903 strcpy (info->version, SIS900_DRV_VERSION);
1904 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1905 }
1906
1907 static struct ethtool_ops sis900_ethtool_ops = {
1908 .get_drvinfo = sis900_get_drvinfo,
1909 };
1910
1911 /**
1912 * mii_ioctl - process MII i/o control command
1913 * @net_dev: the net device to command for
1914 * @rq: parameter for command
1915 * @cmd: the i/o command
1916 *
1917 * Process MII command like read/write MII register
1918 */
1919
1920 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
1921 {
1922 struct sis900_private *sis_priv = net_dev->priv;
1923 struct mii_ioctl_data *data = if_mii(rq);
1924
1925 switch(cmd) {
1926 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1927 data->phy_id = sis_priv->mii->phy_addr;
1928 /* Fall Through */
1929
1930 case SIOCGMIIREG: /* Read MII PHY register. */
1931 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1932 return 0;
1933
1934 case SIOCSMIIREG: /* Write MII PHY register. */
1935 if (!capable(CAP_NET_ADMIN))
1936 return -EPERM;
1937 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1938 return 0;
1939 default:
1940 return -EOPNOTSUPP;
1941 }
1942 }
1943
1944 /**
1945 * sis900_get_stats - Get sis900 read/write statistics
1946 * @net_dev: the net device to get statistics for
1947 *
1948 * get tx/rx statistics for sis900
1949 */
1950
1951 static struct net_device_stats *
1952 sis900_get_stats(struct net_device *net_dev)
1953 {
1954 struct sis900_private *sis_priv = net_dev->priv;
1955
1956 return &sis_priv->stats;
1957 }
1958
1959 /**
1960 * sis900_set_config - Set media type by net_device.set_config
1961 * @dev: the net device for media type change
1962 * @map: ifmap passed by ifconfig
1963 *
1964 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
1965 * we support only port changes. All other runtime configuration
1966 * changes will be ignored
1967 */
1968
1969 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
1970 {
1971 struct sis900_private *sis_priv = dev->priv;
1972 struct mii_phy *mii_phy = sis_priv->mii;
1973
1974 u16 status;
1975
1976 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1977 /* we switch on the ifmap->port field. I couldn't find anything
1978 * like a definition or standard for the values of that field.
1979 * I think the meaning of those values is device specific. But
1980 * since I would like to change the media type via the ifconfig
1981 * command I use the definition from linux/netdevice.h
1982 * (which seems to be different from the ifport(pcmcia) definition) */
1983 switch(map->port){
1984 case IF_PORT_UNKNOWN: /* use auto here */
1985 dev->if_port = map->port;
1986 /* we are going to change the media type, so the Link
1987 * will be temporary down and we need to reflect that
1988 * here. When the Link comes up again, it will be
1989 * sensed by the sis_timer procedure, which also does
1990 * all the rest for us */
1991 netif_carrier_off(dev);
1992
1993 /* read current state */
1994 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1995
1996 /* enable auto negotiation and reset the negotioation
1997 * (I don't really know what the auto negatiotiation
1998 * reset really means, but it sounds for me right to
1999 * do one here) */
2000 mdio_write(dev, mii_phy->phy_addr,
2001 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2002
2003 break;
2004
2005 case IF_PORT_10BASET: /* 10BaseT */
2006 dev->if_port = map->port;
2007
2008 /* we are going to change the media type, so the Link
2009 * will be temporary down and we need to reflect that
2010 * here. When the Link comes up again, it will be
2011 * sensed by the sis_timer procedure, which also does
2012 * all the rest for us */
2013 netif_carrier_off(dev);
2014
2015 /* set Speed to 10Mbps */
2016 /* read current state */
2017 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2018
2019 /* disable auto negotiation and force 10MBit mode*/
2020 mdio_write(dev, mii_phy->phy_addr,
2021 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2022 MII_CNTL_AUTO));
2023 break;
2024
2025 case IF_PORT_100BASET: /* 100BaseT */
2026 case IF_PORT_100BASETX: /* 100BaseTx */
2027 dev->if_port = map->port;
2028
2029 /* we are going to change the media type, so the Link
2030 * will be temporary down and we need to reflect that
2031 * here. When the Link comes up again, it will be
2032 * sensed by the sis_timer procedure, which also does
2033 * all the rest for us */
2034 netif_carrier_off(dev);
2035
2036 /* set Speed to 100Mbps */
2037 /* disable auto negotiation and enable 100MBit Mode */
2038 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2039 mdio_write(dev, mii_phy->phy_addr,
2040 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2041 MII_CNTL_SPEED);
2042
2043 break;
2044
2045 case IF_PORT_10BASE2: /* 10Base2 */
2046 case IF_PORT_AUI: /* AUI */
2047 case IF_PORT_100BASEFX: /* 100BaseFx */
2048 /* These Modes are not supported (are they?)*/
2049 printk(KERN_INFO "Not supported");
2050 return -EOPNOTSUPP;
2051 break;
2052
2053 default:
2054 printk(KERN_INFO "Invalid");
2055 return -EINVAL;
2056 }
2057 }
2058 return 0;
2059 }
2060
2061 /**
2062 * sis900_mcast_bitnr - compute hashtable index
2063 * @addr: multicast address
2064 * @revision: revision id of chip
2065 *
2066 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2067 * hash table, which makes this function a little bit different from other drivers
2068 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2069 * multicast hash table.
2070 */
2071
2072 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2073 {
2074
2075 u32 crc = ether_crc(6, addr);
2076
2077 /* leave 8 or 7 most siginifant bits */
2078 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2079 return ((int)(crc >> 24));
2080 else
2081 return ((int)(crc >> 25));
2082 }
2083
2084 /**
2085 * set_rx_mode - Set SiS900 receive mode
2086 * @net_dev: the net device to be set
2087 *
2088 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2089 * And set the appropriate multicast filter.
2090 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2091 */
2092
2093 static void set_rx_mode(struct net_device *net_dev)
2094 {
2095 long ioaddr = net_dev->base_addr;
2096 struct sis900_private * sis_priv = net_dev->priv;
2097 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2098 int i, table_entries;
2099 u32 rx_mode;
2100 u8 revision;
2101
2102 /* 635 Hash Table entires = 256(2^16) */
2103 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2104 if((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2105 table_entries = 16;
2106 else
2107 table_entries = 8;
2108
2109 if (net_dev->flags & IFF_PROMISC) {
2110 /* Accept any kinds of packets */
2111 rx_mode = RFPromiscuous;
2112 for (i = 0; i < table_entries; i++)
2113 mc_filter[i] = 0xffff;
2114 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2115 (net_dev->flags & IFF_ALLMULTI)) {
2116 /* too many multicast addresses or accept all multicast packet */
2117 rx_mode = RFAAB | RFAAM;
2118 for (i = 0; i < table_entries; i++)
2119 mc_filter[i] = 0xffff;
2120 } else {
2121 /* Accept Broadcast packet, destination address matchs our
2122 * MAC address, use Receive Filter to reject unwanted MCAST
2123 * packets */
2124 struct dev_mc_list *mclist;
2125 rx_mode = RFAAB;
2126 for (i = 0, mclist = net_dev->mc_list;
2127 mclist && i < net_dev->mc_count;
2128 i++, mclist = mclist->next) {
2129 unsigned int bit_nr =
2130 sis900_mcast_bitnr(mclist->dmi_addr, revision);
2131 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2132 }
2133 }
2134
2135 /* update Multicast Hash Table in Receive Filter */
2136 for (i = 0; i < table_entries; i++) {
2137 /* why plus 0x04 ??, That makes the correct value for hash table. */
2138 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2139 outl(mc_filter[i], ioaddr + rfdr);
2140 }
2141
2142 outl(RFEN | rx_mode, ioaddr + rfcr);
2143
2144 /* sis900 is capable of looping back packets at MAC level for
2145 * debugging purpose */
2146 if (net_dev->flags & IFF_LOOPBACK) {
2147 u32 cr_saved;
2148 /* We must disable Tx/Rx before setting loopback mode */
2149 cr_saved = inl(ioaddr + cr);
2150 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2151 /* enable loopback */
2152 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2153 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2154 /* restore cr */
2155 outl(cr_saved, ioaddr + cr);
2156 }
2157
2158 return;
2159 }
2160
2161 /**
2162 * sis900_reset - Reset sis900 MAC
2163 * @net_dev: the net device to reset
2164 *
2165 * reset sis900 MAC and wait until finished
2166 * reset through command register
2167 * change backoff algorithm for 900B0 & 635 M/B
2168 */
2169
2170 static void sis900_reset(struct net_device *net_dev)
2171 {
2172 struct sis900_private * sis_priv = net_dev->priv;
2173 long ioaddr = net_dev->base_addr;
2174 int i = 0;
2175 u32 status = TxRCMP | RxRCMP;
2176 u8 revision;
2177
2178 outl(0, ioaddr + ier);
2179 outl(0, ioaddr + imr);
2180 outl(0, ioaddr + rfcr);
2181
2182 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2183
2184 /* Check that the chip has finished the reset. */
2185 while (status && (i++ < 1000)) {
2186 status ^= (inl(isr + ioaddr) & status);
2187 }
2188
2189 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2190 if( (revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV) )
2191 outl(PESEL | RND_CNT, ioaddr + cfg);
2192 else
2193 outl(PESEL, ioaddr + cfg);
2194 }
2195
2196 /**
2197 * sis900_remove - Remove sis900 device
2198 * @pci_dev: the pci device to be removed
2199 *
2200 * remove and release SiS900 net device
2201 */
2202
2203 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2204 {
2205 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2206 struct sis900_private * sis_priv = net_dev->priv;
2207 struct mii_phy *phy = NULL;
2208
2209 while (sis_priv->first_mii) {
2210 phy = sis_priv->first_mii;
2211 sis_priv->first_mii = phy->next;
2212 kfree(phy);
2213 }
2214
2215 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2216 sis_priv->rx_ring_dma);
2217 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2218 sis_priv->tx_ring_dma);
2219 unregister_netdev(net_dev);
2220 free_netdev(net_dev);
2221 pci_release_regions(pci_dev);
2222 pci_set_drvdata(pci_dev, NULL);
2223 }
2224
2225 #ifdef CONFIG_PM
2226
2227 static int sis900_suspend(struct pci_dev *pci_dev, u32 state)
2228 {
2229 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2230 long ioaddr = net_dev->base_addr;
2231
2232 if(!netif_running(net_dev))
2233 return 0;
2234
2235 netif_stop_queue(net_dev);
2236 netif_device_detach(net_dev);
2237
2238 /* Stop the chip's Tx and Rx Status Machine */
2239 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2240
2241 pci_set_power_state(pci_dev, PCI_D3hot);
2242 pci_save_state(pci_dev);
2243
2244 return 0;
2245 }
2246
2247 static int sis900_resume(struct pci_dev *pci_dev)
2248 {
2249 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2250 struct sis900_private *sis_priv = net_dev->priv;
2251 long ioaddr = net_dev->base_addr;
2252
2253 if(!netif_running(net_dev))
2254 return 0;
2255 pci_restore_state(pci_dev);
2256 pci_set_power_state(pci_dev, PCI_D0);
2257
2258 sis900_init_rxfilter(net_dev);
2259
2260 sis900_init_tx_ring(net_dev);
2261 sis900_init_rx_ring(net_dev);
2262
2263 set_rx_mode(net_dev);
2264
2265 netif_device_attach(net_dev);
2266 netif_start_queue(net_dev);
2267
2268 /* Workaround for EDB */
2269 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2270
2271 /* Enable all known interrupts by setting the interrupt mask. */
2272 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2273 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2274 outl(IE, ioaddr + ier);
2275
2276 sis900_check_mode(net_dev, sis_priv->mii);
2277
2278 return 0;
2279 }
2280 #endif /* CONFIG_PM */
2281
2282 static struct pci_driver sis900_pci_driver = {
2283 .name = SIS900_MODULE_NAME,
2284 .id_table = sis900_pci_tbl,
2285 .probe = sis900_probe,
2286 .remove = __devexit_p(sis900_remove),
2287 #ifdef CONFIG_PM
2288 .suspend = sis900_suspend,
2289 .resume = sis900_resume,
2290 #endif /* CONFIG_PM */
2291 };
2292
2293 static int __init sis900_init_module(void)
2294 {
2295 /* when a module, this is printed whether or not devices are found in probe */
2296 #ifdef MODULE
2297 printk(version);
2298 #endif
2299
2300 return pci_module_init(&sis900_pci_driver);
2301 }
2302
2303 static void __exit sis900_cleanup_module(void)
2304 {
2305 pci_unregister_driver(&sis900_pci_driver);
2306 }
2307
2308 module_init(sis900_init_module);
2309 module_exit(sis900_cleanup_module);
2310
2311
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