Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] Architecture: [ i386 ]
  1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
  2    Copyright 1999 Silicon Integrated System Corporation
  3    Revision:    1.08.10 Apr. 2 2006
  4 
  5    Modified from the driver which is originally written by Donald Becker.
  6 
  7    This software may be used and distributed according to the terms
  8    of the GNU General Public License (GPL), incorporated herein by reference.
  9    Drivers based on this skeleton fall under the GPL and must retain
 10    the authorship (implicit copyright) notice.
 11 
 12    References:
 13    SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
 14    preliminary Rev. 1.0 Jan. 14, 1998
 15    SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
 16    preliminary Rev. 1.0 Nov. 10, 1998
 17    SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
 18    preliminary Rev. 1.0 Jan. 18, 1998
 19 
 20    Rev 1.08.10 Apr.  2 2006 Daniele Venzano add vlan (jumbo packets) support
 21    Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
 22    Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
 23    Rev 1.08.07 Nov.  2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
 24    Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
 25    Rev 1.08.05 Jun.  6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
 26    Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
 27    Rev 1.08.03 Feb.  1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
 28    Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
 29    Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
 30    Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
 31    Rev 1.07.11 Apr.  2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
 32    Rev 1.07.10 Mar.  1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
 33    Rev 1.07.09 Feb.  9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
 34    Rev 1.07.08 Jan.  8 2001 Lei-Chun Chang added RTL8201 PHY support
 35    Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
 36    Rev 1.07.06 Nov.  7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
 37    Rev 1.07.05 Nov.  6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
 38    Rev 1.07.04 Sep.  6 2000 Lei-Chun Chang added ICS1893 PHY support
 39    Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
 40    Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
 41    Rev 1.07    Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
 42    Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
 43    Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
 44    Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
 45    Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
 46    Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
 47    Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
 48    Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
 49    Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
 50 */
 51 
 52 #include <linux/module.h>
 53 #include <linux/moduleparam.h>
 54 #include <linux/kernel.h>
 55 #include <linux/string.h>
 56 #include <linux/timer.h>
 57 #include <linux/errno.h>
 58 #include <linux/ioport.h>
 59 #include <linux/slab.h>
 60 #include <linux/interrupt.h>
 61 #include <linux/pci.h>
 62 #include <linux/netdevice.h>
 63 #include <linux/init.h>
 64 #include <linux/mii.h>
 65 #include <linux/etherdevice.h>
 66 #include <linux/skbuff.h>
 67 #include <linux/delay.h>
 68 #include <linux/ethtool.h>
 69 #include <linux/crc32.h>
 70 #include <linux/bitops.h>
 71 #include <linux/dma-mapping.h>
 72 
 73 #include <asm/processor.h>      /* Processor type for cache alignment. */
 74 #include <asm/io.h>
 75 #include <asm/irq.h>
 76 #include <asm/uaccess.h>        /* User space memory access functions */
 77 
 78 #include "sis900.h"
 79 
 80 #define SIS900_MODULE_NAME "sis900"
 81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
 82 
 83 static char version[] __devinitdata =
 84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
 85 
 86 static int max_interrupt_work = 40;
 87 static int multicast_filter_limit = 128;
 88 
 89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
 90 
 91 #define SIS900_DEF_MSG \
 92         (NETIF_MSG_DRV          | \
 93          NETIF_MSG_LINK         | \
 94          NETIF_MSG_RX_ERR       | \
 95          NETIF_MSG_TX_ERR)
 96 
 97 /* Time in jiffies before concluding the transmitter is hung. */
 98 #define TX_TIMEOUT  (4*HZ)
 99 
100 enum {
101         SIS_900 = 0,
102         SIS_7016
103 };
104 static const char * card_names[] = {
105         "SiS 900 PCI Fast Ethernet",
106         "SiS 7016 PCI Fast Ethernet"
107 };
108 static struct pci_device_id sis900_pci_tbl [] = {
109         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113         {0,}
114 };
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116 
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118 
119 static const struct mii_chip_info {
120         const char * name;
121         u16 phy_id0;
122         u16 phy_id1;
123         u8  phy_types;
124 #define HOME    0x0001
125 #define LAN     0x0002
126 #define MIX     0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129         { "SiS 900 Internal MII PHY",           0x001d, 0x8000, LAN },
130         { "SiS 7014 Physical Layer Solution",   0x0016, 0xf830, LAN },
131         { "SiS 900 on Foxconn 661 7MI",         0x0143, 0xBC70, LAN },
132         { "Altimata AC101LF PHY",               0x0022, 0x5520, LAN },
133         { "ADM 7001 LAN PHY",                   0x002e, 0xcc60, LAN },
134         { "AMD 79C901 10BASE-T PHY",            0x0000, 0x6B70, LAN },
135         { "AMD 79C901 HomePNA PHY",             0x0000, 0x6B90, HOME},
136         { "ICS LAN PHY",                        0x0015, 0xF440, LAN },
137         { "ICS LAN PHY",                        0x0143, 0xBC70, LAN },
138         { "NS 83851 PHY",                       0x2000, 0x5C20, MIX },
139         { "NS 83847 PHY",                       0x2000, 0x5C30, MIX },
140         { "Realtek RTL8201 PHY",                0x0000, 0x8200, LAN },
141         { "VIA 6103 PHY",                       0x0101, 0x8f20, LAN },
142         {NULL,},
143 };
144 
145 struct mii_phy {
146         struct mii_phy * next;
147         int phy_addr;
148         u16 phy_id0;
149         u16 phy_id1;
150         u16 status;
151         u8  phy_types;
152 };
153 
154 typedef struct _BufferDesc {
155         u32 link;
156         u32 cmdsts;
157         u32 bufptr;
158 } BufferDesc;
159 
160 struct sis900_private {
161         struct pci_dev * pci_dev;
162 
163         spinlock_t lock;
164 
165         struct mii_phy * mii;
166         struct mii_phy * first_mii; /* record the first mii structure */
167         unsigned int cur_phy;
168         struct mii_if_info mii_info;
169 
170         struct timer_list timer; /* Link status detection timer. */
171         u8 autong_complete; /* 1: auto-negotiate complete  */
172 
173         u32 msg_enable;
174 
175         unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176         unsigned int cur_tx, dirty_tx;
177 
178         /* The saved address of a sent/receive-in-place packet buffer */
179         struct sk_buff *tx_skbuff[NUM_TX_DESC];
180         struct sk_buff *rx_skbuff[NUM_RX_DESC];
181         BufferDesc *tx_ring;
182         BufferDesc *rx_ring;
183 
184         dma_addr_t tx_ring_dma;
185         dma_addr_t rx_ring_dma;
186 
187         unsigned int tx_full; /* The Tx queue is full. */
188         u8 host_bridge_rev;
189         u8 chipset_rev;
190 };
191 
192 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194 MODULE_LICENSE("GPL");
195 
196 module_param(multicast_filter_limit, int, 0444);
197 module_param(max_interrupt_work, int, 0444);
198 module_param(sis900_debug, int, 0444);
199 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
202 
203 #ifdef CONFIG_NET_POLL_CONTROLLER
204 static void sis900_poll(struct net_device *dev);
205 #endif
206 static int sis900_open(struct net_device *net_dev);
207 static int sis900_mii_probe (struct net_device * net_dev);
208 static void sis900_init_rxfilter (struct net_device * net_dev);
209 static u16 read_eeprom(long ioaddr, int location);
210 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
211 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212 static void sis900_timer(unsigned long data);
213 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214 static void sis900_tx_timeout(struct net_device *net_dev);
215 static void sis900_init_tx_ring(struct net_device *net_dev);
216 static void sis900_init_rx_ring(struct net_device *net_dev);
217 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218 static int sis900_rx(struct net_device *net_dev);
219 static void sis900_finish_xmit (struct net_device *net_dev);
220 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
221 static int sis900_close(struct net_device *net_dev);
222 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
223 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
224 static void set_rx_mode(struct net_device *net_dev);
225 static void sis900_reset(struct net_device *net_dev);
226 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
227 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
228 static u16 sis900_default_phy(struct net_device * net_dev);
229 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
230 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
231 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
232 static void sis900_set_mode (long ioaddr, int speed, int duplex);
233 static const struct ethtool_ops sis900_ethtool_ops;
234 
235 /**
236  *      sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
237  *      @pci_dev: the sis900 pci device
238  *      @net_dev: the net device to get address for
239  *
240  *      Older SiS900 and friends, use EEPROM to store MAC address.
241  *      MAC address is read from read_eeprom() into @net_dev->dev_addr.
242  */
243 
244 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
245 {
246         long ioaddr = pci_resource_start(pci_dev, 0);
247         u16 signature;
248         int i;
249 
250         /* check to see if we have sane EEPROM */
251         signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
252         if (signature == 0xffff || signature == 0x0000) {
253                 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
254                         pci_name(pci_dev), signature);
255                 return 0;
256         }
257 
258         /* get MAC address from EEPROM */
259         for (i = 0; i < 3; i++)
260                 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
261 
262         return 1;
263 }
264 
265 /**
266  *      sis630e_get_mac_addr - Get MAC address for SiS630E model
267  *      @pci_dev: the sis900 pci device
268  *      @net_dev: the net device to get address for
269  *
270  *      SiS630E model, use APC CMOS RAM to store MAC address.
271  *      APC CMOS RAM is accessed through ISA bridge.
272  *      MAC address is read into @net_dev->dev_addr.
273  */
274 
275 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
276                                         struct net_device *net_dev)
277 {
278         struct pci_dev *isa_bridge = NULL;
279         u8 reg;
280         int i;
281 
282         isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
283         if (!isa_bridge)
284                 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
285         if (!isa_bridge) {
286                 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
287                        pci_name(pci_dev));
288                 return 0;
289         }
290         pci_read_config_byte(isa_bridge, 0x48, &reg);
291         pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
292 
293         for (i = 0; i < 6; i++) {
294                 outb(0x09 + i, 0x70);
295                 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
296         }
297         pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
298         pci_dev_put(isa_bridge);
299 
300         return 1;
301 }
302 
303 
304 /**
305  *      sis635_get_mac_addr - Get MAC address for SIS635 model
306  *      @pci_dev: the sis900 pci device
307  *      @net_dev: the net device to get address for
308  *
309  *      SiS635 model, set MAC Reload Bit to load Mac address from APC
310  *      to rfdr. rfdr is accessed through rfcr. MAC address is read into
311  *      @net_dev->dev_addr.
312  */
313 
314 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
315                                         struct net_device *net_dev)
316 {
317         long ioaddr = net_dev->base_addr;
318         u32 rfcrSave;
319         u32 i;
320 
321         rfcrSave = inl(rfcr + ioaddr);
322 
323         outl(rfcrSave | RELOAD, ioaddr + cr);
324         outl(0, ioaddr + cr);
325 
326         /* disable packet filtering before setting filter */
327         outl(rfcrSave & ~RFEN, rfcr + ioaddr);
328 
329         /* load MAC addr to filter data register */
330         for (i = 0 ; i < 3 ; i++) {
331                 outl((i << RFADDR_shift), ioaddr + rfcr);
332                 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
333         }
334 
335         /* enable packet filtering */
336         outl(rfcrSave | RFEN, rfcr + ioaddr);
337 
338         return 1;
339 }
340 
341 /**
342  *      sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
343  *      @pci_dev: the sis900 pci device
344  *      @net_dev: the net device to get address for
345  *
346  *      SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
347  *      is shared by
348  *      LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
349  *      and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
350  *      by LAN, otherwise is not. After MAC address is read from EEPROM, send
351  *      EEDONE signal to refuse EEPROM access by LAN.
352  *      The EEPROM map of SiS962 or SiS963 is different to SiS900.
353  *      The signature field in SiS962 or SiS963 spec is meaningless.
354  *      MAC address is read into @net_dev->dev_addr.
355  */
356 
357 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
358                                         struct net_device *net_dev)
359 {
360         long ioaddr = net_dev->base_addr;
361         long ee_addr = ioaddr + mear;
362         u32 waittime = 0;
363         int i;
364 
365         outl(EEREQ, ee_addr);
366         while(waittime < 2000) {
367                 if(inl(ee_addr) & EEGNT) {
368 
369                         /* get MAC address from EEPROM */
370                         for (i = 0; i < 3; i++)
371                                 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
372 
373                         outl(EEDONE, ee_addr);
374                         return 1;
375                 } else {
376                         udelay(1);
377                         waittime ++;
378                 }
379         }
380         outl(EEDONE, ee_addr);
381         return 0;
382 }
383 
384 /**
385  *      sis900_probe - Probe for sis900 device
386  *      @pci_dev: the sis900 pci device
387  *      @pci_id: the pci device ID
388  *
389  *      Check and probe sis900 net device for @pci_dev.
390  *      Get mac address according to the chip revision,
391  *      and assign SiS900-specific entries in the device structure.
392  *      ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
393  */
394 
395 static int __devinit sis900_probe(struct pci_dev *pci_dev,
396                                 const struct pci_device_id *pci_id)
397 {
398         struct sis900_private *sis_priv;
399         struct net_device *net_dev;
400         struct pci_dev *dev;
401         dma_addr_t ring_dma;
402         void *ring_space;
403         long ioaddr;
404         int i, ret;
405         const char *card_name = card_names[pci_id->driver_data];
406         const char *dev_name = pci_name(pci_dev);
407         DECLARE_MAC_BUF(mac);
408 
409 /* when built into the kernel, we only print version if device is found */
410 #ifndef MODULE
411         static int printed_version;
412         if (!printed_version++)
413                 printk(version);
414 #endif
415 
416         /* setup various bits in PCI command register */
417         ret = pci_enable_device(pci_dev);
418         if(ret) return ret;
419 
420         i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
421         if(i){
422                 printk(KERN_ERR "sis900.c: architecture does not support "
423                         "32bit PCI busmaster DMA\n");
424                 return i;
425         }
426 
427         pci_set_master(pci_dev);
428 
429         net_dev = alloc_etherdev(sizeof(struct sis900_private));
430         if (!net_dev)
431                 return -ENOMEM;
432         SET_NETDEV_DEV(net_dev, &pci_dev->dev);
433 
434         /* We do a request_region() to register /proc/ioports info. */
435         ioaddr = pci_resource_start(pci_dev, 0);
436         ret = pci_request_regions(pci_dev, "sis900");
437         if (ret)
438                 goto err_out;
439 
440         sis_priv = net_dev->priv;
441         net_dev->base_addr = ioaddr;
442         net_dev->irq = pci_dev->irq;
443         sis_priv->pci_dev = pci_dev;
444         spin_lock_init(&sis_priv->lock);
445 
446         pci_set_drvdata(pci_dev, net_dev);
447 
448         ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
449         if (!ring_space) {
450                 ret = -ENOMEM;
451                 goto err_out_cleardev;
452         }
453         sis_priv->tx_ring = (BufferDesc *)ring_space;
454         sis_priv->tx_ring_dma = ring_dma;
455 
456         ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
457         if (!ring_space) {
458                 ret = -ENOMEM;
459                 goto err_unmap_tx;
460         }
461         sis_priv->rx_ring = (BufferDesc *)ring_space;
462         sis_priv->rx_ring_dma = ring_dma;
463 
464         /* The SiS900-specific entries in the device structure. */
465         net_dev->open = &sis900_open;
466         net_dev->hard_start_xmit = &sis900_start_xmit;
467         net_dev->stop = &sis900_close;
468         net_dev->set_config = &sis900_set_config;
469         net_dev->set_multicast_list = &set_rx_mode;
470         net_dev->do_ioctl = &mii_ioctl;
471         net_dev->tx_timeout = sis900_tx_timeout;
472         net_dev->watchdog_timeo = TX_TIMEOUT;
473         net_dev->ethtool_ops = &sis900_ethtool_ops;
474 
475 #ifdef CONFIG_NET_POLL_CONTROLLER
476         net_dev->poll_controller = &sis900_poll;
477 #endif
478 
479         if (sis900_debug > 0)
480                 sis_priv->msg_enable = sis900_debug;
481         else
482                 sis_priv->msg_enable = SIS900_DEF_MSG;
483 
484         sis_priv->mii_info.dev = net_dev;
485         sis_priv->mii_info.mdio_read = mdio_read;
486         sis_priv->mii_info.mdio_write = mdio_write;
487         sis_priv->mii_info.phy_id_mask = 0x1f;
488         sis_priv->mii_info.reg_num_mask = 0x1f;
489 
490         /* Get Mac address according to the chip revision */
491         pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
492         if(netif_msg_probe(sis_priv))
493                 printk(KERN_DEBUG "%s: detected revision %2.2x, "
494                                 "trying to get MAC address...\n",
495                                 dev_name, sis_priv->chipset_rev);
496 
497         ret = 0;
498         if (sis_priv->chipset_rev == SIS630E_900_REV)
499                 ret = sis630e_get_mac_addr(pci_dev, net_dev);
500         else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
501                 ret = sis635_get_mac_addr(pci_dev, net_dev);
502         else if (sis_priv->chipset_rev == SIS96x_900_REV)
503                 ret = sis96x_get_mac_addr(pci_dev, net_dev);
504         else
505                 ret = sis900_get_mac_addr(pci_dev, net_dev);
506 
507         if (ret == 0) {
508                 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
509                 ret = -ENODEV;
510                 goto err_unmap_rx;
511         }
512 
513         /* 630ET : set the mii access mode as software-mode */
514         if (sis_priv->chipset_rev == SIS630ET_900_REV)
515                 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
516 
517         /* probe for mii transceiver */
518         if (sis900_mii_probe(net_dev) == 0) {
519                 printk(KERN_WARNING "%s: Error probing MII device.\n",
520                        dev_name);
521                 ret = -ENODEV;
522                 goto err_unmap_rx;
523         }
524 
525         /* save our host bridge revision */
526         dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
527         if (dev) {
528                 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
529                 pci_dev_put(dev);
530         }
531 
532         ret = register_netdev(net_dev);
533         if (ret)
534                 goto err_unmap_rx;
535 
536         /* print some information about our NIC */
537         printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %s\n",
538                net_dev->name, card_name, ioaddr, net_dev->irq,
539                print_mac(mac, net_dev->dev_addr));
540 
541         /* Detect Wake on Lan support */
542         ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
543         if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
544                 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
545 
546         return 0;
547 
548  err_unmap_rx:
549         pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
550                 sis_priv->rx_ring_dma);
551  err_unmap_tx:
552         pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
553                 sis_priv->tx_ring_dma);
554  err_out_cleardev:
555         pci_set_drvdata(pci_dev, NULL);
556         pci_release_regions(pci_dev);
557  err_out:
558         free_netdev(net_dev);
559         return ret;
560 }
561 
562 /**
563  *      sis900_mii_probe - Probe MII PHY for sis900
564  *      @net_dev: the net device to probe for
565  *
566  *      Search for total of 32 possible mii phy addresses.
567  *      Identify and set current phy if found one,
568  *      return error if it failed to found.
569  */
570 
571 static int __devinit sis900_mii_probe(struct net_device * net_dev)
572 {
573         struct sis900_private * sis_priv = net_dev->priv;
574         const char *dev_name = pci_name(sis_priv->pci_dev);
575         u16 poll_bit = MII_STAT_LINK, status = 0;
576         unsigned long timeout = jiffies + 5 * HZ;
577         int phy_addr;
578 
579         sis_priv->mii = NULL;
580 
581         /* search for total of 32 possible mii phy addresses */
582         for (phy_addr = 0; phy_addr < 32; phy_addr++) {
583                 struct mii_phy * mii_phy = NULL;
584                 u16 mii_status;
585                 int i;
586 
587                 mii_phy = NULL;
588                 for(i = 0; i < 2; i++)
589                         mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
590 
591                 if (mii_status == 0xffff || mii_status == 0x0000) {
592                         if (netif_msg_probe(sis_priv))
593                                 printk(KERN_DEBUG "%s: MII at address %d"
594                                                 " not accessible\n",
595                                                 dev_name, phy_addr);
596                         continue;
597                 }
598 
599                 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
600                         printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
601                         mii_phy = sis_priv->first_mii;
602                         while (mii_phy) {
603                                 struct mii_phy *phy;
604                                 phy = mii_phy;
605                                 mii_phy = mii_phy->next;
606                                 kfree(phy);
607                         }
608                         return 0;
609                 }
610 
611                 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
612                 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
613                 mii_phy->phy_addr = phy_addr;
614                 mii_phy->status = mii_status;
615                 mii_phy->next = sis_priv->mii;
616                 sis_priv->mii = mii_phy;
617                 sis_priv->first_mii = mii_phy;
618 
619                 for (i = 0; mii_chip_table[i].phy_id1; i++)
620                         if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
621                             ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
622                                 mii_phy->phy_types = mii_chip_table[i].phy_types;
623                                 if (mii_chip_table[i].phy_types == MIX)
624                                         mii_phy->phy_types =
625                                             (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
626                                 printk(KERN_INFO "%s: %s transceiver found "
627                                                         "at address %d.\n",
628                                                         dev_name,
629                                                         mii_chip_table[i].name,
630                                                         phy_addr);
631                                 break;
632                         }
633 
634                 if( !mii_chip_table[i].phy_id1 ) {
635                         printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
636                                dev_name, phy_addr);
637                         mii_phy->phy_types = UNKNOWN;
638                 }
639         }
640 
641         if (sis_priv->mii == NULL) {
642                 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
643                 return 0;
644         }
645 
646         /* select default PHY for mac */
647         sis_priv->mii = NULL;
648         sis900_default_phy( net_dev );
649 
650         /* Reset phy if default phy is internal sis900 */
651         if ((sis_priv->mii->phy_id0 == 0x001D) &&
652             ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
653                 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
654 
655         /* workaround for ICS1893 PHY */
656         if ((sis_priv->mii->phy_id0 == 0x0015) &&
657             ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
658                 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
659 
660         if(status & MII_STAT_LINK){
661                 while (poll_bit) {
662                         yield();
663 
664                         poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
665                         if (time_after_eq(jiffies, timeout)) {
666                                 printk(KERN_WARNING "%s: reset phy and link down now\n",
667                                        dev_name);
668                                 return -ETIME;
669                         }
670                 }
671         }
672 
673         if (sis_priv->chipset_rev == SIS630E_900_REV) {
674                 /* SiS 630E has some bugs on default value of PHY registers */
675                 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
676                 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
677                 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
678                 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
679                 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
680         }
681 
682         if (sis_priv->mii->status & MII_STAT_LINK)
683                 netif_carrier_on(net_dev);
684         else
685                 netif_carrier_off(net_dev);
686 
687         return 1;
688 }
689 
690 /**
691  *      sis900_default_phy - Select default PHY for sis900 mac.
692  *      @net_dev: the net device to probe for
693  *
694  *      Select first detected PHY with link as default.
695  *      If no one is link on, select PHY whose types is HOME as default.
696  *      If HOME doesn't exist, select LAN.
697  */
698 
699 static u16 sis900_default_phy(struct net_device * net_dev)
700 {
701         struct sis900_private * sis_priv = net_dev->priv;
702         struct mii_phy *phy = NULL, *phy_home = NULL,
703                 *default_phy = NULL, *phy_lan = NULL;
704         u16 status;
705 
706         for (phy=sis_priv->first_mii; phy; phy=phy->next) {
707                 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
708                 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
709 
710                 /* Link ON & Not select default PHY & not ghost PHY */
711                  if ((status & MII_STAT_LINK) && !default_phy &&
712                                         (phy->phy_types != UNKNOWN))
713                         default_phy = phy;
714                  else {
715                         status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
716                         mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
717                                 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
718                         if (phy->phy_types == HOME)
719                                 phy_home = phy;
720                         else if(phy->phy_types == LAN)
721                                 phy_lan = phy;
722                  }
723         }
724 
725         if (!default_phy && phy_home)
726                 default_phy = phy_home;
727         else if (!default_phy && phy_lan)
728                 default_phy = phy_lan;
729         else if (!default_phy)
730                 default_phy = sis_priv->first_mii;
731 
732         if (sis_priv->mii != default_phy) {
733                 sis_priv->mii = default_phy;
734                 sis_priv->cur_phy = default_phy->phy_addr;
735                 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
736                        pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
737         }
738 
739         sis_priv->mii_info.phy_id = sis_priv->cur_phy;
740 
741         status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
742         status &= (~MII_CNTL_ISOLATE);
743 
744         mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
745         status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
746         status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
747 
748         return status;
749 }
750 
751 
752 /**
753  *      sis900_set_capability - set the media capability of network adapter.
754  *      @net_dev : the net device to probe for
755  *      @phy : default PHY
756  *
757  *      Set the media capability of network adapter according to
758  *      mii status register. It's necessary before auto-negotiate.
759  */
760 
761 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
762 {
763         u16 cap;
764         u16 status;
765 
766         status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
767         status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
768 
769         cap = MII_NWAY_CSMA_CD |
770                 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
771                 ((phy->status & MII_STAT_CAN_TX)    ? MII_NWAY_TX:0) |
772                 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
773                 ((phy->status & MII_STAT_CAN_T)     ? MII_NWAY_T:0);
774 
775         mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
776 }
777 
778 
779 /* Delay between EEPROM clock transitions. */
780 #define eeprom_delay()  inl(ee_addr)
781 
782 /**
783  *      read_eeprom - Read Serial EEPROM
784  *      @ioaddr: base i/o address
785  *      @location: the EEPROM location to read
786  *
787  *      Read Serial EEPROM through EEPROM Access Register.
788  *      Note that location is in word (16 bits) unit
789  */
790 
791 static u16 __devinit read_eeprom(long ioaddr, int location)
792 {
793         int i;
794         u16 retval = 0;
795         long ee_addr = ioaddr + mear;
796         u32 read_cmd = location | EEread;
797 
798         outl(0, ee_addr);
799         eeprom_delay();
800         outl(EECS, ee_addr);
801         eeprom_delay();
802 
803         /* Shift the read command (9) bits out. */
804         for (i = 8; i >= 0; i--) {
805                 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
806                 outl(dataval, ee_addr);
807                 eeprom_delay();
808                 outl(dataval | EECLK, ee_addr);
809                 eeprom_delay();
810         }
811         outl(EECS, ee_addr);
812         eeprom_delay();
813 
814         /* read the 16-bits data in */
815         for (i = 16; i > 0; i--) {
816                 outl(EECS, ee_addr);
817                 eeprom_delay();
818                 outl(EECS | EECLK, ee_addr);
819                 eeprom_delay();
820                 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
821                 eeprom_delay();
822         }
823 
824         /* Terminate the EEPROM access. */
825         outl(0, ee_addr);
826         eeprom_delay();
827 
828         return (retval);
829 }
830 
831 /* Read and write the MII management registers using software-generated
832    serial MDIO protocol. Note that the command bits and data bits are
833    send out separately */
834 #define mdio_delay()    inl(mdio_addr)
835 
836 static void mdio_idle(long mdio_addr)
837 {
838         outl(MDIO | MDDIR, mdio_addr);
839         mdio_delay();
840         outl(MDIO | MDDIR | MDC, mdio_addr);
841 }
842 
843 /* Syncronize the MII management interface by shifting 32 one bits out. */
844 static void mdio_reset(long mdio_addr)
845 {
846         int i;
847 
848         for (i = 31; i >= 0; i--) {
849                 outl(MDDIR | MDIO, mdio_addr);
850                 mdio_delay();
851                 outl(MDDIR | MDIO | MDC, mdio_addr);
852                 mdio_delay();
853         }
854         return;
855 }
856 
857 /**
858  *      mdio_read - read MII PHY register
859  *      @net_dev: the net device to read
860  *      @phy_id: the phy address to read
861  *      @location: the phy regiester id to read
862  *
863  *      Read MII registers through MDIO and MDC
864  *      using MDIO management frame structure and protocol(defined by ISO/IEC).
865  *      Please see SiS7014 or ICS spec
866  */
867 
868 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
869 {
870         long mdio_addr = net_dev->base_addr + mear;
871         int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
872         u16 retval = 0;
873         int i;
874 
875         mdio_reset(mdio_addr);
876         mdio_idle(mdio_addr);
877 
878         for (i = 15; i >= 0; i--) {
879                 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
880                 outl(dataval, mdio_addr);
881                 mdio_delay();
882                 outl(dataval | MDC, mdio_addr);
883                 mdio_delay();
884         }
885 
886         /* Read the 16 data bits. */
887         for (i = 16; i > 0; i--) {
888                 outl(0, mdio_addr);
889                 mdio_delay();
890                 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
891                 outl(MDC, mdio_addr);
892                 mdio_delay();
893         }
894         outl(0x00, mdio_addr);
895 
896         return retval;
897 }
898 
899 /**
900  *      mdio_write - write MII PHY register
901  *      @net_dev: the net device to write
902  *      @phy_id: the phy address to write
903  *      @location: the phy regiester id to write
904  *      @value: the register value to write with
905  *
906  *      Write MII registers with @value through MDIO and MDC
907  *      using MDIO management frame structure and protocol(defined by ISO/IEC)
908  *      please see SiS7014 or ICS spec
909  */
910 
911 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
912                         int value)
913 {
914         long mdio_addr = net_dev->base_addr + mear;
915         int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
916         int i;
917 
918         mdio_reset(mdio_addr);
919         mdio_idle(mdio_addr);
920 
921         /* Shift the command bits out. */
922         for (i = 15; i >= 0; i--) {
923                 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
924                 outb(dataval, mdio_addr);
925                 mdio_delay();
926                 outb(dataval | MDC, mdio_addr);
927                 mdio_delay();
928         }
929         mdio_delay();
930 
931         /* Shift the value bits out. */
932         for (i = 15; i >= 0; i--) {
933                 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
934                 outl(dataval, mdio_addr);
935                 mdio_delay();
936                 outl(dataval | MDC, mdio_addr);
937                 mdio_delay();
938         }
939         mdio_delay();
940 
941         /* Clear out extra bits. */
942         for (i = 2; i > 0; i--) {
943                 outb(0, mdio_addr);
944                 mdio_delay();
945                 outb(MDC, mdio_addr);
946                 mdio_delay();
947         }
948         outl(0x00, mdio_addr);
949 
950         return;
951 }
952 
953