1 /*
2 * drivers/net/ibm_newemac/debug.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
5 *
6 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
7 * <benh@kernel.crashing.org>
8 *
9 * Based on the arch/ppc version of the driver:
10 *
11 * Copyright (c) 2004, 2005 Zultys Technologies
12 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 */
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/netdevice.h>
24 #include <linux/sysrq.h>
25 #include <asm/io.h>
26
27 #include "core.h"
28
29 static DEFINE_SPINLOCK(emac_dbg_lock);
30
31 static void emac_desc_dump(struct emac_instance *p)
32 {
33 int i;
34 printk("** EMAC %s TX BDs **\n"
35 " tx_cnt = %d tx_slot = %d ack_slot = %d\n",
36 p->ofdev->node->full_name,
37 p->tx_cnt, p->tx_slot, p->ack_slot);
38 for (i = 0; i < NUM_TX_BUFF / 2; ++i)
39 printk
40 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
41 i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
42 p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
43 NUM_TX_BUFF / 2 + i,
44 p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
45 p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
46 p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
47 p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
48
49 printk("** EMAC %s RX BDs **\n"
50 " rx_slot = %d flags = 0x%lx rx_skb_size = %d rx_sync_size = %d\n"
51 " rx_sg_skb = 0x%p\n",
52 p->ofdev->node->full_name,
53 p->rx_slot, p->commac.flags, p->rx_skb_size,
54 p->rx_sync_size, p->rx_sg_skb);
55 for (i = 0; i < NUM_RX_BUFF / 2; ++i)
56 printk
57 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
58 i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
59 p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
60 NUM_RX_BUFF / 2 + i,
61 p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
62 p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
63 p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
64 p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
65 }
66
67 static void emac_mac_dump(struct emac_instance *dev)
68 {
69 struct emac_regs __iomem *p = dev->emacp;
70
71 printk("** EMAC %s registers **\n"
72 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
73 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
74 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
75 "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
76 "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
77 "LSA = %04x%08x IPGVR = 0x%04x\n"
78 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
79 "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
80 dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1),
81 in_be32(&p->tmr0), in_be32(&p->tmr1),
82 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
83 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
84 in_be32(&p->vtci),
85 in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
86 in_be32(&p->iaht4),
87 in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
88 in_be32(&p->gaht4),
89 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
90 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
91 in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
92 );
93
94 emac_desc_dump(dev);
95 }
96
97 static void emac_mal_dump(struct mal_instance *mal)
98 {
99 int i;
100
101 printk("** MAL %s Registers **\n"
102 "CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
103 "TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
104 "RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
105 mal->ofdev->node->full_name,
106 get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
107 get_mal_dcrn(mal, MAL_IER),
108 get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
109 get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
110 get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
111 get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
112 );
113
114 printk("TX|");
115 for (i = 0; i < mal->num_tx_chans; ++i) {
116 if (i && !(i % 4))
117 printk("\n ");
118 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
119 }
120 printk("\nRX|");
121 for (i = 0; i < mal->num_rx_chans; ++i) {
122 if (i && !(i % 4))
123 printk("\n ");
124 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
125 }
126 printk("\n ");
127 for (i = 0; i < mal->num_rx_chans; ++i) {
128 u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
129 if (i && !(i % 3))
130 printk("\n ");
131 printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
132 }
133 printk("\n");
134 }
135
136 static struct emac_instance *__emacs[4];
137 static struct mal_instance *__mals[1];
138
139 void emac_dbg_register(struct emac_instance *dev)
140 {
141 unsigned long flags;
142 int i;
143
144 spin_lock_irqsave(&emac_dbg_lock, flags);
145 for (i = 0; i < ARRAY_SIZE(__emacs); i++)
146 if (__emacs[i] == NULL) {
147 __emacs[i] = dev;
148 break;
149 }
150 spin_unlock_irqrestore(&emac_dbg_lock, flags);
151 }
152
153 void emac_dbg_unregister(struct emac_instance *dev)
154 {
155 unsigned long flags;
156 int i;
157
158 spin_lock_irqsave(&emac_dbg_lock, flags);
159 for (i = 0; i < ARRAY_SIZE(__emacs); i++)
160 if (__emacs[i] == dev) {
161 __emacs[i] = NULL;
162 break;
163 }
164 spin_unlock_irqrestore(&emac_dbg_lock, flags);
165 }
166
167 void mal_dbg_register(struct mal_instance *mal)
168 {
169 unsigned long flags;
170 int i;
171
172 spin_lock_irqsave(&emac_dbg_lock, flags);
173 for (i = 0; i < ARRAY_SIZE(__mals); i++)
174 if (__mals[i] == NULL) {
175 __mals[i] = mal;
176 break;
177 }
178 spin_unlock_irqrestore(&emac_dbg_lock, flags);
179 }
180
181 void mal_dbg_unregister(struct mal_instance *mal)
182 {
183 unsigned long flags;
184 int i;
185
186 spin_lock_irqsave(&emac_dbg_lock, flags);
187 for (i = 0; i < ARRAY_SIZE(__mals); i++)
188 if (__mals[i] == mal) {
189 __mals[i] = NULL;
190 break;
191 }
192 spin_unlock_irqrestore(&emac_dbg_lock, flags);
193 }
194
195 void emac_dbg_dump_all(void)
196 {
197 unsigned int i;
198 unsigned long flags;
199
200 spin_lock_irqsave(&emac_dbg_lock, flags);
201
202 for (i = 0; i < ARRAY_SIZE(__mals); ++i)
203 if (__mals[i])
204 emac_mal_dump(__mals[i]);
205
206 for (i = 0; i < ARRAY_SIZE(__emacs); ++i)
207 if (__emacs[i])
208 emac_mac_dump(__emacs[i]);
209
210 spin_unlock_irqrestore(&emac_dbg_lock, flags);
211 }
212
213 #if defined(CONFIG_MAGIC_SYSRQ)
214 static void emac_sysrq_handler(int key, struct tty_struct *tty)
215 {
216 emac_dbg_dump_all();
217 }
218
219 static struct sysrq_key_op emac_sysrq_op = {
220 .handler = emac_sysrq_handler,
221 .help_msg = "emaC",
222 .action_msg = "Show EMAC(s) status",
223 };
224
225 int __init emac_init_debug(void)
226 {
227 return register_sysrq_key('c', &emac_sysrq_op);
228 }
229
230 void __exit emac_fini_debug(void)
231 {
232 unregister_sysrq_key('c', &emac_sysrq_op);
233 }
234
235 #else
236 int __init emac_init_debug(void)
237 {
238 return 0;
239 }
240 void __exit emac_fini_debug(void)
241 {
242 }
243 #endif /* CONFIG_MAGIC_SYSRQ */
244
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