1 /* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146 #include <linux/module.h>
147 #include <linux/kernel.h>
148 #include <linux/string.h>
149 #include <linux/errno.h>
150 #include <linux/ioport.h>
151 #include <linux/slab.h>
152 #include <linux/interrupt.h>
153 #include <linux/delay.h>
154 #include <linux/init.h>
155 #include <linux/crc32.h>
156 #include <linux/netdevice.h>
157 #include <linux/etherdevice.h>
158 #include <linux/skbuff.h>
159 #include <linux/ethtool.h>
160 #include <linux/time.h>
161 #include <linux/types.h>
162 #include <linux/unistd.h>
163 #include <linux/ctype.h>
164 #include <linux/bitops.h>
165
166 #include <asm/io.h>
167 #include <asm/dma.h>
168 #include <asm/uaccess.h>
169
170 #include "ewrk3.h"
171
172 #define DRV_NAME "ewrk3"
173 #define DRV_VERSION "0.48"
174
175 static char version[] __initdata =
176 DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178 #ifdef EWRK3_DEBUG
179 static int ewrk3_debug = EWRK3_DEBUG;
180 #else
181 static int ewrk3_debug = 1;
182 #endif
183
184 #define EWRK3_NDA 0xffe0 /* No Device Address */
185
186 #define PROBE_LENGTH 32
187 #define ETH_PROM_SIG 0xAA5500FFUL
188
189 #ifndef EWRK3_SIGNATURE
190 #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191 #define EWRK3_STRLEN 8
192 #endif
193
194 #ifndef EWRK3_RAM_BASE_ADDRESSES
195 #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196 #endif
197
198 /*
199 ** Sets up the I/O area for the autoprobe.
200 */
201 #define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202 #define EWRK3_IOP_INC 0x20 /* I/O address increment */
203 #define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205 #ifndef MAX_NUM_EWRK3S
206 #define MAX_NUM_EWRK3S 21
207 #endif
208
209 #ifndef EWRK3_EISA_IO_PORTS
210 #define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211 #endif
212
213 #ifndef MAX_EISA_SLOTS
214 #define MAX_EISA_SLOTS 16
215 #define EISA_SLOT_INC 0x1000
216 #endif
217
218 #define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220 /*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223 #define IO_ONLY 0x00
224 #define SHMEM_2K 0x800
225 #define SHMEM_32K 0x8000
226 #define SHMEM_64K 0x10000
227
228 /*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231 #define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234 }
235
236 #define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240 }
241
242 /*
243 ** EtherWORKS 3 START/STOP
244 */
245 #define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249 }
250
251 #define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254 }
255
256 /*
257 ** The EtherWORKS 3 private structure
258 */
259 #define EWRK3_PKT_STAT_SZ 16
260 #define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263 struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271 };
272
273 struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 u_long shmem_length; /* Shared memory window length */
277 struct net_device_stats stats; /* Public stats */
278 struct ewrk3_stats pktStats; /* Private stats counters */
279 u_char irq_mask; /* Adapter IRQ mask bits */
280 u_char mPage; /* Maximum 2kB Page number */
281 u_char lemac; /* Chip rev. level */
282 u_char hard_strapped; /* Don't allow a full open */
283 u_char txc; /* Transmit cut through */
284 u_char *mctbl; /* Pointer to the multicast table */
285 u_char led_mask; /* Used to reserve LED access for ethtool */
286 spinlock_t hw_lock;
287 };
288
289 /*
290 ** Force the EtherWORKS 3 card to be in 2kB MODE
291 */
292 #define FORCE_2K_MODE { \
293 shmem_length = SHMEM_2K;\
294 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
295 }
296
297 /*
298 ** Public Functions
299 */
300 static int ewrk3_open(struct net_device *dev);
301 static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
302 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id, struct pt_regs *regs);
303 static int ewrk3_close(struct net_device *dev);
304 static struct net_device_stats *ewrk3_get_stats(struct net_device *dev);
305 static void set_multicast_list(struct net_device *dev);
306 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
307 static struct ethtool_ops ethtool_ops_203;
308 static struct ethtool_ops ethtool_ops;
309
310 /*
311 ** Private functions
312 */
313 static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
314 static void ewrk3_init(struct net_device *dev);
315 static int ewrk3_rx(struct net_device *dev);
316 static int ewrk3_tx(struct net_device *dev);
317 static void ewrk3_timeout(struct net_device *dev);
318
319 static void EthwrkSignature(char *name, char *eeprom_image);
320 static int DevicePresent(u_long iobase);
321 static void SetMulticastFilter(struct net_device *dev);
322 static int EISA_signature(char *name, s32 eisa_id);
323
324 static int Read_EEPROM(u_long iobase, u_char eaddr);
325 static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
326 static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
327
328 static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
329 static int isa_probe(struct net_device *dev, u_long iobase);
330 static int eisa_probe(struct net_device *dev, u_long iobase);
331
332 static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
333
334 static char name[EWRK3_STRLEN + 1];
335 static int num_ewrks3s;
336
337 /*
338 ** Miscellaneous defines...
339 */
340 #define INIT_EWRK3 {\
341 outb(EEPROM_INIT, EWRK3_IOPR);\
342 mdelay(1);\
343 }
344
345 #ifndef MODULE
346 struct net_device * __init ewrk3_probe(int unit)
347 {
348 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
349 int err;
350
351 if (!dev)
352 return ERR_PTR(-ENOMEM);
353
354 if (unit >= 0) {
355 sprintf(dev->name, "eth%d", unit);
356 netdev_boot_setup_check(dev);
357 }
358 SET_MODULE_OWNER(dev);
359
360 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
361 if (err)
362 goto out;
363 return dev;
364 out:
365 free_netdev(dev);
366 return ERR_PTR(err);
367
368 }
369 #endif
370
371 static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
372 {
373 int err;
374
375 dev->base_addr = iobase;
376 dev->irq = irq;
377
378 /* Address PROM pattern */
379 err = isa_probe(dev, iobase);
380 if (err != 0)
381 err = eisa_probe(dev, iobase);
382
383 if (err)
384 return err;
385
386 err = register_netdev(dev);
387 if (err)
388 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
389
390 return err;
391 }
392
393 static int __init
394 ewrk3_hw_init(struct net_device *dev, u_long iobase)
395 {
396 struct ewrk3_private *lp;
397 int i, status = 0;
398 u_long mem_start, shmem_length;
399 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
400 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
401
402 /*
403 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
404 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
405 */
406 if (iobase > 0x400)
407 eisa_cr = inb(EISA_CR);
408 INIT_EWRK3;
409
410 nicsr = inb(EWRK3_CSR);
411
412 icr = inb(EWRK3_ICR);
413 icr &= 0x70;
414 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
415
416 if (nicsr == (CSR_TXD | CSR_RXD))
417 return -ENXIO;
418
419
420 /* Check that the EEPROM is alive and well and not living on Pluto... */
421 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
422 union {
423 short val;
424 char c[2];
425 } tmp;
426
427 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
428 eeprom_image[i] = tmp.c[0];
429 eeprom_image[i + 1] = tmp.c[1];
430 chksum += eeprom_image[i] + eeprom_image[i + 1];
431 }
432
433 if (chksum != 0) { /* Bad EEPROM Data! */
434 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
435 return -ENXIO;
436 }
437
438 EthwrkSignature(name, eeprom_image);
439 if (*name == '\0')
440 return -ENXIO;
441
442 dev->base_addr = iobase;
443
444 if (iobase > 0x400) {
445 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
446 }
447 lemac = eeprom_image[EEPROM_CHIPVER];
448 cmr = inb(EWRK3_CMR);
449
450 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
451 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
452 printk("%s: %s at %#4lx", dev->name, name, iobase);
453 hard_strapped = 1;
454 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
455 /* EISA slot address */
456 printk("%s: %s at %#4lx (EISA slot %ld)",
457 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
458 } else { /* ISA port address */
459 printk("%s: %s at %#4lx", dev->name, name, iobase);
460 }
461
462 printk(", h/w address ");
463 if (lemac != LeMAC2)
464 DevicePresent(iobase); /* need after EWRK3_INIT */
465 status = get_hw_addr(dev, eeprom_image, lemac);
466 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
467 printk("%2.2x:", dev->dev_addr[i]);
468 }
469 printk("%2.2x,\n", dev->dev_addr[i]);
470
471 if (status) {
472 printk(" which has an EEPROM CRC error.\n");
473 return -ENXIO;
474 }
475
476 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
477 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
478 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
479 cmr |= CMR_RA;
480 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
481 cmr |= CMR_WB;
482 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
483 cmr |= CMR_POLARITY;
484 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
485 cmr |= CMR_LINK;
486 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
487 cmr |= CMR_0WS;
488 }
489 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
490 cmr |= CMR_DRAM;
491 outb(cmr, EWRK3_CMR);
492
493 cr = inb(EWRK3_CR); /* Set up the Control Register */
494 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
495 if (cr & SETUP_APD)
496 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
497 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
498 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
499 outb(cr, EWRK3_CR);
500
501 /*
502 ** Determine the base address and window length for the EWRK3
503 ** RAM from the memory base register.
504 */
505 mem_start = inb(EWRK3_MBR);
506 shmem_length = 0;
507 if (mem_start != 0) {
508 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
509 mem_start *= SHMEM_64K;
510 shmem_length = SHMEM_64K;
511 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
512 mem_start *= SHMEM_32K;
513 shmem_length = SHMEM_32K;
514 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
515 mem_start = mem_start * SHMEM_2K + 0x80000;
516 shmem_length = SHMEM_2K;
517 } else {
518 return -ENXIO;
519 }
520 }
521 /*
522 ** See the top of this source code for comments about
523 ** uncommenting this line.
524 */
525 /* FORCE_2K_MODE; */
526
527 if (hard_strapped) {
528 printk(" is hard strapped.\n");
529 } else if (mem_start) {
530 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
531 printk(" at 0x%.5lx", mem_start);
532 } else {
533 printk(" is in I/O only mode");
534 }
535
536 lp = netdev_priv(dev);
537 lp->shmem_base = mem_start;
538 lp->shmem_length = shmem_length;
539 lp->lemac = lemac;
540 lp->hard_strapped = hard_strapped;
541 lp->led_mask = CR_LED;
542 spin_lock_init(&lp->hw_lock);
543
544 lp->mPage = 64;
545 if (cmr & CMR_DRAM)
546 lp->mPage <<= 1; /* 2 DRAMS on module */
547
548 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
549
550 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
551
552 if (!hard_strapped) {
553 /*
554 ** Enable EWRK3 board interrupts for autoprobing
555 */
556 icr |= ICR_IE; /* Enable interrupts */
557 outb(icr, EWRK3_ICR);
558
559 /* The DMA channel may be passed in on this parameter. */
560 dev->dma = 0;
561
562 /* To auto-IRQ we enable the initialization-done and DMA err,
563 interrupts. For now we will always get a DMA error. */
564 if (dev->irq < 2) {
565 #ifndef MODULE
566 u_char irqnum;
567 unsigned long irq_mask;
568
569
570 irq_mask = probe_irq_on();
571
572 /*
573 ** Trigger a TNE interrupt.
574 */
575 icr |= ICR_TNEM;
576 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
577 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
578
579 irqnum = irq[((icr & IRQ_SEL) >> 4)];
580
581 mdelay(20);
582 dev->irq = probe_irq_off(irq_mask);
583 if ((dev->irq) && (irqnum == dev->irq)) {
584 printk(" and uses IRQ%d.\n", dev->irq);
585 } else {
586 if (!dev->irq) {
587 printk(" and failed to detect IRQ line.\n");
588 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
589 printk(" and an illegal IRQ line detected.\n");
590 } else {
591 printk(", but incorrect IRQ line detected.\n");
592 }
593 return -ENXIO;
594 }
595
596 DISABLE_IRQs; /* Mask all interrupts */
597
598 #endif /* MODULE */
599 } else {
600 printk(" and requires IRQ%d.\n", dev->irq);
601 }
602 }
603
604 if (ewrk3_debug > 1) {
605 printk(version);
606 }
607 /* The EWRK3-specific entries in the device structure. */
608 dev->open = ewrk3_open;
609 dev->hard_start_xmit = ewrk3_queue_pkt;
610 dev->stop = ewrk3_close;
611 dev->get_stats = ewrk3_get_stats;
612 dev->set_multicast_list = set_multicast_list;
613 dev->do_ioctl = ewrk3_ioctl;
614 if (lp->adapter_name[4] == '3')
615 SET_ETHTOOL_OPS(dev, ðtool_ops_203);
616 else
617 SET_ETHTOOL_OPS(dev, ðtool_ops);
618 dev->tx_timeout = ewrk3_timeout;
619 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
620
621 dev->mem_start = 0;
622
623 return 0;
624 }
625
626
627 static int ewrk3_open(struct net_device *dev)
628 {
629 struct ewrk3_private *lp = netdev_priv(dev);
630 u_long iobase = dev->base_addr;
631 int i, status = 0;
632 u_char icr, csr;
633
634 /*
635 ** Stop the TX and RX...
636 */
637 STOP_EWRK3;
638
639 if (!lp->hard_strapped) {
640 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
641 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
642 status = -EAGAIN;
643 } else {
644
645 /*
646 ** Re-initialize the EWRK3...
647 */
648 ewrk3_init(dev);
649
650 if (ewrk3_debug > 1) {
651 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
652 printk(" physical address: ");
653 for (i = 0; i < 5; i++) {
654 printk("%2.2x:", (u_char) dev->dev_addr[i]);
655 }
656 printk("%2.2x\n", (u_char) dev->dev_addr[i]);
657 if (lp->shmem_length == 0) {
658 printk(" no shared memory, I/O only mode\n");
659 } else {
660 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
661 printk(" window length: 0x%04lx\n", lp->shmem_length);
662 }
663 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
664 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
665 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
666 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
667 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
668 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
669 }
670 netif_start_queue(dev);
671 /*
672 ** Unmask EWRK3 board interrupts
673 */
674 icr = inb(EWRK3_ICR);
675 ENABLE_IRQs;
676
677 }
678 } else {
679 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
680 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
681 return -EINVAL;
682 }
683
684 return status;
685 }
686
687 /*
688 ** Initialize the EtherWORKS 3 operating conditions
689 */
690 static void ewrk3_init(struct net_device *dev)
691 {
692 struct ewrk3_private *lp = netdev_priv(dev);
693 u_char csr, page;
694 u_long iobase = dev->base_addr;
695 int i;
696
697 /*
698 ** Enable any multicasts
699 */
700 set_multicast_list(dev);
701
702 /*
703 ** Set hardware MAC address. Address is initialized from the EEPROM
704 ** during startup but may have since been changed by the user.
705 */
706 for (i=0; i<ETH_ALEN; i++)
707 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
708
709 /*
710 ** Clean out any remaining entries in all the queues here
711 */
712 while (inb(EWRK3_TQ));
713 while (inb(EWRK3_TDQ));
714 while (inb(EWRK3_RQ));
715 while (inb(EWRK3_FMQ));
716
717 /*
718 ** Write a clean free memory queue
719 */
720 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
721 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
722 }
723
724 START_EWRK3; /* Enable the TX and/or RX */
725 }
726
727 /*
728 * Transmit timeout
729 */
730
731 static void ewrk3_timeout(struct net_device *dev)
732 {
733 struct ewrk3_private *lp = netdev_priv(dev);
734 u_char icr, csr;
735 u_long iobase = dev->base_addr;
736
737 if (!lp->hard_strapped)
738 {
739 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
740 dev->name, inb(EWRK3_CSR));
741
742 /*
743 ** Mask all board interrupts
744 */
745 DISABLE_IRQs;
746
747 /*
748 ** Stop the TX and RX...
749 */
750 STOP_EWRK3;
751
752 ewrk3_init(dev);
753
754 /*
755 ** Unmask EWRK3 board interrupts
756 */
757 ENABLE_IRQs;
758
759 dev->trans_start = jiffies;
760 netif_wake_queue(dev);
761 }
762 }
763
764 /*
765 ** Writes a socket buffer to the free page queue
766 */
767 static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
768 {
769 struct ewrk3_private *lp = netdev_priv(dev);
770 u_long iobase = dev->base_addr;
771 u_long buf = 0;
772 u_char icr;
773 u_char page;
774
775 spin_lock_irq (&lp->hw_lock);
776 DISABLE_IRQs;
777
778 /* if no resources available, exit, request packet be queued */
779 if (inb (EWRK3_FMQC) == 0) {
780 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
781 dev->name);
782 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
783 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
784 inb (EWRK3_FMQC));
785 goto err_out;
786 }
787
788 /*
789 ** Get a free page from the FMQ
790 */
791 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
792 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
793 (u_char) page);
794 goto err_out;
795 }
796
797
798 /*
799 ** Set up shared memory window and pointer into the window
800 */
801 if (lp->shmem_length == IO_ONLY) {
802 outb (page, EWRK3_IOPR);
803 } else if (lp->shmem_length == SHMEM_2K) {
804 buf = lp->shmem_base;
805 outb (page, EWRK3_MPR);
806 } else if (lp->shmem_length == SHMEM_32K) {
807 buf = ((((short) page << 11) & 0x7800) + lp->shmem_base);
808 outb ((page >> 4), EWRK3_MPR);
809 } else if (lp->shmem_length == SHMEM_64K) {
810 buf = ((((short) page << 11) & 0xf800) + lp->shmem_base);
811 outb ((page >> 5), EWRK3_MPR);
812 } else {
813 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
814 dev->name);
815 BUG ();
816 }
817
818 /*
819 ** Set up the buffer control structures and copy the data from
820 ** the socket buffer to the shared memory .
821 */
822 if (lp->shmem_length == IO_ONLY) {
823 int i;
824 u_char *p = skb->data;
825 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
826 outb ((char) (skb->len & 0xff), EWRK3_DATA);
827 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
828 outb ((char) 0x04, EWRK3_DATA);
829 for (i = 0; i < skb->len; i++) {
830 outb (*p++, EWRK3_DATA);
831 }
832 outb (page, EWRK3_TQ); /* Start sending pkt */
833 } else {
834 isa_writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
835 buf += 1;
836 isa_writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
837 buf += 1;
838 if (lp->txc) {
839 isa_writeb ((char)
840 (((skb->len >> 8) & 0xff) | XCT), buf);
841 buf += 1;
842 isa_writeb (0x04, buf); /* index byte */
843 buf += 1;
844 isa_writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
845 isa_memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
846 outb (page, EWRK3_TQ); /* Start sending pkt */
847 isa_memcpy_toio (buf + PRELOAD,
848 skb->data + PRELOAD,
849 skb->len - PRELOAD);
850 isa_writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
851 } else {
852 isa_writeb ((char)
853 ((skb->len >> 8) & 0xff), buf);
854 buf += 1;
855 isa_writeb (0x04, buf); /* index byte */
856 buf += 1;
857 isa_memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
858 outb (page, EWRK3_TQ); /* Start sending pkt */
859 }
860 }
861
862 ENABLE_IRQs;
863 spin_unlock_irq (&lp->hw_lock);
864
865 lp->stats.tx_bytes += skb->len;
866 dev->trans_start = jiffies;
867 dev_kfree_skb (skb);
868
869 /* Check for free resources: stop Tx queue if there are none */
870 if (inb (EWRK3_FMQC) == 0)
871 netif_stop_queue (dev);
872
873 return 0;
874
875 err_out:
876 ENABLE_IRQs;
877 spin_unlock_irq (&lp->hw_lock);
878 return 1;
879 }
880
881 /*
882 ** The EWRK3 interrupt handler.
883 */
884 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
885 {
886 struct net_device *dev = dev_id;
887 struct ewrk3_private *lp;
888 u_long iobase;
889 u_char icr, cr, csr;
890
891 lp = netdev_priv(dev);
892 iobase = dev->base_addr;
893
894 /* get the interrupt information */
895 csr = inb(EWRK3_CSR);
896
897 /*
898 ** Mask the EWRK3 board interrupts and turn on the LED
899 */
900 spin_lock(&lp->hw_lock);
901 DISABLE_IRQs;
902
903 cr = inb(EWRK3_CR);
904 cr |= lp->led_mask;
905 outb(cr, EWRK3_CR);
906
907 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
908 ewrk3_rx(dev);
909
910 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
911 ewrk3_tx(dev);
912
913 /*
914 ** Now deal with the TX/RX disable flags. These are set when there
915 ** are no more resources. If resources free up then enable these
916 ** interrupts, otherwise mask them - failure to do this will result
917 ** in the system hanging in an interrupt loop.
918 */
919 if (inb(EWRK3_FMQC)) { /* any resources available? */
920 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
921 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
922 outb(csr, EWRK3_CSR);
923 netif_wake_queue(dev);
924 } else {
925 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
926 }
927
928 /* Unmask the EWRK3 board interrupts and turn off the LED */
929 cr &= ~(lp->led_mask);
930 outb(cr, EWRK3_CR);
931 ENABLE_IRQs;
932 spin_unlock(&lp->hw_lock);
933 return IRQ_HANDLED;
934 }
935
936 /* Called with lp->hw_lock held */
937 static int ewrk3_rx(struct net_device *dev)
938 {
939 struct ewrk3_private *lp = netdev_priv(dev);
940 u_long iobase = dev->base_addr;
941 int i, status = 0;
942 u_char page;
943 u_long buf = 0;
944
945 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
946 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
947 /*
948 ** Set up shared memory window and pointer into the window
949 */
950 if (lp->shmem_length == IO_ONLY) {
951 outb(page, EWRK3_IOPR);
952 } else if (lp->shmem_length == SHMEM_2K) {
953 buf = lp->shmem_base;
954 outb(page, EWRK3_MPR);
955 } else if (lp->shmem_length == SHMEM_32K) {
956 buf = ((((short) page << 11) & 0x7800) + lp->shmem_base);
957 outb((page >> 4), EWRK3_MPR);
958 } else if (lp->shmem_length == SHMEM_64K) {
959 buf = ((((short) page << 11) & 0xf800) + lp->shmem_base);
960 outb((page >> 5), EWRK3_MPR);
961 } else {
962 status = -1;
963 printk("%s: Oops - your private data area is hosed!\n", dev->name);
964 }
965
966 if (!status) {
967 char rx_status;
968 int pkt_len;
969
970 if (lp->shmem_length == IO_ONLY) {
971 rx_status = inb(EWRK3_DATA);
972 pkt_len = inb(EWRK3_DATA);
973 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
974 } else {
975 rx_status = isa_readb(buf);
976 buf += 1;
977 pkt_len = isa_readw(buf);
978 buf += 3;
979 }
980
981 if (!(rx_status & R_ROK)) { /* There was an error. */
982 lp->stats.rx_errors++; /* Update the error stats. */
983 if (rx_status & R_DBE)
984 lp->stats.rx_frame_errors++;
985 if (rx_status & R_CRC)
986 lp->stats.rx_crc_errors++;
987 if (rx_status & R_PLL)
988 lp->stats.rx_fifo_errors++;
989 } else {
990 struct sk_buff *skb;
991
992 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
993 unsigned char *p;
994 skb->dev = dev;
995 skb_reserve(skb, 2); /* Align to 16 bytes */
996 p = skb_put(skb, pkt_len);
997
998 if (lp->shmem_length == IO_ONLY) {
999 *p = inb(EWRK3_DATA); /* dummy read */
1000 for (i = 0; i < pkt_len; i++) {
1001 *p++ = inb(EWRK3_DATA);
1002 }
1003 } else {
1004 isa_memcpy_fromio(p, buf, pkt_len);
1005 }
1006
1007 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1008 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1009 lp->pktStats.bins[i]++;
1010 i = EWRK3_PKT_STAT_SZ;
1011 }
1012 }
1013 p = skb->data; /* Look at the dest addr */
1014 if (p[0] & 0x01) { /* Multicast/Broadcast */
1015 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1016 lp->pktStats.broadcast++;
1017 } else {
1018 lp->pktStats.multicast++;
1019 }
1020 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1021 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1022 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1023 lp->pktStats.unicast++;
1024 }
1025 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1026 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1027 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1028 }
1029 /*
1030 ** Notify the upper protocol layers that there is another
1031 ** packet to handle
1032 */
1033 skb->protocol = eth_type_trans(skb, dev);
1034 netif_rx(skb);
1035
1036 /*
1037 ** Update stats
1038 */
1039 dev->last_rx = jiffies;
1040 lp->stats.rx_packets++;
1041 lp->stats.rx_bytes += pkt_len;
1042 } else {
1043 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1044 lp->stats.rx_dropped++; /* Really, deferred. */
1045 break;
1046 }
1047 }
1048 }
1049 /*
1050 ** Return the received buffer to the free memory queue
1051 */
1052 outb(page, EWRK3_FMQ);
1053 } else {
1054 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1055 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1056 }
1057 }
1058 return status;
1059 }
1060
1061 /*
1062 ** Buffer sent - check for TX buffer errors.
1063 ** Called with lp->hw_lock held
1064 */
1065 static int ewrk3_tx(struct net_device *dev)
1066 {
1067 struct ewrk3_private *lp = netdev_priv(dev);
1068 u_long iobase = dev->base_addr;
1069 u_char tx_status;
1070
1071 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1072 if (tx_status & T_VSTS) { /* The status is valid */
1073 if (tx_status & T_TXE) {
1074 lp->stats.tx_errors++;
1075 if (tx_status & T_NCL)
1076 lp->stats.tx_carrier_errors++;
1077 if (tx_status & T_LCL)
1078 lp->stats.tx_window_errors++;
1079 if (tx_status & T_CTU) {
1080 if ((tx_status & T_COLL) ^ T_XUR) {
1081 lp->pktStats.tx_underruns++;
1082 } else {
1083 lp->pktStats.excessive_underruns++;
1084 }
1085 } else if (tx_status & T_COLL) {
1086 if ((tx_status & T_COLL) ^ T_XCOLL) {
1087 lp->stats.collisions++;
1088 } else {
1089 lp->pktStats.excessive_collisions++;
1090 }
1091 }
1092 } else {
1093 lp->stats.tx_packets++;
1094 }
1095 }
1096 }
1097
1098 return 0;
1099 }
1100
1101 static int ewrk3_close(struct net_device *dev)
1102 {
1103 struct ewrk3_private *lp = netdev_priv(dev);
1104 u_long iobase = dev->base_addr;
1105 u_char icr, csr;
1106
1107 netif_stop_queue(dev);
1108
1109 if (ewrk3_debug > 1) {
1110 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1111 dev->name, inb(EWRK3_CSR));
1112 }
1113 /*
1114 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1115 */
1116 DISABLE_IRQs;
1117
1118 STOP_EWRK3;
1119
1120 /*
1121 ** Clean out the TX and RX queues here (note that one entry
1122 ** may get added to either the TXD or RX queues if the TX or RX
1123 ** just starts processing a packet before the STOP_EWRK3 command
1124 ** is received. This will be flushed in the ewrk3_open() call).
1125 */
1126 while (inb(EWRK3_TQ));
1127 while (inb(EWRK3_TDQ));
1128 while (inb(EWRK3_RQ));
1129
1130 if (!lp->hard_strapped) {
1131 free_irq(dev->irq, dev);
1132 }
1133 return 0;
1134 }
1135
1136 static struct net_device_stats *ewrk3_get_stats(struct net_device *dev)
1137 {
1138 struct ewrk3_private *lp = netdev_priv(dev);
1139
1140 /* Null body since there is no framing error counter */
1141 return &lp->stats;
1142 }
1143
1144 /*
1145 ** Set or clear the multicast filter for this adapter.
1146 */
1147 static void set_multicast_list(struct net_device *dev)
1148 {
1149 struct ewrk3_private *lp = netdev_priv(dev);
1150 u_long iobase = dev->base_addr;
1151 u_char csr;
1152
1153 csr = inb(EWRK3_CSR);
1154
1155 if (lp->shmem_length == IO_ONLY) {
1156 lp->mctbl = (char *) PAGE0_HTE;
1157 } else {
1158 lp->mctbl = (char *) (lp->shmem_base + PAGE0_HTE);
1159 }
1160
1161 csr &= ~(CSR_PME | CSR_MCE);
1162 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1163 csr |= CSR_PME;
1164 outb(csr, EWRK3_CSR);
1165 } else {
1166 SetMulticastFilter(dev);
1167 csr |= CSR_MCE;
1168 outb(csr, EWRK3_CSR);
1169 }
1170 }
1171
1172 /*
1173 ** Calculate the hash code and update the logical address filter
1174 ** from a list of ethernet multicast addresses.
1175 ** Little endian crc one liner from Matt Thomas, DEC.
1176 **
1177 ** Note that when clearing the table, the broadcast bit must remain asserted
1178 ** to receive broadcast messages.
1179 */
1180 static void SetMulticastFilter(struct net_device *dev)
1181 {
1182 struct ewrk3_private *lp = netdev_priv(dev);
1183 struct dev_mc_list *dmi = dev->mc_list;
1184 u_long iobase = dev->base_addr;
1185 int i;
1186 char *addrs, bit, byte;
1187 short *p = (short *) lp->mctbl;
1188 u16 hashcode;
1189 u32 crc;
1190
1191 spin_lock_irq(&lp->hw_lock);
1192
1193 if (lp->shmem_length == IO_ONLY) {
1194 outb(0, EWRK3_IOPR);
1195 outw(EEPROM_OFFSET(lp->mctbl), EWRK3_PIR1);
1196 } else {
1197 outb(0, EWRK3_MPR);
1198 }
1199
1200 if (dev->flags & IFF_ALLMULTI) {
1201 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1202 if (lp->shmem_length == IO_ONLY) {
1203 outb(0xff, EWRK3_DATA);
1204 } else { /* memset didn't work here */
1205 isa_writew(0xffff, (int) p);
1206 p++;
1207 i++;
1208 }
1209 }
1210 } else {
1211 /* Clear table except for broadcast bit */
1212 if (lp->shmem_length == IO_ONLY) {
1213 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1214 outb(0x00, EWRK3_DATA);
1215 }
1216 outb(0x80, EWRK3_DATA);
1217 i++; /* insert the broadcast bit */
1218 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1219 outb(0x00, EWRK3_DATA);
1220 }
1221 } else {
1222 isa_memset_io((int) lp->mctbl, 0, (HASH_TABLE_LEN >> 3));
1223 isa_writeb(0x80, (int) (lp->mctbl + (HASH_TABLE_LEN >> 4) - 1));
1224 }
1225
1226 /* Update table */
1227 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1228 addrs = dmi->dmi_addr;
1229 dmi = dmi->next;
1230 if ((*addrs & 0x01) == 1) { /* multicast address? */
1231 crc = ether_crc_le(ETH_ALEN, addrs);
1232 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1233
1234 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1235 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1236
1237 if (lp->shmem_length == IO_ONLY) {
1238 u_char tmp;
1239
1240 outw((short) ((long) lp->mctbl) + byte, EWRK3_PIR1);
1241 tmp = inb(EWRK3_DATA);
1242 tmp |= bit;
1243 outw((short) ((long) lp->mctbl) + byte, EWRK3_PIR1);
1244 outb(tmp, EWRK3_DATA);
1245 } else {
1246 isa_writeb(isa_readb((int)(lp->mctbl + byte)) | bit, (int)(lp->mctbl + byte));
1247 }
1248 }
1249 }
1250 }
1251
1252 spin_unlock_irq(&lp->hw_lock);
1253 }
1254
1255 /*
1256 ** ISA bus I/O device probe
1257 */
1258 static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1259 {
1260 int i = num_ewrks3s, maxSlots;
1261 int ret = -ENODEV;
1262
1263 u_long iobase;
1264
1265 if (ioaddr >= 0x400)
1266 goto out;
1267
1268 if (ioaddr == 0) { /* Autoprobing */
1269 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1270 maxSlots = 24;
1271 } else { /* Probe a specific location */
1272 iobase = ioaddr;
1273 maxSlots = i + 1;
1274 }
1275
1276 for (; (i < maxSlots) && (dev != NULL);
1277 iobase += EWRK3_IOP_INC, i++)
1278 {
1279 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1280 if (DevicePresent(iobase) == 0) {
1281 int irq = dev->irq;
1282 ret = ewrk3_hw_init(dev, iobase);
1283 if (!ret)
1284 break;
1285 dev->irq = irq;
1286 }
1287 release_region(iobase, EWRK3_TOTAL_SIZE);
1288 }
1289 }
1290 out:
1291
1292 return ret;
1293 }
1294
1295 /*
1296 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1297 ** the motherboard.
1298 */
1299 static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1300 {
1301 int i, maxSlots;
1302 u_long iobase;
1303 int ret = -ENODEV;
1304
1305 if (ioaddr < 0x1000)
1306 goto out;
1307
1308 if (ioaddr == 0) { /* Autoprobing */
1309 iobase = EISA_SLOT_INC; /* Get the first slot address */
1310 i = 1;
1311 maxSlots = MAX_EISA_SLOTS;
1312 } else { /* Probe a specific location */
1313 iobase = ioaddr;
1314 i = (ioaddr >> 12);
1315 maxSlots = i + 1;
1316 }
1317
1318 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1319 if (EISA_signature(name, EISA_ID) == 0) {
1320 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1321 DevicePresent(iobase) == 0) {
1322 int irq = dev->irq;
1323 ret = ewrk3_hw_init(dev, iobase);
1324 if (!ret)
1325 break;
1326 dev->irq = irq;
1327 }
1328 release_region(iobase, EWRK3_TOTAL_SIZE);
1329 }
1330 }
1331
1332 out:
1333 return ret;
1334 }
1335
1336
1337 /*
1338 ** Read the EWRK3 EEPROM using this routine
1339 */
1340 static int Read_EEPROM(u_long iobase, u_char eaddr)
1341 {
1342 int i;
1343
1344 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1345 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1346 for (i = 0; i < 5000; i++)
1347 inb(EWRK3_CSR); /* wait 1msec */
1348
1349 return inw(EWRK3_EPROM1); /* 16 bits data return */
1350 }
1351
1352 /*
1353 ** Write the EWRK3 EEPROM using this routine
1354 */
1355 static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1356 {
1357 int i;
1358
1359 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1360 for (i = 0; i < 5000; i++)
1361 inb(EWRK3_CSR); /* wait 1msec */
1362 outw(data, EWRK3_EPROM1); /* write data to register */
1363 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1364 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1365 for (i = 0; i < 75000; i++)
1366 inb(EWRK3_CSR); /* wait 15msec */
1367 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1368 for (i = 0; i < 5000; i++)
1369 inb(EWRK3_CSR); /* wait 1msec */
1370
1371 return 0;
1372 }
1373
1374 /*
1375 ** Look for a particular board name in the on-board EEPROM.
1376 */
1377 static void __init EthwrkSignature(char *name, char *eeprom_image)
1378 {
1379 int i;
1380 char *signatures[] = EWRK3_SIGNATURE;
1381
1382 for (i=0; *signatures[i] != '\0'; i++)
1383 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1384 break;
1385
1386 if (*signatures[i] != '\0') {
1387 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1388 name[EWRK3_STRLEN] = '\0';
1389 } else
1390 name[0] = '\0';
1391
1392 return;
1393 }
1394
1395 /*
1396 ** Look for a special sequence in the Ethernet station address PROM that
1397 ** is common across all EWRK3 products.
1398 **
1399 ** Search the Ethernet address ROM for the signature. Since the ROM address
1400 ** counter can start at an arbitrary point, the search must include the entire
1401 ** probe sequence length plus the (length_of_the_signature - 1).
1402 ** Stop the search IMMEDIATELY after the signature is found so that the
1403 ** PROM address counter is correctly positioned at the start of the
1404 ** ethernet address for later read out.
1405 */
1406
1407 static int __init DevicePresent(u_long iobase)
1408 {
1409 union {
1410 struct {
1411 u32 a;
1412 u32 b;
1413 } llsig;
1414 char Sig[sizeof(u32) << 1];
1415 }
1416 dev;
1417 short sigLength;
1418 char data;
1419 int i, j, status = 0;
1420
1421 dev.llsig.a = ETH_PROM_SIG;
1422 dev.llsig.b = ETH_PROM_SIG;
1423 sigLength = sizeof(u32) << 1;
1424
1425 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1426 data = inb(EWRK3_APROM);
1427 if (dev.Sig[j] == data) { /* track signature */
1428 j++;
1429 } else { /* lost signature; begin search again */
1430 if (data == dev.Sig[0]) {
1431 j = 1;
1432 } else {
1433 j = 0;
1434 }
1435 }
1436 }
1437
1438 if (j != sigLength) {
1439 status = -ENODEV; /* search failed */
1440 }
1441 return status;
1442 }
1443
1444 static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1445 {
1446 int i, j, k;
1447 u_short chksum;
1448 u_char crc, lfsr, sd, status = 0;
1449 u_long iobase = dev->base_addr;
1450 u16 tmp;
1451
1452 if (chipType == LeMAC2) {
1453 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1454 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1455 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1456 for (k = 0; k < 8; k++, sd >>= 1) {
1457 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1458 crc = (crc >> 1) + lfsr;
1459 }
1460 }
1461 if (crc != eeprom_image[EEPROM_PA_CRC])
1462 status = -1;
1463 } else {
1464 for (i = 0, k = 0; i < ETH_ALEN;) {
1465 k <<= 1;
1466 if (k > 0xffff)
1467 k -= 0xffff;
1468
1469 k += (u_char) (tmp = inb(EWRK3_APROM));
1470 dev->dev_addr[i] = (u_char) tmp;
1471 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1472 i++;
1473 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1474 dev->dev_addr[i] = (u_char) tmp;
1475 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1476 i++;
1477
1478 if (k > 0xffff)
1479 k -= 0xffff;
1480 }
1481 if (k == 0xffff)
1482 k = 0;
1483 chksum = inb(EWRK3_APROM);
1484 chksum |= (inb(EWRK3_APROM) << 8);
1485 if (k != chksum)
1486 status = -1;
1487 }
1488
1489 return status;
1490 }
1491
1492 /*
1493 ** Look for a particular board name in the EISA configuration space
1494 */
1495 static int __init EISA_signature(char *name, s32 eisa_id)
1496 {
1497 u_long i;
1498 char *signatures[] = EWRK3_SIGNATURE;
1499 char ManCode[EWRK3_STRLEN];
1500 union {
1501 s32 ID;
1502 char Id[4];
1503 } Eisa;
1504 int status = 0;
1505
1506 *name = '\0';
1507 for (i = 0; i < 4; i++) {
1508 Eisa.Id[i] = inb(eisa_id + i);
1509 }
1510
1511 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1512 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1513 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1514 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1515 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1516 ManCode[5] = '\0';
1517
1518 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1519 if (strstr(ManCode, signatures[i]) != NULL) {
1520 strcpy(name, ManCode);
1521 status = 1;
1522 }
1523 }
1524
1525 return status; /* return the device name string */
1526 }
1527
1528 static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1529 {
1530 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1531
1532 strcpy(info->driver, DRV_NAME);
1533 strcpy(info->version, DRV_VERSION);
1534 sprintf(info->fw_version, "%d", fwrev);
1535 strcpy(info->bus_info, "N/A");
1536 info->eedump_len = EEPROM_MAX;
1537 }
1538
1539 static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1540 {
1541 struct ewrk3_private *lp = netdev_priv(dev);
1542 unsigned long iobase = dev->base_addr;
1543 u8 cr = inb(EWRK3_CR);
1544
1545 switch (lp->adapter_name[4]) {
1546 case '3': /* DE203 */
1547 ecmd->supported = SUPPORTED_BNC;
1548 ecmd->port = PORT_BNC;
1549 break;
1550
1551 case '4': /* DE204 */
1552 ecmd->supported = SUPPORTED_TP;
1553 ecmd->port = PORT_TP;
1554 break;
1555
1556 case '5': /* DE205 */
1557 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1558 ecmd->autoneg = !(cr & CR_APD);
1559 /*
1560 ** Port is only valid if autoneg is disabled
1561 ** and even then we don't know if AUI is jumpered.
1562 */
1563 if (!ecmd->autoneg)
1564 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1565 break;
1566 }
1567
1568 ecmd->supported |= SUPPORTED_10baseT_Half;
1569 ecmd->speed = SPEED_10;
1570 ecmd->duplex = DUPLEX_HALF;
1571 return 0;
1572 }
1573
1574 static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1575 {
1576 struct ewrk3_private *lp = netdev_priv(dev);
1577 unsigned long iobase = dev->base_addr;
1578 unsigned long flags;
1579 u8 cr;
1580
1581 /* DE205 is the only card with anything to set */
1582 if (lp->adapter_name[4] != '5')
1583 return -EOPNOTSUPP;
1584
1585 /* Sanity-check parameters */
1586 if (ecmd->speed != SPEED_10)
1587 return -EINVAL;
1588 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1589 return -EINVAL; /* AUI is not software-selectable */
1590 if (ecmd->transceiver != XCVR_INTERNAL)
1591 return -EINVAL;
1592 if (ecmd->duplex != DUPLEX_HALF)
1593 return -EINVAL;
1594 if (ecmd->phy_address != 0)
1595 return -EINVAL;
1596
1597 spin_lock_irqsave(&lp->hw_lock, flags);
1598 cr = inb(EWRK3_CR);
1599
1600 /* If Autoneg is set, change to Auto Port mode */
1601 /* Otherwise, disable Auto Port and set port explicitly */
1602 if (ecmd->autoneg) {
1603 cr &= ~CR_APD;
1604 } else {
1605 cr |= CR_APD;
1606 if (ecmd->port == PORT_TP)
1607 cr &= ~CR_PSEL; /* Force TP */
1608 else
1609 cr |= CR_PSEL; /* Force BNC */
1610 }
1611
1612 /* Commit the changes */
1613 outb(cr, EWRK3_CR);
1614 spin_unlock_irqrestore(&lp->hw_lock, flags);
1615 return 0;
1616 }
1617
1618 static u32 ewrk3_get_link(struct net_device *dev)
1619 {
1620 unsigned long iobase = dev->base_addr;
1621 u8 cmr = inb(EWRK3_CMR);
1622 /* DE203 has BNC only and link status does not apply */
1623 /* On DE204 this is always valid since TP is the only port. */
1624 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1625 return !(cmr & CMR_LINK);
1626 }
1627
1628 static int ewrk3_phys_id(struct net_device *dev, u32 data)
1629 {
1630 struct ewrk3_private *lp = netdev_priv(dev);
1631 unsigned long iobase = dev->base_addr;
1632 unsigned long flags;
1633 u8 cr;
1634 int count;
1635
1636 /* Toggle LED 4x per second */
1637 count = data << 2;
1638
1639 spin_lock_irqsave(&lp->hw_lock, flags);
1640
1641 /* Bail if a PHYS_ID is already in progress */
1642 if (lp->led_mask == 0) {
1643 spin_unlock_irqrestore(&lp->hw_lock, flags);
1644 return -EBUSY;
1645 }
1646
1647 /* Prevent ISR from twiddling the LED */
1648 lp->led_mask = 0;
1649
1650 while (count--) {
1651 /* Toggle the LED */
1652 cr = inb(EWRK3_CR);
1653 outb(cr ^ CR_LED, EWRK3_CR);
1654
1655 /* Wait a little while */
1656 spin_unlock_irqrestore(&lp->hw_lock, flags);
1657 set_current_state(TASK_UNINTERRUPTIBLE);
1658 schedule_timeout(HZ>>2);
1659 spin_lock_irqsave(&lp->hw_lock, flags);
1660
1661 /* Exit if we got a signal */
1662 if (signal_pending(current))
1663 break;
1664 }
1665
1666 lp->led_mask = CR_LED;
1667 cr = inb(EWRK3_CR);
1668 outb(cr & ~CR_LED, EWRK3_CR);
1669 spin_unlock_irqrestore(&lp->hw_lock, flags);
1670 return signal_pending(current) ? -ERESTARTSYS : 0;
1671 }
1672
1673 static struct ethtool_ops ethtool_ops_203 = {
1674 .get_drvinfo = ewrk3_get_drvinfo,
1675 .get_settings = ewrk3_get_settings,
1676 .set_settings = ewrk3_set_settings,
1677 .phys_id = ewrk3_phys_id,
1678 };
1679
1680 static struct ethtool_ops ethtool_ops = {
1681 .get_drvinfo = ewrk3_get_drvinfo,
1682 .get_settings = ewrk3_get_settings,
1683 .set_settings = ewrk3_set_settings,
1684 .get_link = ewrk3_get_link,
1685 .phys_id = ewrk3_phys_id,
1686 };
1687
1688 /*
1689 ** Perform IOCTL call functions here. Some are privileged operations and the
1690 ** effective uid is checked in those cases.
1691 */
1692 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1693 {
1694 struct ewrk3_private *lp = netdev_priv(dev);
1695 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1696 u_long iobase = dev->base_addr;
1697 int i, j, status = 0;
1698 u_char csr;
1699 unsigned long flags;
1700 union ewrk3_addr {
1701 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1702 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1703 };
1704
1705 union ewrk3_addr *tmp;
1706
1707 /* All we handle are private IOCTLs */
1708 if (cmd != EWRK3IOCTL)
1709 return -EOPNOTSUPP;
1710
1711 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1712 if(tmp==NULL)
1713 return -ENOMEM;
1714
1715 switch (ioc->cmd) {
1716 case EWRK3_GET_HWADDR: /* Get the hardware address */
1717 for (i = 0; i < ETH_ALEN; i++) {
1718 tmp->addr[i] = dev->dev_addr[i];
1719 }
1720 ioc->len = ETH_ALEN;
1721 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1722 status = -EFAULT;
1723 break;
1724
1725 case EWRK3_SET_HWADDR: /* Set the hardware address */
1726 if (capable(CAP_NET_ADMIN)) {
1727 spin_lock_irqsave(&lp->hw_lock, flags);
1728 csr = inb(EWRK3_CSR);
1729 csr |= (CSR_TXD | CSR_RXD);
1730 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1731 spin_unlock_irqrestore(&lp->hw_lock, flags);
1732
1733 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1734 status = -EFAULT;
1735 break;
1736 }
1737 spin_lock_irqsave(&lp->hw_lock, flags);
1738 for (i = 0; i < ETH_ALEN; i++) {
1739 dev->dev_addr[i] = tmp->addr[i];
1740 outb(tmp->addr[i], EWRK3_PAR0 + i);
1741 }
1742
1743 csr = inb(EWRK3_CSR);
1744 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1745 outb(csr, EWRK3_CSR);
1746 spin_unlock_irqrestore(&lp->hw_lock, flags);
1747 } else {
1748 status = -EPERM;
1749 }
1750
1751 break;
1752 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1753 if (capable(CAP_NET_ADMIN)) {
1754 spin_lock_irqsave(&lp->hw_lock, flags);
1755 csr = inb(EWRK3_CSR);
1756 csr |= CSR_PME;
1757 csr &= ~CSR_MCE;
1758 outb(csr, EWRK3_CSR);
1759 spin_unlock_irqrestore(&lp->hw_lock, flags);
1760 } else {
1761 status = -EPERM;
1762 }
1763
1764 break;
1765 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1766 if (capable(CAP_NET_ADMIN)) {
1767 spin_lock_irqsave(&lp->hw_lock, flags);
1768 csr = inb(EWRK3_CSR);
1769 csr &= ~CSR_PME;
1770 outb(csr, EWRK3_CSR);
1771 spin_unlock_irqrestore(&lp->hw_lock, flags);
1772 } else {
1773 status = -EPERM;
1774 }
1775
1776 break;
1777 case EWRK3_GET_MCA: /* Get the multicast address table */
1778 spin_lock_irqsave(&lp->hw_lock, flags);
1779 if (lp->shmem_length == IO_ONLY) {
1780 outb(0, EWRK3_IOPR);
1781 outw(PAGE0_HTE, EWRK3_PIR1);
1782 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1783 tmp->addr[i] = inb(EWRK3_DATA);
1784 }
1785 } else {
1786 outb(0, EWRK3_MPR);
1787 isa_memcpy_fromio(tmp->addr, lp->shmem_base + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1788 }
1789 spin_unlock_irqrestore(&lp->hw_lock, flags);
1790
1791 ioc->len = (HASH_TABLE_LEN >> 3);
1792 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1793 status = -EFAULT;
1794
1795 break;
1796 case EWRK3_SET_MCA: /* Set a multicast address */
1797 if (capable(CAP_NET_ADMIN)) {
1798 if (ioc->len > 1024)
1799 {
1800 status = -EINVAL;
1801 break;
1802 }
1803 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1804 status = -EFAULT;
1805 break;
1806 }
1807 set_multicast_list(dev);
1808 } else {
1809 status = -EPERM;
1810 }
1811
1812 break;
1813 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1814 if (capable(CAP_NET_ADMIN)) {
1815 set_multicast_list(dev);
1816 } else {
1817 status = -EPERM;
1818 }
1819
1820 break;
1821 case EWRK3_MCA_EN: /* Enable multicast addressing */
1822 if (capable(CAP_NET_ADMIN)) {
1823 spin_lock_irqsave(&lp->hw_lock, flags);
1824 csr = inb(EWRK3_CSR);
1825 csr |= CSR_MCE;
1826 csr &= ~CSR_PME;
1827 outb(csr, EWRK3_CSR);
1828 spin_unlock_irqrestore(&lp->hw_lock, flags);
1829 } else {
1830 status = -EPERM;
1831 }
1832
1833 break;
1834 case EWRK3_GET_STATS: { /* Get the driver statistics */
1835 struct ewrk3_stats *tmp_stats =
1836 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1837 if (!tmp_stats) {
1838 status = -ENOMEM;
1839 break;
1840 }
1841
1842 spin_lock_irqsave(&lp->hw_lock, flags);
1843 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1844 spin_unlock_irqrestore(&lp->hw_lock, flags);
1845
1846 ioc->len = sizeof(lp->pktStats);
1847 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1848 status = -EFAULT;
1849 kfree(tmp_stats);
1850 break;
1851 }
1852 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1853 if (capable(CAP_NET_ADMIN)) {
1854 spin_lock_irqsave(&lp->hw_lock, flags);
1855 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1856 spin_unlock_irqrestore(&lp->hw_lock,flags);
1857 } else {
1858 status = -EPERM;
1859 }
1860
1861 break;
1862 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1863 tmp->addr[0] = inb(EWRK3_CSR);
1864 ioc->len = 1;
1865 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1866 status = -EFAULT;
1867 break;
1868 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1869 if (capable(CAP_NET_ADMIN)) {
1870 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1871 status = -EFAULT;
1872 break;
1873 }
1874 outb(tmp->addr[0], EWRK3_CSR);
1875 } else {
1876 status = -EPERM;
1877 }
1878
1879 break;
1880 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1881 if (capable(CAP_NET_ADMIN)) {
1882 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1883 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1884 }
1885 i = EEPROM_MAX;
1886 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1887 for (j = 0; j < ETH_ALEN; j++) {
1888 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1889 }
1890 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1891 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1892 status = -EFAULT;
1893 } else {
1894 status = -EPERM;
1895 }
1896
1897 break;
1898 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1899 if (capable(CAP_NET_ADMIN)) {
1900 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1901 status = -EFAULT;
1902 break;
1903 }
1904 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1905 Write_EEPROM(tmp->val[i], iobase, i);
1906 }
1907 } else {
1908 status = -EPERM;
1909 }
1910
1911 break;
1912 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1913 tmp->addr[0] = inb(EWRK3_CMR);
1914 ioc->len = 1;
1915 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1916 status = -EFAULT;
1917 break;
1918 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1919 if (capable(CAP_NET_ADMIN)) {
1920 lp->txc = 1;
1921 } else {
1922 status = -EPERM;
1923 }
1924
1925 break;
1926 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1927 if (capable(CAP_NET_ADMIN)) {
1928 lp->txc = 0;
1929 } else {
1930 status = -EPERM;
1931 }
1932
1933 break;
1934 default:
1935 status = -EOPNOTSUPP;
1936 }
1937 kfree(tmp);
1938 return status;
1939 }
1940
1941 #ifdef MODULE
1942 static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1943 static int ndevs;
1944 static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1945
1946 /* '21' below should really be 'MAX_NUM_EWRK3S' */
1947 module_param_array(io, int, NULL, 0);
1948 module_param_array(irq, int, NULL, 0);
1949 MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1950 MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1951
1952 static __exit void ewrk3_exit_module(void)
1953 {
1954 int i;
1955
1956 for( i=0; i<ndevs; i++ ) {
1957 unregister_netdev(ewrk3_devs[i]);
1958 release_region(ewrk3_devs[i]->base_addr, EWRK3_TOTAL_SIZE);
1959 free_netdev(ewrk3_devs[i]);
1960 ewrk3_devs[i] = NULL;
1961 }
1962 }
1963
1964 static __init int ewrk3_init_module(void)
1965 {
1966 int i=0;
1967
1968 while( io[i] && irq[i] ) {
1969 struct net_device *dev
1970 = alloc_etherdev(sizeof(struct ewrk3_private));
1971
1972 if (!dev)
1973 break;
1974
1975 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1976 free_netdev(dev);
1977 break;
1978 }
1979
1980 ewrk3_devs[ndevs++] = dev;
1981 i++;
1982 }
1983
1984 return ndevs ? 0 : -EIO;
1985 }
1986
1987
1988 /* Hack for breakage in new module stuff */
1989 module_exit(ewrk3_exit_module);
1990 module_init(ewrk3_init_module);
1991 #endif /* MODULE */
1992 MODULE_LICENSE("GPL");
1993
1994
1995
1996 /*
1997 * Local variables:
1998 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1999 *
2000 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
2001 * End:
2002 */
2003
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