Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * Copyright (C) 2005 - 2009 ServerEngines
  3  * All rights reserved.
  4  *
  5  * This program is free software; you can redistribute it and/or
  6  * modify it under the terms of the GNU General Public License version 2
  7  * as published by the Free Software Foundation.  The full GNU General
  8  * Public License is included in this distribution in the file called COPYING.
  9  *
 10  * Contact Information:
 11  * linux-drivers@serverengines.com
 12  *
 13  * ServerEngines
 14  * 209 N. Fair Oaks Ave
 15  * Sunnyvale, CA 94085
 16  */
 17 
 18 #ifndef BE_H
 19 #define BE_H
 20 
 21 #include <linux/pci.h>
 22 #include <linux/etherdevice.h>
 23 #include <linux/version.h>
 24 #include <linux/delay.h>
 25 #include <net/tcp.h>
 26 #include <net/ip.h>
 27 #include <net/ipv6.h>
 28 #include <linux/if_vlan.h>
 29 #include <linux/workqueue.h>
 30 #include <linux/interrupt.h>
 31 #include <linux/inet_lro.h>
 32 
 33 #include "be_hw.h"
 34 
 35 #define DRV_VER                 "2.0.348"
 36 #define DRV_NAME                "be2net"
 37 #define BE_NAME                 "ServerEngines BladeEngine2 10Gbps NIC"
 38 #define OC_NAME                 "Emulex OneConnect 10Gbps NIC"
 39 #define DRV_DESC                BE_NAME "Driver"
 40 
 41 #define BE_VENDOR_ID            0x19a2
 42 #define BE_DEVICE_ID1           0x211
 43 #define OC_DEVICE_ID1           0x700
 44 #define OC_DEVICE_ID2           0x701
 45 
 46 static inline char *nic_name(struct pci_dev *pdev)
 47 {
 48         if (pdev->device == OC_DEVICE_ID1 || pdev->device == OC_DEVICE_ID2)
 49                 return OC_NAME;
 50         else
 51                 return BE_NAME;
 52 }
 53 
 54 /* Number of bytes of an RX frame that are copied to skb->data */
 55 #define BE_HDR_LEN              64
 56 #define BE_MAX_JUMBO_FRAME_SIZE 9018
 57 #define BE_MIN_MTU              256
 58 
 59 #define BE_NUM_VLANS_SUPPORTED  64
 60 #define BE_MAX_EQD              96
 61 #define BE_MAX_TX_FRAG_COUNT    30
 62 
 63 #define EVNT_Q_LEN              1024
 64 #define TX_Q_LEN                2048
 65 #define TX_CQ_LEN               1024
 66 #define RX_Q_LEN                1024    /* Does not support any other value */
 67 #define RX_CQ_LEN               1024
 68 #define MCC_Q_LEN               128     /* total size not to exceed 8 pages */
 69 #define MCC_CQ_LEN              256
 70 
 71 #define BE_NAPI_WEIGHT          64
 72 #define MAX_RX_POST             BE_NAPI_WEIGHT /* Frags posted at a time */
 73 #define RX_FRAGS_REFILL_WM      (RX_Q_LEN - MAX_RX_POST)
 74 
 75 #define BE_MAX_LRO_DESCRIPTORS  16
 76 #define BE_MAX_FRAGS_PER_FRAME  (min((u32) 16, (u32) MAX_SKB_FRAGS))
 77 
 78 struct be_dma_mem {
 79         void *va;
 80         dma_addr_t dma;
 81         u32 size;
 82 };
 83 
 84 struct be_queue_info {
 85         struct be_dma_mem dma_mem;
 86         u16 len;
 87         u16 entry_size; /* Size of an element in the queue */
 88         u16 id;
 89         u16 tail, head;
 90         bool created;
 91         atomic_t used;  /* Number of valid elements in the queue */
 92 };
 93 
 94 static inline u32 MODULO(u16 val, u16 limit)
 95 {
 96         BUG_ON(limit & (limit - 1));
 97         return val & (limit - 1);
 98 }
 99 
100 static inline void index_adv(u16 *index, u16 val, u16 limit)
101 {
102         *index = MODULO((*index + val), limit);
103 }
104 
105 static inline void index_inc(u16 *index, u16 limit)
106 {
107         *index = MODULO((*index + 1), limit);
108 }
109 
110 static inline void *queue_head_node(struct be_queue_info *q)
111 {
112         return q->dma_mem.va + q->head * q->entry_size;
113 }
114 
115 static inline void *queue_tail_node(struct be_queue_info *q)
116 {
117         return q->dma_mem.va + q->tail * q->entry_size;
118 }
119 
120 static inline void queue_head_inc(struct be_queue_info *q)
121 {
122         index_inc(&q->head, q->len);
123 }
124 
125 static inline void queue_tail_inc(struct be_queue_info *q)
126 {
127         index_inc(&q->tail, q->len);
128 }
129 
130 
131 struct be_eq_obj {
132         struct be_queue_info q;
133         char desc[32];
134 
135         /* Adaptive interrupt coalescing (AIC) info */
136         bool enable_aic;
137         u16 min_eqd;            /* in usecs */
138         u16 max_eqd;            /* in usecs */
139         u16 cur_eqd;            /* in usecs */
140 
141         struct napi_struct napi;
142 };
143 
144 struct be_mcc_obj {
145         struct be_queue_info q;
146         struct be_queue_info cq;
147 };
148 
149 struct be_ctrl_info {
150         u8 __iomem *csr;
151         u8 __iomem *db;         /* Door Bell */
152         u8 __iomem *pcicfg;     /* PCI config space */
153         int pci_func;
154 
155         /* Mbox used for cmd request/response */
156         spinlock_t mbox_lock;   /* For serializing mbox cmds to BE card */
157         struct be_dma_mem mbox_mem;
158         /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
159          * is stored for freeing purpose */
160         struct be_dma_mem mbox_mem_alloced;
161 
162         /* MCC Rings */
163         struct be_mcc_obj mcc_obj;
164         spinlock_t mcc_lock;    /* For serializing mcc cmds to BE card */
165         spinlock_t mcc_cq_lock;
166 
167         /* MCC Async callback */
168         void (*async_cb)(void *adapter, bool link_up);
169         void *adapter_ctxt;
170 };
171 
172 #include "be_cmds.h"
173 
174 struct be_drvr_stats {
175         u32 be_tx_reqs;         /* number of TX requests initiated */
176         u32 be_tx_stops;        /* number of times TX Q was stopped */
177         u32 be_fwd_reqs;        /* number of send reqs through forwarding i/f */
178         u32 be_tx_wrbs;         /* number of tx WRBs used */
179         u32 be_tx_events;       /* number of tx completion events  */
180         u32 be_tx_compl;        /* number of tx completion entries processed */
181         ulong be_tx_jiffies;
182         u64 be_tx_bytes;
183         u64 be_tx_bytes_prev;
184         u32 be_tx_rate;
185 
186         u32 cache_barrier[16];
187 
188         u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
189         u32 be_polls;           /* number of times NAPI called poll function */
190         u32 be_rx_events;       /* number of ucast rx completion events  */
191         u32 be_rx_compl;        /* number of rx completion entries processed */
192         u32 be_lro_hgram_data[8];       /* histogram of LRO data packets */
193         u32 be_lro_hgram_ack[8];        /* histogram of LRO ACKs */
194         ulong be_rx_jiffies;
195         u64 be_rx_bytes;
196         u64 be_rx_bytes_prev;
197         u32 be_rx_rate;
198         /* number of non ether type II frames dropped where
199          * frame len > length field of Mac Hdr */
200         u32 be_802_3_dropped_frames;
201         /* number of non ether type II frames malformed where
202          * in frame len < length field of Mac Hdr */
203         u32 be_802_3_malformed_frames;
204         u32 be_rxcp_err;        /* Num rx completion entries w/ err set. */
205         ulong rx_fps_jiffies;   /* jiffies at last FPS calc */
206         u32 be_rx_frags;
207         u32 be_prev_rx_frags;
208         u32 be_rx_fps;          /* Rx frags per second */
209 };
210 
211 struct be_stats_obj {
212         struct be_drvr_stats drvr_stats;
213         struct net_device_stats net_stats;
214         struct be_dma_mem cmd;
215 };
216 
217 struct be_tx_obj {
218         struct be_queue_info q;
219         struct be_queue_info cq;
220         /* Remember the skbs that were transmitted */
221         struct sk_buff *sent_skb_list[TX_Q_LEN];
222 };
223 
224 /* Struct to remember the pages posted for rx frags */
225 struct be_rx_page_info {
226         struct page *page;
227         dma_addr_t bus;
228         u16 page_offset;
229         bool last_page_user;
230 };
231 
232 struct be_rx_obj {
233         struct be_queue_info q;
234         struct be_queue_info cq;
235         struct be_rx_page_info page_info_tbl[RX_Q_LEN];
236         struct net_lro_mgr lro_mgr;
237         struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
238 };
239 
240 #define BE_NUM_MSIX_VECTORS             2       /* 1 each for Tx and Rx */
241 struct be_adapter {
242         struct pci_dev *pdev;
243         struct net_device *netdev;
244 
245         /* Mbox, pci config, csr address information */
246         struct be_ctrl_info ctrl;
247 
248         struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
249         bool msix_enabled;
250         bool isr_registered;
251 
252         /* TX Rings */
253         struct be_eq_obj tx_eq;
254         struct be_tx_obj tx_obj;
255 
256         u32 cache_line_break[8];
257 
258         /* Rx rings */
259         struct be_eq_obj rx_eq;
260         struct be_rx_obj rx_obj;
261         u32 big_page_size;      /* Compounded page size shared by rx wrbs */
262         bool rx_post_starved;   /* Zero rx frags have been posted to BE */
263 
264         struct vlan_group *vlan_grp;
265         u16 num_vlans;
266         u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
267 
268         struct be_stats_obj stats;
269         /* Work queue used to perform periodic tasks like getting statistics */
270         struct delayed_work work;
271 
272         /* Ethtool knobs and info */
273         bool rx_csum;           /* BE card must perform rx-checksumming */
274         u32 max_rx_coal;
275         char fw_ver[FW_VER_LEN];
276         u32 if_handle;          /* Used to configure filtering */
277         u32 pmac_id;            /* MAC addr handle used by BE card */
278 
279         bool link_up;
280         u32 port_num;
281         bool promiscuous;
282 };
283 
284 extern struct ethtool_ops be_ethtool_ops;
285 
286 #define drvr_stats(adapter)             (&adapter->stats.drvr_stats)
287 
288 #define BE_SET_NETDEV_OPS(netdev, ops)  (netdev->netdev_ops = ops)
289 
290 #define PAGE_SHIFT_4K           12
291 #define PAGE_SIZE_4K            (1 << PAGE_SHIFT_4K)
292 
293 /* Returns number of pages spanned by the data starting at the given addr */
294 #define PAGES_4K_SPANNED(_address, size)                                \
295                 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +     \
296                         (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
297 
298 /* Byte offset into the page corresponding to given address */
299 #define OFFSET_IN_PAGE(addr)                                            \
300                  ((size_t)(addr) & (PAGE_SIZE_4K-1))
301 
302 /* Returns bit offset within a DWORD of a bitfield */
303 #define AMAP_BIT_OFFSET(_struct, field)                                 \
304                 (((size_t)&(((_struct *)0)->field))%32)
305 
306 /* Returns the bit mask of the field that is NOT shifted into location. */
307 static inline u32 amap_mask(u32 bitsize)
308 {
309         return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
310 }
311 
312 static inline void
313 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
314 {
315         u32 *dw = (u32 *) ptr + dw_offset;
316         *dw &= ~(mask << offset);
317         *dw |= (mask & value) << offset;
318 }
319 
320 #define AMAP_SET_BITS(_struct, field, ptr, val)                         \
321                 amap_set(ptr,                                           \
322                         offsetof(_struct, field)/32,                    \
323                         amap_mask(sizeof(((_struct *)0)->field)),       \
324                         AMAP_BIT_OFFSET(_struct, field),                \
325                         val)
326 
327 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
328 {
329         u32 *dw = (u32 *) ptr;
330         return mask & (*(dw + dw_offset) >> offset);
331 }
332 
333 #define AMAP_GET_BITS(_struct, field, ptr)                              \
334                 amap_get(ptr,                                           \
335                         offsetof(_struct, field)/32,                    \
336                         amap_mask(sizeof(((_struct *)0)->field)),       \
337                         AMAP_BIT_OFFSET(_struct, field))
338 
339 #define be_dws_cpu_to_le(wrb, len)      swap_dws(wrb, len)
340 #define be_dws_le_to_cpu(wrb, len)      swap_dws(wrb, len)
341 static inline void swap_dws(void *wrb, int len)
342 {
343 #ifdef __BIG_ENDIAN
344         u32 *dw = wrb;
345         BUG_ON(len % 4);
346         do {
347                 *dw = cpu_to_le32(*dw);
348                 dw++;
349                 len -= 4;
350         } while (len);
351 #endif                          /* __BIG_ENDIAN */
352 }
353 
354 static inline u8 is_tcp_pkt(struct sk_buff *skb)
355 {
356         u8 val = 0;
357 
358         if (ip_hdr(skb)->version == 4)
359                 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
360         else if (ip_hdr(skb)->version == 6)
361                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
362 
363         return val;
364 }
365 
366 static inline u8 is_udp_pkt(struct sk_buff *skb)
367 {
368         u8 val = 0;
369 
370         if (ip_hdr(skb)->version == 4)
371                 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
372         else if (ip_hdr(skb)->version == 6)
373                 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
374 
375         return val;
376 }
377 
378 extern void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid, bool arm,
379                 u16 num_popped);
380 #endif                          /* BE_H */
381 
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