1 /*
2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
5 *
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 *
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
30 *
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
33 *
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
37 *
38 * TODO:
39 * Fix TSO; tx performance is horrible with TSO enabled.
40 * Wake on LAN.
41 * Add more ethtool functions.
42 * Fix abstruse irq enable/disable condition described here:
43 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
44 *
45 * NEEDS TESTING:
46 * VLAN
47 * multicast
48 * promiscuous mode
49 * interrupt coalescing
50 * SMP torture testing
51 */
52
53 #include <linux/types.h>
54 #include <linux/netdevice.h>
55 #include <linux/pci.h>
56 #include <linux/spinlock.h>
57 #include <linux/slab.h>
58 #include <linux/string.h>
59 #include <linux/skbuff.h>
60 #include <linux/etherdevice.h>
61 #include <linux/if_vlan.h>
62 #include <linux/if_ether.h>
63 #include <linux/irqreturn.h>
64 #include <linux/workqueue.h>
65 #include <linux/timer.h>
66 #include <linux/jiffies.h>
67 #include <linux/hardirq.h>
68 #include <linux/interrupt.h>
69 #include <linux/irqflags.h>
70 #include <linux/dma-mapping.h>
71 #include <linux/net.h>
72 #include <linux/pm.h>
73 #include <linux/in.h>
74 #include <linux/ip.h>
75 #include <linux/tcp.h>
76 #include <linux/compiler.h>
77 #include <linux/delay.h>
78 #include <linux/mii.h>
79 #include <net/checksum.h>
80
81 #include <asm/atomic.h>
82 #include <asm/byteorder.h>
83
84 #include "atl1.h"
85
86 #define DRIVER_VERSION "2.0.7"
87
88 char atl1_driver_name[] = "atl1";
89 static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
90 static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
91 char atl1_driver_version[] = DRIVER_VERSION;
92
93 MODULE_AUTHOR
94 ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
95 MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
96 MODULE_LICENSE("GPL");
97 MODULE_VERSION(DRIVER_VERSION);
98
99 /*
100 * atl1_pci_tbl - PCI Device ID Table
101 */
102 static const struct pci_device_id atl1_pci_tbl[] = {
103 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
104 /* required last entry */
105 {0,}
106 };
107
108 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
109
110 /*
111 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
112 * @adapter: board private structure to initialize
113 *
114 * atl1_sw_init initializes the Adapter private data structure.
115 * Fields are initialized based on PCI device information and
116 * OS network device settings (MTU size).
117 */
118 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
119 {
120 struct atl1_hw *hw = &adapter->hw;
121 struct net_device *netdev = adapter->netdev;
122
123 hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
124 hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
125
126 adapter->wol = 0;
127 adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
128 adapter->ict = 50000; /* 100ms */
129 adapter->link_speed = SPEED_0; /* hardware init */
130 adapter->link_duplex = FULL_DUPLEX;
131
132 hw->phy_configured = false;
133 hw->preamble_len = 7;
134 hw->ipgt = 0x60;
135 hw->min_ifg = 0x50;
136 hw->ipgr1 = 0x40;
137 hw->ipgr2 = 0x60;
138 hw->max_retry = 0xf;
139 hw->lcol = 0x37;
140 hw->jam_ipg = 7;
141 hw->rfd_burst = 8;
142 hw->rrd_burst = 8;
143 hw->rfd_fetch_gap = 1;
144 hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
145 hw->rx_jumbo_lkah = 1;
146 hw->rrd_ret_timer = 16;
147 hw->tpd_burst = 4;
148 hw->tpd_fetch_th = 16;
149 hw->txf_burst = 0x100;
150 hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
151 hw->tpd_fetch_gap = 1;
152 hw->rcb_value = atl1_rcb_64;
153 hw->dma_ord = atl1_dma_ord_enh;
154 hw->dmar_block = atl1_dma_req_256;
155 hw->dmaw_block = atl1_dma_req_256;
156 hw->cmb_rrd = 4;
157 hw->cmb_tpd = 4;
158 hw->cmb_rx_timer = 1; /* about 2us */
159 hw->cmb_tx_timer = 1; /* about 2us */
160 hw->smb_timer = 100000; /* about 200ms */
161
162 spin_lock_init(&adapter->lock);
163 spin_lock_init(&adapter->mb_lock);
164
165 return 0;
166 }
167
168 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
169 {
170 struct atl1_adapter *adapter = netdev_priv(netdev);
171 u16 result;
172
173 atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
174
175 return result;
176 }
177
178 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
179 int val)
180 {
181 struct atl1_adapter *adapter = netdev_priv(netdev);
182
183 atl1_write_phy_reg(&adapter->hw, reg_num, val);
184 }
185
186 /*
187 * atl1_mii_ioctl -
188 * @netdev:
189 * @ifreq:
190 * @cmd:
191 */
192 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
193 {
194 struct atl1_adapter *adapter = netdev_priv(netdev);
195 unsigned long flags;
196 int retval;
197
198 if (!netif_running(netdev))
199 return -EINVAL;
200
201 spin_lock_irqsave(&adapter->lock, flags);
202 retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
203 spin_unlock_irqrestore(&adapter->lock, flags);
204
205 return retval;
206 }
207
208 /*
209 * atl1_ioctl -
210 * @netdev:
211 * @ifreq:
212 * @cmd:
213 */
214 static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
215 {
216 switch (cmd) {
217 case SIOCGMIIPHY:
218 case SIOCGMIIREG:
219 case SIOCSMIIREG:
220 return atl1_mii_ioctl(netdev, ifr, cmd);
221 default:
222 return -EOPNOTSUPP;
223 }
224 }
225
226 /*
227 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
228 * @adapter: board private structure
229 *
230 * Return 0 on success, negative on failure
231 */
232 s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
233 {
234 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
235 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
236 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
237 struct atl1_ring_header *ring_header = &adapter->ring_header;
238 struct pci_dev *pdev = adapter->pdev;
239 int size;
240 u8 offset = 0;
241
242 size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
243 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
244 if (unlikely(!tpd_ring->buffer_info)) {
245 dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
246 goto err_nomem;
247 }
248 rfd_ring->buffer_info =
249 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
250
251 /* real ring DMA buffer
252 * each ring/block may need up to 8 bytes for alignment, hence the
253 * additional 40 bytes tacked onto the end.
254 */
255 ring_header->size = size =
256 sizeof(struct tx_packet_desc) * tpd_ring->count
257 + sizeof(struct rx_free_desc) * rfd_ring->count
258 + sizeof(struct rx_return_desc) * rrd_ring->count
259 + sizeof(struct coals_msg_block)
260 + sizeof(struct stats_msg_block)
261 + 40;
262
263 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
264 &ring_header->dma);
265 if (unlikely(!ring_header->desc)) {
266 dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
267 goto err_nomem;
268 }
269
270 memset(ring_header->desc, 0, ring_header->size);
271
272 /* init TPD ring */
273 tpd_ring->dma = ring_header->dma;
274 offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
275 tpd_ring->dma += offset;
276 tpd_ring->desc = (u8 *) ring_header->desc + offset;
277 tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
278
279 /* init RFD ring */
280 rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
281 offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
282 rfd_ring->dma += offset;
283 rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
284 rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
285
286
287 /* init RRD ring */
288 rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
289 offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
290 rrd_ring->dma += offset;
291 rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
292 rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
293
294
295 /* init CMB */
296 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
297 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
298 adapter->cmb.dma += offset;
299 adapter->cmb.cmb = (struct coals_msg_block *)
300 ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
301
302 /* init SMB */
303 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
304 offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
305 adapter->smb.dma += offset;
306 adapter->smb.smb = (struct stats_msg_block *)
307 ((u8 *) adapter->cmb.cmb +
308 (sizeof(struct coals_msg_block) + offset));
309
310 return ATL1_SUCCESS;
311
312 err_nomem:
313 kfree(tpd_ring->buffer_info);
314 return -ENOMEM;
315 }
316
317 static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
318 {
319 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
320 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
321 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
322
323 atomic_set(&tpd_ring->next_to_use, 0);
324 atomic_set(&tpd_ring->next_to_clean, 0);
325
326 rfd_ring->next_to_clean = 0;
327 atomic_set(&rfd_ring->next_to_use, 0);
328
329 rrd_ring->next_to_use = 0;
330 atomic_set(&rrd_ring->next_to_clean, 0);
331 }
332
333 /*
334 * atl1_clean_rx_ring - Free RFD Buffers
335 * @adapter: board private structure
336 */
337 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
338 {
339 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
340 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
341 struct atl1_buffer *buffer_info;
342 struct pci_dev *pdev = adapter->pdev;
343 unsigned long size;
344 unsigned int i;
345
346 /* Free all the Rx ring sk_buffs */
347 for (i = 0; i < rfd_ring->count; i++) {
348 buffer_info = &rfd_ring->buffer_info[i];
349 if (buffer_info->dma) {
350 pci_unmap_page(pdev, buffer_info->dma,
351 buffer_info->length, PCI_DMA_FROMDEVICE);
352 buffer_info->dma = 0;
353 }
354 if (buffer_info->skb) {
355 dev_kfree_skb(buffer_info->skb);
356 buffer_info->skb = NULL;
357 }
358 }
359
360 size = sizeof(struct atl1_buffer) * rfd_ring->count;
361 memset(rfd_ring->buffer_info, 0, size);
362
363 /* Zero out the descriptor ring */
364 memset(rfd_ring->desc, 0, rfd_ring->size);
365
366 rfd_ring->next_to_clean = 0;
367 atomic_set(&rfd_ring->next_to_use, 0);
368
369 rrd_ring->next_to_use = 0;
370 atomic_set(&rrd_ring->next_to_clean, 0);
371 }
372
373 /*
374 * atl1_clean_tx_ring - Free Tx Buffers
375 * @adapter: board private structure
376 */
377 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
378 {
379 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
380 struct atl1_buffer *buffer_info;
381 struct pci_dev *pdev = adapter->pdev;
382 unsigned long size;
383 unsigned int i;
384
385 /* Free all the Tx ring sk_buffs */
386 for (i = 0; i < tpd_ring->count; i++) {
387 buffer_info = &tpd_ring->buffer_info[i];
388 if (buffer_info->dma) {
389 pci_unmap_page(pdev, buffer_info->dma,
390 buffer_info->length, PCI_DMA_TODEVICE);
391 buffer_info->dma = 0;
392 }
393 }
394
395 for (i = 0; i < tpd_ring->count; i++) {
396 buffer_info = &tpd_ring->buffer_info[i];
397 if (buffer_info->skb) {
398 dev_kfree_skb_any(buffer_info->skb);
399 buffer_info->skb = NULL;
400 }
401 }
402
403 size = sizeof(struct atl1_buffer) * tpd_ring->count;
404 memset(tpd_ring->buffer_info, 0, size);
405
406 /* Zero out the descriptor ring */
407 memset(tpd_ring->desc, 0, tpd_ring->size);
408
409 atomic_set(&tpd_ring->next_to_use, 0);
410 atomic_set(&tpd_ring->next_to_clean, 0);
411 }
412
413 /*
414 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
415 * @adapter: board private structure
416 *
417 * Free all transmit software resources
418 */
419 void atl1_free_ring_resources(struct atl1_adapter *adapter)
420 {
421 struct pci_dev *pdev = adapter->pdev;
422 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
423 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
424 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
425 struct atl1_ring_header *ring_header = &adapter->ring_header;
426
427 atl1_clean_tx_ring(adapter);
428 atl1_clean_rx_ring(adapter);
429
430 kfree(tpd_ring->buffer_info);
431 pci_free_consistent(pdev, ring_header->size, ring_header->desc,
432 ring_header->dma);
433
434 tpd_ring->buffer_info = NULL;
435 tpd_ring->desc = NULL;
436 tpd_ring->dma = 0;
437
438 rfd_ring->buffer_info = NULL;
439 rfd_ring->desc = NULL;
440 rfd_ring->dma = 0;
441
442 rrd_ring->desc = NULL;
443 rrd_ring->dma = 0;
444 }
445
446 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
447 {
448 u32 value;
449 struct atl1_hw *hw = &adapter->hw;
450 struct net_device *netdev = adapter->netdev;
451 /* Config MAC CTRL Register */
452 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
453 /* duplex */
454 if (FULL_DUPLEX == adapter->link_duplex)
455 value |= MAC_CTRL_DUPLX;
456 /* speed */
457 value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
458 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
459 MAC_CTRL_SPEED_SHIFT);
460 /* flow control */
461 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
462 /* PAD & CRC */
463 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
464 /* preamble length */
465 value |= (((u32) adapter->hw.preamble_len
466 & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
467 /* vlan */
468 if (adapter->vlgrp)
469 value |= MAC_CTRL_RMV_VLAN;
470 /* rx checksum
471 if (adapter->rx_csum)
472 value |= MAC_CTRL_RX_CHKSUM_EN;
473 */
474 /* filter mode */
475 value |= MAC_CTRL_BC_EN;
476 if (netdev->flags & IFF_PROMISC)
477 value |= MAC_CTRL_PROMIS_EN;
478 else if (netdev->flags & IFF_ALLMULTI)
479 value |= MAC_CTRL_MC_ALL_EN;
480 /* value |= MAC_CTRL_LOOPBACK; */
481 iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
482 }
483
484 /*
485 * atl1_set_mac - Change the Ethernet Address of the NIC
486 * @netdev: network interface device structure
487 * @p: pointer to an address structure
488 *
489 * Returns 0 on success, negative on failure
490 */
491 static int atl1_set_mac(struct net_device *netdev, void *p)
492 {
493 struct atl1_adapter *adapter = netdev_priv(netdev);
494 struct sockaddr *addr = p;
495
496 if (netif_running(netdev))
497 return -EBUSY;
498
499 if (!is_valid_ether_addr(addr->sa_data))
500 return -EADDRNOTAVAIL;
501
502 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
503 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
504
505 atl1_set_mac_addr(&adapter->hw);
506 return 0;
507 }
508
509 static u32 atl1_check_link(struct atl1_adapter *adapter)
510 {
511 struct atl1_hw *hw = &adapter->hw;
512 struct net_device *netdev = adapter->netdev;
513 u32 ret_val;
514 u16 speed, duplex, phy_data;
515 int reconfig = 0;
516
517 /* MII_BMSR must read twice */
518 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
519 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
520 if (!(phy_data & BMSR_LSTATUS)) { /* link down */
521 if (netif_carrier_ok(netdev)) { /* old link state: Up */
522 dev_info(&adapter->pdev->dev, "link is down\n");
523 adapter->link_speed = SPEED_0;
524 netif_carrier_off(netdev);
525 netif_stop_queue(netdev);
526 }
527 return ATL1_SUCCESS;
528 }
529
530 /* Link Up */
531 ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
532 if (ret_val)
533 return ret_val;
534
535 switch (hw->media_type) {
536 case MEDIA_TYPE_1000M_FULL:
537 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
538 reconfig = 1;
539 break;
540 case MEDIA_TYPE_100M_FULL:
541 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
542 reconfig = 1;
543 break;
544 case MEDIA_TYPE_100M_HALF:
545 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
546 reconfig = 1;
547 break;
548 case MEDIA_TYPE_10M_FULL:
549 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
550 reconfig = 1;
551 break;
552 case MEDIA_TYPE_10M_HALF:
553 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
554 reconfig = 1;
555 break;
556 }
557
558 /* link result is our setting */
559 if (!reconfig) {
560 if (adapter->link_speed != speed
561 || adapter->link_duplex != duplex) {
562 adapter->link_speed = speed;
563 adapter->link_duplex = duplex;
564 atl1_setup_mac_ctrl(adapter);
565 dev_info(&adapter->pdev->dev,
566 "%s link is up %d Mbps %s\n",
567 netdev->name, adapter->link_speed,
568 adapter->link_duplex == FULL_DUPLEX ?
569 "full duplex" : "half duplex");
570 }
571 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
572 netif_carrier_on(netdev);
573 netif_wake_queue(netdev);
574 }
575 return ATL1_SUCCESS;
576 }
577
578 /* change orignal link status */
579 if (netif_carrier_ok(netdev)) {
580 adapter->link_speed = SPEED_0;
581 netif_carrier_off(netdev);
582 netif_stop_queue(netdev);
583 }
584
585 if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
586 hw->media_type != MEDIA_TYPE_1000M_FULL) {
587 switch (hw->media_type) {
588 case MEDIA_TYPE_100M_FULL:
589 phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
590 MII_CR_RESET;
591 break;
592 case MEDIA_TYPE_100M_HALF:
593 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
594 break;
595 case MEDIA_TYPE_10M_FULL:
596 phy_data =
597 MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
598 break;
599 default: /* MEDIA_TYPE_10M_HALF: */
600 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
601 break;
602 }
603 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
604 return ATL1_SUCCESS;
605 }
606
607 /* auto-neg, insert timer to re-config phy */
608 if (!adapter->phy_timer_pending) {
609 adapter->phy_timer_pending = true;
610 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
611 }
612
613 return ATL1_SUCCESS;
614 }
615
616 static void atl1_check_for_link(struct atl1_adapter *adapter)
617 {
618 struct net_device *netdev = adapter->netdev;
619 u16 phy_data = 0;
620
621 spin_lock(&adapter->lock);
622 adapter->phy_timer_pending = false;
623 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
624 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
625 spin_unlock(&adapter->lock);
626
627 /* notify upper layer link down ASAP */
628 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
629 if (netif_carrier_ok(netdev)) { /* old link state: Up */
630 dev_info(&adapter->pdev->dev, "%s link is down\n",
631 netdev->name);
632 adapter->link_speed = SPEED_0;
633 netif_carrier_off(netdev);
634 netif_stop_queue(netdev);
635 }
636 }
637 schedule_work(&adapter->link_chg_task);
638 }
639
640 /*
641 * atl1_set_multi - Multicast and Promiscuous mode set
642 * @netdev: network interface device structure
643 *
644 * The set_multi entry point is called whenever the multicast address
645 * list or the network interface flags are updated. This routine is
646 * responsible for configuring the hardware for proper multicast,
647 * promiscuous mode, and all-multi behavior.
648 */
649 static void atl1_set_multi(struct net_device *netdev)
650 {
651 struct atl1_adapter *adapter = netdev_priv(netdev);
652 struct atl1_hw *hw = &adapter->hw;
653 struct dev_mc_list *mc_ptr;
654 u32 rctl;
655 u32 hash_value;
656
657 /* Check for Promiscuous and All Multicast modes */
658 rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
659 if (netdev->flags & IFF_PROMISC)
660 rctl |= MAC_CTRL_PROMIS_EN;
661 else if (netdev->flags & IFF_ALLMULTI) {
662 rctl |= MAC_CTRL_MC_ALL_EN;
663 rctl &= ~MAC_CTRL_PROMIS_EN;
664 } else
665 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
666
667 iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
668
669 /* clear the old settings from the multicast hash table */
670 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
671 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
672
673 /* compute mc addresses' hash value ,and put it into hash table */
674 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
675 hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
676 atl1_hash_set(hw, hash_value);
677 }
678 }
679
680 /*
681 * atl1_change_mtu - Change the Maximum Transfer Unit
682 * @netdev: network interface device structure
683 * @new_mtu: new value for maximum frame size
684 *
685 * Returns 0 on success, negative on failure
686 */
687 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
688 {
689 struct atl1_adapter *adapter = netdev_priv(netdev);
690 int old_mtu = netdev->mtu;
691 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
692
693 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
694 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
695 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
696 return -EINVAL;
697 }
698
699 adapter->hw.max_frame_size = max_frame;
700 adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
701 adapter->rx_buffer_len = (max_frame + 7) & ~7;
702 adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
703
704 netdev->mtu = new_mtu;
705 if ((old_mtu != new_mtu) && netif_running(netdev)) {
706 atl1_down(adapter);
707 atl1_up(adapter);
708 }
709
710 return 0;
711 }
712
713 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
714 {
715 u32 hi, lo, value;
716
717 /* RFD Flow Control */
718 value = adapter->rfd_ring.count;
719 hi = value / 16;
720 if (hi < 2)
721 hi = 2;
722 lo = value * 7 / 8;
723
724 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
725 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
726 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
727
728 /* RRD Flow Control */
729 value = adapter->rrd_ring.count;
730 lo = value / 16;
731 hi = value * 7 / 8;
732 if (lo < 2)
733 lo = 2;
734 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
735 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
736 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
737 }
738
739 static void set_flow_ctrl_new(struct atl1_hw *hw)
740 {
741 u32 hi, lo, value;
742
743 /* RXF Flow Control */
744 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
745 lo = value / 16;
746 if (lo < 192)
747 lo = 192;
748 hi = value * 7 / 8;
749 if (hi < lo)
750 hi = lo + 16;
751 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
752 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
753 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
754
755 /* RRD Flow Control */
756 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
757 lo = value / 8;
758 hi = value * 7 / 8;
759 if (lo < 2)
760 lo = 2;
761 if (hi < lo)
762 hi = lo + 3;
763 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
764 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
765 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
766 }
767
768 /*
769 * atl1_configure - Configure Transmit&Receive Unit after Reset
770 * @adapter: board private structure
771 *
772 * Configure the Tx /Rx unit of the MAC after a reset.
773 */
774 static u32 atl1_configure(struct atl1_adapter *adapter)
775 {
776 struct atl1_hw *hw = &adapter->hw;
777 u32 value;
778
779 /* clear interrupt status */
780 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
781
782 /* set MAC Address */
783 value = (((u32) hw->mac_addr[2]) << 24) |
784 (((u32) hw->mac_addr[3]) << 16) |
785 (((u32) hw->mac_addr[4]) << 8) |
786 (((u32) hw->mac_addr[5]));
787 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
788 value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
789 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
790
791 /* tx / rx ring */
792
793 /* HI base address */
794 iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
795 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
796 /* LO base address */
797 iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
798 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
799 iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
800 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
801 iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
802 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
803 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
804 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
805 iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
806 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
807
808 /* element count */
809 value = adapter->rrd_ring.count;
810 value <<= 16;
811 value += adapter->rfd_ring.count;
812 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
813 iowrite32(adapter->tpd_ring.count, hw->hw_addr +
814 REG_DESC_TPD_RING_SIZE);
815
816 /* Load Ptr */
817 iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
818
819 /* config Mailbox */
820 value = ((atomic_read(&adapter->tpd_ring.next_to_use)
821 & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
822 ((atomic_read(&adapter->rrd_ring.next_to_clean)
823 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
824 ((atomic_read(&adapter->rfd_ring.next_to_use)
825 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
826 iowrite32(value, hw->hw_addr + REG_MAILBOX);
827
828 /* config IPG/IFG */
829 value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
830 << MAC_IPG_IFG_IPGT_SHIFT) |
831 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
832 << MAC_IPG_IFG_MIFG_SHIFT) |
833 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
834 << MAC_IPG_IFG_IPGR1_SHIFT) |
835 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
836 << MAC_IPG_IFG_IPGR2_SHIFT);
837 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
838
839 /* config Half-Duplex Control */
840 value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
841 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
842 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
843 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
844 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
845 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
846 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
847 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
848
849 /* set Interrupt Moderator Timer */
850 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
851 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
852
853 /* set Interrupt Clear Timer */
854 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
855
856 /* set max frame size hw will accept */
857 iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
858
859 /* jumbo size & rrd retirement timer */
860 value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
861 << RXQ_JMBOSZ_TH_SHIFT) |
862 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
863 << RXQ_JMBO_LKAH_SHIFT) |
864 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
865 << RXQ_RRD_TIMER_SHIFT);
866 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
867
868 /* Flow Control */
869 switch (hw->dev_rev) {
870 case 0x8001:
871 case 0x9001:
872 case 0x9002:
873 case 0x9003:
874 set_flow_ctrl_old(adapter);
875 break;
876 default:
877 set_flow_ctrl_new(hw);
878 break;
879 }
880
881 /* config TXQ */
882 value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
883 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
884 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
885 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
886 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
887 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
888 TXQ_CTRL_EN;
889 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
890
891 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
892 value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
893 << TX_JUMBO_TASK_TH_SHIFT) |
894 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
895 << TX_TPD_MIN_IPG_SHIFT);
896 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
897
898 /* config RXQ */
899 value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
900 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
901 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
902 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
903 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
904 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
905 RXQ_CTRL_EN;
906 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
907
908 /* config DMA Engine */
909 value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
910 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
911 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
912 << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
913 DMA_CTRL_DMAW_EN;
914 value |= (u32) hw->dma_ord;
915 if (atl1_rcb_128 == hw->rcb_value)
916 value |= DMA_CTRL_RCB_VALUE;
917 iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
918
919 /* config CMB / SMB */
920 value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
921 hw->cmb_tpd : adapter->tpd_ring.count;
922 value <<= 16;
923 value |= hw->cmb_rrd;
924 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
925 value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
926 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
927 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
928
929 /* --- enable CMB / SMB */
930 value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
931 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
932
933 value = ioread32(adapter->hw.hw_addr + REG_ISR);
934 if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
935 value = 1; /* config failed */
936 else
937 value = 0;
938
939 /* clear all interrupt status */
940 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
941 iowrite32(0, adapter->hw.hw_addr + REG_ISR);
942 return value;
943 }
944
945 /*
946 * atl1_pcie_patch - Patch for PCIE module
947 */
948 static void atl1_pcie_patch(struct atl1_adapter *adapter)
949 {
950 u32 value;
951
952 /* much vendor magic here */
953 value = 0x6500;
954 iowrite32(value, adapter->hw.hw_addr + 0x12FC);
955 /* pcie flow control mode change */
956 value = ioread32(adapter->hw.hw_addr + 0x1008);
957 value |= 0x8000;
958 iowrite32(value, adapter->hw.hw_addr + 0x1008);
959 }
960
961 /*
962 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
963 * on PCI Command register is disable.
964 * The function enable this bit.
965 * Brackett, 2006/03/15
966 */
967 static void atl1_via_workaround(struct atl1_adapter *adapter)
968 {
969 unsigned long value;
970
971 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
972 if (value & PCI_COMMAND_INTX_DISABLE)
973 value &= ~PCI_COMMAND_INTX_DISABLE;
974 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
975 }
976
977 /*
978 * atl1_irq_enable - Enable default interrupt generation settings
979 * @adapter: board private structure
980 */
981 static void atl1_irq_enable(struct atl1_adapter *adapter)
982 {
983 iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
984 ioread32(adapter->hw.hw_addr + REG_IMR);
985 }
986
987 /*
988 * atl1_irq_disable - Mask off interrupt generation on the NIC
989 * @adapter: board private structure
990 */
991 static void atl1_irq_disable(struct atl1_adapter *adapter)
992 {
993 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
994 ioread32(adapter->hw.hw_addr + REG_IMR);
995 synchronize_irq(adapter->pdev->irq);
996 }
997
998 static void atl1_clear_phy_int(struct atl1_adapter *adapter)
999 {
1000 u16 phy_data;
1001 unsigned long flags;
1002
1003 spin_lock_irqsave(&adapter->lock, flags);
1004 atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
1005 spin_unlock_irqrestore(&adapter->lock, flags);
1006 }
1007
1008 static void atl1_inc_smb(struct atl1_adapter *adapter)
1009 {
1010 struct stats_msg_block *smb = adapter->smb.smb;
1011
1012 /* Fill out the OS statistics structure */
1013 adapter->soft_stats.rx_packets += smb->rx_ok;
1014 adapter->soft_stats.tx_packets += smb->tx_ok;
1015 adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1016 adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1017 adapter->soft_stats.multicast += smb->rx_mcast;
1018 adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
1019 smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
1020
1021 /* Rx Errors */
1022 adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
1023 smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
1024 smb->rx_rrd_ov + smb->rx_align_err);
1025 adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1026 adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1027 adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1028 adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1029 adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
1030 smb->rx_rxf_ov);
1031
1032 adapter->soft_stats.rx_pause += smb->rx_pause;
1033 adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1034 adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1035
1036 /* Tx Errors */
1037 adapter->soft_stats.tx_errors += (smb->tx_late_col +
1038 smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
1039 adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1040 adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1041 adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1042
1043 adapter->soft_stats.excecol += smb->tx_abort_col;
1044 adapter->soft_stats.deffer += smb->tx_defer;
1045 adapter->soft_stats.scc += smb->tx_1_col;
1046 adapter->soft_stats.mcc += smb->tx_2_col;
1047 adapter->soft_stats.latecol += smb->tx_late_col;
1048 adapter->soft_stats.tx_underun += smb->tx_underrun;
1049 adapter->soft_stats.tx_trunc += smb->tx_trunc;
1050 adapter->soft_stats.tx_pause += smb->tx_pause;
1051
1052 adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
1053 adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
1054 adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
1055 adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
1056 adapter->net_stats.multicast = adapter->soft_stats.multicast;
1057 adapter->net_stats.collisions = adapter->soft_stats.collisions;
1058 adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
1059 adapter->net_stats.rx_over_errors =
1060 adapter->soft_stats.rx_missed_errors;
1061 adapter->net_stats.rx_length_errors =
1062 adapter->soft_stats.rx_length_errors;
1063 adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1064 adapter->net_stats.rx_frame_errors =
1065 adapter->soft_stats.rx_frame_errors;
1066 adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1067 adapter->net_stats.rx_missed_errors =
1068 adapter->soft_stats.rx_missed_errors;
1069 adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
1070 adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1071 adapter->net_stats.tx_aborted_errors =
1072 adapter->soft_stats.tx_aborted_errors;
1073 adapter->net_stats.tx_window_errors =
1074 adapter->soft_stats.tx_window_errors;
1075 adapter->net_stats.tx_carrier_errors =
1076 adapter->soft_stats.tx_carrier_errors;
1077 }
1078
1079 /*
1080 * atl1_get_stats - Get System Network Statistics
1081 * @netdev: network interface device structure
1082 *
1083 * Returns the address of the device statistics structure.
1084 * The statistics are actually updated from the timer callback.
1085 */
1086 static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
1087 {
1088 struct atl1_adapter *adapter = netdev_priv(netdev);
1089 return &adapter->net_stats;
1090 }
1091
1092 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1093 {
1094 unsigned long flags;
1095 u32 tpd_next_to_use;
1096 u32 rfd_next_to_use;
1097 u32 rrd_next_to_clean;
1098 u32 value;
1099
1100 spin_lock_irqsave(&adapter->mb_lock, flags);
1101
1102 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1103 rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1104 rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1105
1106 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1107 MB_RFD_PROD_INDX_SHIFT) |
1108 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1109 MB_RRD_CONS_INDX_SHIFT) |
1110 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1111 MB_TPD_PROD_INDX_SHIFT);
1112 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1113
1114 spin_unlock_irqrestore(&adapter->mb_lock, flags);
1115 }
1116
1117 static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1118 struct rx_return_desc *rrd, u16 offset)
1119 {
1120 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1121
1122 while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1123 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1124 if (++rfd_ring->next_to_clean == rfd_ring->count) {
1125 rfd_ring->next_to_clean = 0;
1126 }
1127 }
1128 }
1129
1130 static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1131 struct rx_return_desc *rrd)
1132 {
1133 u16 num_buf;
1134
1135 num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1136 adapter->rx_buffer_len;
1137 if (rrd->num_buf == num_buf)
1138 /* clean alloc flag for bad rrd */
1139 atl1_clean_alloc_flag(adapter, rrd, num_buf);
1140 }
1141
1142 static void atl1_rx_checksum(struct atl1_adapter *adapter,
1143 struct rx_return_desc *rrd, struct sk_buff *skb)
1144 {
1145 struct pci_dev *pdev = adapter->pdev;
1146
1147 skb->ip_summed = CHECKSUM_NONE;
1148
1149 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1150 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1151 ERR_FLAG_CODE | ERR_FLAG_OV)) {
1152 adapter->hw_csum_err++;
1153 dev_printk(KERN_DEBUG, &pdev->dev,
1154 "rx checksum error\n");
1155 return;
1156 }
1157 }
1158
1159 /* not IPv4 */
1160 if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1161 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1162 return;
1163
1164 /* IPv4 packet */
1165 if (likely(!(rrd->err_flg &
1166 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1167 skb->ip_summed = CHECKSUM_UNNECESSARY;
1168 adapter->hw_csum_good++;
1169 return;
1170 }
1171
1172 /* IPv4, but hardware thinks its checksum is wrong */
1173 dev_printk(KERN_DEBUG, &pdev->dev,
1174 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
1175 rrd->pkt_flg, rrd->err_flg);
1176 skb->ip_summed = CHECKSUM_COMPLETE;
1177 skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
1178 adapter->hw_csum_err++;
1179 return;
1180 }
1181
1182 /*
1183 * atl1_alloc_rx_buffers - Replace used receive buffers
1184 * @adapter: address of board private structure
1185 */
1186 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1187 {
1188 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1189 struct pci_dev *pdev = adapter->pdev;
1190 struct page *page;
1191 unsigned long offset;
1192 struct atl1_buffer *buffer_info, *next_info;
1193 struct sk_buff *skb;
1194 u16 num_alloc = 0;
1195 u16 rfd_next_to_use, next_next;
1196 struct rx_free_desc *rfd_desc;
1197
1198 next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1199 if (++next_next == rfd_ring->count)
1200 next_next = 0;
1201 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1202 next_info = &rfd_ring->buffer_info[next_next];
1203
1204 while (!buffer_info->alloced && !next_info->alloced) {
1205 if (buffer_info->skb) {
1206 buffer_info->alloced = 1;
1207 goto next;
1208 }
1209
1210 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1211
1212 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1213 if (unlikely(!skb)) { /* Better luck next round */
1214 adapter->net_stats.rx_dropped++;
1215 break;
1216 }
1217
1218 /*
1219 * Make buffer alignment 2 beyond a 16 byte boundary
1220 * this will result in a 16 byte aligned IP header after
1221 * the 14 byte MAC header is removed
1222 */
1223 skb_reserve(skb, NET_IP_ALIGN);
1224
1225 buffer_info->alloced = 1;
1226 buffer_info->skb = skb;
1227 buffer_info->length = (u16) adapter->rx_buffer_len;
1228 page = virt_to_page(skb->data);
1229 offset = (unsigned long)skb->data & ~PAGE_MASK;
1230 buffer_info->dma = pci_map_page(pdev, page, offset,
1231 adapter->rx_buffer_len,
1232 PCI_DMA_FROMDEVICE);
1233 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1234 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1235 rfd_desc->coalese = 0;
1236
1237 next:
1238 rfd_next_to_use = next_next;
1239 if (unlikely(++next_next == rfd_ring->count))
1240 next_next = 0;
1241
1242 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1243 next_info = &rfd_ring->buffer_info[next_next];
1244 num_alloc++;
1245 }
1246
1247 if (num_alloc) {
1248 /*
1249 * Force memory writes to complete before letting h/w
1250 * know there are new descriptors to fetch. (Only
1251 * applicable for weak-ordered memory model archs,
1252 * such as IA-64).
1253 */
1254 wmb();
1255 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1256 }
1257 return num_alloc;
1258 }
1259
1260 static void atl1_intr_rx(struct atl1_adapter *adapter)
1261 {
1262 int i, count;
1263 u16 length;
1264 u16 rrd_next_to_clean;
1265 u32 value;
1266 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1267 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1268 struct atl1_buffer *buffer_info;
1269 struct rx_return_desc *rrd;
1270 struct sk_buff *skb;
1271
1272 count = 0;
1273
1274 rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1275
1276 while (1) {
1277 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1278 i = 1;
1279 if (likely(rrd->xsz.valid)) { /* packet valid */
1280 chk_rrd:
1281 /* check rrd status */
1282 if (likely(rrd->num_buf == 1))
1283 goto rrd_ok;
1284
1285 /* rrd seems to be bad */
1286 if (unlikely(i-- > 0)) {
1287 /* rrd may not be DMAed completely */
1288 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1289 "incomplete RRD DMA transfer\n");
1290 udelay(1);
1291 goto chk_rrd;
1292 }
1293 /* bad rrd */
1294 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1295 "bad RRD\n");
1296 /* see if update RFD index */
1297 if (rrd->num_buf > 1)
1298 atl1_update_rfd_index(adapter, rrd);
1299
1300 /* update rrd */
1301 rrd->xsz.valid = 0;
1302 if (++rrd_next_to_clean == rrd_ring->count)
1303 rrd_next_to_clean = 0;
1304 count++;
1305 continue;
1306 } else { /* current rrd still not be updated */
1307
1308 break;
1309 }
1310 rrd_ok:
1311 /* clean alloc flag for bad rrd */
1312 atl1_clean_alloc_flag(adapter, rrd, 0);
1313
1314 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1315 if (++rfd_ring->next_to_clean == rfd_ring->count)
1316 rfd_ring->next_to_clean = 0;
1317
1318 /* update rrd next to clean */
1319 if (++rrd_next_to_clean == rrd_ring->count)
1320 rrd_next_to_clean = 0;
1321 count++;
1322
1323 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1324 if (!(rrd->err_flg &
1325 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
1326 | ERR_FLAG_LEN))) {
1327 /* packet error, don't need upstream */
1328 buffer_info->alloced = 0;
1329 rrd->xsz.valid = 0;
1330 continue;
1331 }
1332 }
1333
1334 /* Good Receive */
1335 pci_unmap_page(adapter->pdev, buffer_info->dma,
1336 buffer_info->length, PCI_DMA_FROMDEVICE);
1337 buffer_info->dma = 0;
1338 skb = buffer_info->skb;
1339 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
1340
1341 skb_put(skb, length - ETH_FCS_LEN);
1342
1343 /* Receive Checksum Offload */
1344 atl1_rx_checksum(adapter, rrd, skb);
1345 skb->protocol = eth_type_trans(skb, adapter->netdev);
1346
1347 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
1348 u16 vlan_tag = (rrd->vlan_tag >> 4) |
1349 ((rrd->vlan_tag & 7) << 13) |
1350 ((rrd->vlan_tag & 8) << 9);
1351 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
1352 } else
1353 netif_rx(skb);
1354
1355 /* let protocol layer free skb */
1356 buffer_info->skb = NULL;
1357 buffer_info->alloced = 0;
1358 rrd->xsz.valid = 0;
1359
1360 adapter->netdev->last_rx = jiffies;
1361 }
1362
1363 atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
1364
1365 atl1_alloc_rx_buffers(adapter);
1366
1367 /* update mailbox ? */
1368 if (count) {
1369 u32 tpd_next_to_use;
1370 u32 rfd_next_to_use;
1371
1372 spin_lock(&adapter->mb_lock);
1373
1374 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1375 rfd_next_to_use =
1376 atomic_read(&adapter->rfd_ring.next_to_use);
1377 rrd_next_to_clean =
1378 atomic_read(&adapter->rrd_ring.next_to_clean);
1379 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1380 MB_RFD_PROD_INDX_SHIFT) |
1381 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1382 MB_RRD_CONS_INDX_SHIFT) |
1383 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1384 MB_TPD_PROD_INDX_SHIFT);
1385 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1386 spin_unlock(&adapter->mb_lock);
1387 }
1388 }
1389
1390 static void atl1_intr_tx(struct atl1_adapter *adapter)
1391 {
1392 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1393 struct atl1_buffer *buffer_info;
1394 u16 sw_tpd_next_to_clean;
1395 u16 cmb_tpd_next_to_clean;
1396
1397 sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1398 cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
1399
1400 while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
1401 struct tx_packet_desc *tpd;
1402
1403 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
1404 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
1405 if (buffer_info->dma) {
1406 pci_unmap_page(adapter->pdev, buffer_info->dma,
1407 buffer_info->length, PCI_DMA_TODEVICE);
1408 buffer_info->dma = 0;
1409 }
1410
1411 if (buffer_info->skb) {
1412 dev_kfree_skb_irq(buffer_info->skb);
1413 buffer_info->skb = NULL;
1414 }
1415 tpd->buffer_addr = 0;
1416 tpd->desc.data = 0;
1417
1418 if (++sw_tpd_next_to_clean == tpd_ring->count)
1419 sw_tpd_next_to_clean = 0;
1420 }
1421 atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
1422
1423 if (netif_queue_stopped(adapter->netdev)
1424 && netif_carrier_ok(adapter->netdev))
1425 netif_wake_queue(adapter->netdev);
1426 }
1427
1428 static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
1429 {
1430 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1431 u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1432 return ((next_to_clean > next_to_use) ?
1433 next_to_clean - next_to_use - 1 :
1434 tpd_ring->count + next_to_clean - next_to_use - 1);
1435 }
1436
1437 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1438 struct tso_param *tso)
1439 {
1440 /* We enter this function holding a spinlock. */
1441 u8 ipofst;
1442 int err;
1443
1444 if (skb_shinfo(skb)->gso_size) {
1445 if (skb_header_cloned(skb)) {
1446 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1447 if (unlikely(err))
1448 return err;
1449 }
1450
1451 if (skb->protocol == ntohs(ETH_P_IP)) {
1452 struct iphdr *iph = ip_hdr(skb);
1453
1454 iph->tot_len = 0;
1455 iph->check = 0;
1456 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1457 iph->daddr, 0, IPPROTO_TCP, 0);
1458 ipofst = skb_network_offset(skb);
1459 if (ipofst != ETH_HLEN) /* 802.3 frame */
1460 tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
1461
1462 tso->tsopl |= (iph->ihl &
1463 CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
1464 tso->tsopl |= (tcp_hdrlen(skb) &
1465 TSO_PARAM_TCPHDRLEN_MASK) <<
1466 TSO_PARAM_TCPHDRLEN_SHIFT;
1467 tso->tsopl |= (skb_shinfo(skb)->gso_size &
1468 TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
1469 tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
1470 tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
1471 tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
1472 return true;
1473 }
1474 }
1475 return false;
1476 }
1477
1478 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
1479 struct csum_param *csum)
1480 {
1481 u8 css, cso;
1482
1483 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1484 cso = skb_transport_offset(skb);
1485 css = cso + skb->csum_offset;
1486 if (unlikely(cso & 0x1)) {
1487 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1488 "payload offset not an even number\n");
1489 return -1;
1490 }
1491 csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
1492 CSUM_PARAM_PLOADOFFSET_SHIFT;
1493 csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
1494 CSUM_PARAM_XSUMOFFSET_SHIFT;
1495 csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
1496 return true;
1497 }
1498
1499 return true;
1500 }
1501
1502 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
1503 bool tcp_seg)
1504 {
1505 /* We enter this function holding a spinlock. */
1506 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1507 struct atl1_buffer *buffer_info;
1508 struct page *page;
1509 int first_buf_len = skb->len;
1510 unsigned long offset;
1511 unsigned int nr_frags;
1512 unsigned int f;
1513 u16 tpd_next_to_use;
1514 u16 proto_hdr_len;
1515 u16 len12;
1516
1517 first_buf_len -= skb->data_len;
1518 nr_frags = skb_shinfo(skb)->nr_frags;
1519 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1520 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1521 if (unlikely(buffer_info->skb))
1522 BUG();
1523 buffer_info->skb = NULL; /* put skb in last TPD */
1524
1525 if (tcp_seg) {
1526 /* TSO/GSO */
1527 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1528 buffer_info->length = proto_hdr_len;
1529 page = virt_to_page(skb->data);
1530 offset = (unsigned long)skb->data & ~PAGE_MASK;
1531 buffer_info->dma = pci_map_page(adapter->pdev, page,
1532 offset, proto_hdr_len,
1533 PCI_DMA_TODEVICE);
1534
1535 if (++tpd_next_to_use == tpd_ring->count)
1536 tpd_next_to_use = 0;
1537
1538 if (first_buf_len > proto_hdr_len) {
1539 int i, m;
1540
1541 len12 = first_buf_len - proto_hdr_len;
1542 m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
1543 ATL1_MAX_TX_BUF_LEN;
1544 for (i = 0; i < m; i++) {
1545 buffer_info =
1546 &tpd_ring->buffer_info[tpd_next_to_use];
1547 buffer_info->skb = NULL;
1548 buffer_info->length =
1549 (ATL1_MAX_TX_BUF_LEN >=
1550 len12) ? ATL1_MAX_TX_BUF_LEN : len12;
1551 len12 -= buffer_info->length;
1552 page = virt_to_page(skb->data +
1553 (proto_hdr_len +
1554 i * ATL1_MAX_TX_BUF_LEN));
1555 offset = (unsigned long)(skb->data +
1556 (proto_hdr_len +
1557 i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
1558 buffer_info->dma = pci_map_page(adapter->pdev,
1559 page, offset, buffer_info->length,
1560 PCI_DMA_TODEVICE);
1561 if (++tpd_next_to_use == tpd_ring->count)
1562 tpd_next_to_use = 0;
1563 }
1564 }
1565 } else {
1566 /* not TSO/GSO */
1567 buffer_info->length = first_buf_len;
1568 page = virt_to_page(skb->data);
1569 offset = (unsigned long)skb->data & ~PAGE_MASK;
1570 buffer_info->dma = pci_map_page(adapter->pdev, page,
1571 offset, first_buf_len, PCI_DMA_TODEVICE);
1572 if (++tpd_next_to_use == tpd_ring->count)
1573 tpd_next_to_use = 0;
1574 }
1575
1576 for (f = 0; f < nr_frags; f++) {
1577 struct skb_frag_struct *frag;
1578 u16 lenf, i, m;
1579
1580 frag = &skb_shinfo(skb)->frags[f];
1581 lenf = frag->size;
1582
1583 m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
1584 for (i = 0; i < m; i++) {
1585 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1586 if (unlikely(buffer_info->skb))
1587 BUG();
1588 buffer_info->skb = NULL;
1589 buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
1590 ATL1_MAX_TX_BUF_LEN : lenf;
1591 lenf -= buffer_info->length;
1592 buffer_info->dma = pci_map_page(adapter->pdev,
1593 frag->page,
1594 frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
1595 buffer_info->length, PCI_DMA_TODEVICE);
1596
1597 if (++tpd_next_to_use == tpd_ring->count)
1598 tpd_next_to_use = 0;
1599 }
1600 }
1601
1602 /* last tpd's buffer-info */
1603 buffer_info->skb = skb;
1604 }
1605
1606 static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
1607 union tpd_descr *descr)
1608 {
1609 /* We enter this function holding a spinlock. */
1610 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1611 int j;
1612 u32 val;
1613 struct atl1_buffer *buffer_info;
1614 struct tx_packet_desc *tpd;
1615 u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1616
1617 for (j = 0; j < count; j++) {
1618 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1619 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
1620 tpd->desc.csum.csumpu = descr->csum.csumpu;
1621 tpd->desc.csum.csumpl = descr->csum.csumpl;
1622 tpd->desc.tso.tsopu = descr->tso.tsopu;
1623 tpd->desc.tso.tsopl = descr->tso.tsopl;
1624 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1625 tpd->desc.data = descr->data;
1626 tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
1627 CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
1628
1629 val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
1630 TSO_PARAM_SEGMENT_MASK;
1631 if (val && !j)
1632 tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
1633
1634 if (j == (count - 1))
1635 tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
1636
1637 if (++tpd_next_to_use == tpd_ring->count)
1638 tpd_next_to_use = 0;
1639 }
1640 /*
1641 * Force memory writes to complete before letting h/w
1642 * know there are new descriptors to fetch. (Only
1643 * applicable for weak-ordered memory model archs,
1644 * such as IA-64).
1645 */
1646 wmb();
1647
1648 atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
1649 }
1650
1651 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1652 {
1653 struct atl1_adapter *adapter = netdev_priv(netdev);
1654 int len = skb->len;
1655 int tso;
1656 int count = 1;
1657 int ret_val;
1658 u32 val;
1659 union tpd_descr param;
1660 u16 frag_size;
1661 u16 vlan_tag;
1662 unsigned long flags;
1663 unsigned int nr_frags = 0;
1664 unsigned int mss = 0;
1665 unsigned int f;
1666 unsigned int proto_hdr_len;
1667
1668 len -= skb->data_len;
1669
1670 if (unlikely(skb->len == 0)) {
1671 dev_kfree_skb_any(skb);
1672 return NETDEV_TX_OK;
1673 }
1674
1675 param.data = 0;
1676 param.tso.tsopu = 0;
1677 param.tso.tsopl = 0;
1678 param.csum.csumpu = 0;
1679 param.csum.csumpl = 0;
1680
1681 /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
1682 nr_frags = skb_shinfo(skb)->nr_frags;
1683 for (f = 0; f < nr_frags; f++) {
1684 frag_size = skb_shinfo(skb)->frags[f].size;
1685 if (frag_size)
1686 count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
1687 ATL1_MAX_TX_BUF_LEN;
1688 }
1689
1690 /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
1691 mss = skb_shinfo(skb)->gso_size;
1692 if (mss) {
1693 if (skb->protocol == htons(ETH_P_IP)) {
1694 proto_hdr_len = (skb_transport_offset(skb) +
1695 tcp_hdrlen(skb));
1696 if (unlikely(proto_hdr_len > len)) {
1697 dev_kfree_skb_any(skb);
1698 return NETDEV_TX_OK;
1699 }
1700 /* need additional TPD ? */
1701 if (proto_hdr_len != len)
1702 count += (len - proto_hdr_len +
1703 ATL1_MAX_TX_BUF_LEN - 1) /
1704 ATL1_MAX_TX_BUF_LEN;
1705 }
1706 }
1707
1708 if (!spin_trylock_irqsave(&adapter->lock, flags)) {
1709 /* Can't get lock - tell upper layer to requeue */
1710 dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
1711 return NETDEV_TX_LOCKED;
1712 }
1713
1714 if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
1715 /* not enough descriptors */
1716 netif_stop_queue(netdev);
1717 spin_unlock_irqrestore(&adapter->lock, flags);
1718 dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
1719 return NETDEV_TX_BUSY;
1720 }
1721
1722 param.data = 0;
1723
1724 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
1725 vlan_tag = vlan_tx_tag_get(skb);
1726 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
1727 ((vlan_tag >> 9) & 0x8);
1728 param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
1729 param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
1730 CSUM_PARAM_VALAN_SHIFT;
1731 }
1732
1733 tso = atl1_tso(adapter, skb, ¶m.tso);
1734 if (tso < 0) {
1735 spin_unlock_irqrestore(&adapter->lock, flags);
1736 dev_kfree_skb_any(skb);
1737 return NETDEV_TX_OK;
1738 }
1739
1740 if (!tso) {
1741 ret_val = atl1_tx_csum(adapter, skb, ¶m.csum);
1742 if (ret_val < 0) {
1743 spin_unlock_irqrestore(&adapter->lock, flags);
1744 dev_kfree_skb_any(skb);
1745 return NETDEV_TX_OK;
1746 }
1747 }
1748
1749 val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
1750 CSUM_PARAM_SEGMENT_MASK;
1751 atl1_tx_map(adapter, skb, 1 == val);
1752 atl1_tx_queue(adapter, count, ¶m);
1753 netdev->trans_start = jiffies;
1754 spin_unlock_irqrestore(&adapter->lock, flags);
1755 atl1_update_mailbox(adapter);
1756 return NETDEV_TX_OK;
1757 }
1758
1759 /*
1760 * atl1_intr - Interrupt Handler
1761 * @irq: interrupt number
1762 * @data: pointer to a network interface device structure
1763 * @pt_regs: CPU registers structure
1764 */
1765 static irqreturn_t atl1_intr(int irq, void *data)
1766 {
1767 struct atl1_adapter *adapter = netdev_priv(data);
1768 u32 status;
1769 int max_ints = 10;
1770
1771 status = adapter->cmb.cmb->int_stats;
1772 if (!status)
1773 return IRQ_NONE;
1774
1775 do {
1776 /* clear CMB interrupt status at once */
1777 adapter->cmb.cmb->int_stats = 0;
1778
1779 if (status & ISR_GPHY) /* clear phy status */
1780 atl1_clear_phy_int(adapter);
1781
1782 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
1783 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
1784
1785 /* check if SMB intr */
1786 if (status & ISR_SMB)
1787 atl1_inc_smb(adapter);
1788
1789 /* check if PCIE PHY Link down */
1790 if (status & ISR_PHY_LINKDOWN) {
1791 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1792 "pcie phy link down %x\n", status);
1793 if (netif_running(adapter->netdev)) { /* reset MAC */
1794 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1795 schedule_work(&adapter->pcie_dma_to_rst_task);
1796 return IRQ_HANDLED;
1797 }
1798 }
1799
1800 /* check if DMA read/write error ? */
1801 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1802 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1803 "pcie DMA r/w error (status = 0x%x)\n",
1804 status);
1805 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1806 schedule_work(&adapter->pcie_dma_to_rst_task);
1807 return IRQ_HANDLED;
1808 }
1809
1810 /* link event */
1811 if (status & ISR_GPHY) {
1812 adapter->soft_stats.tx_carrier_errors++;
1813 atl1_check_for_link(adapter);
1814 }
1815
1816 /* transmit event */
1817 if (status & ISR_CMB_TX)
1818 atl1_intr_tx(adapter);
1819
1820 /* rx exception */
1821 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
1822 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
1823 ISR_HOST_RRD_OV | ISR_CMB_RX))) {
1824 if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
1825 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
1826 ISR_HOST_RRD_OV))
1827 dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1828 "rx exception, ISR = 0x%x\n", status);
1829 atl1_intr_rx(adapter);
1830 }
1831
1832 if (--max_ints < 0)
1833 break;
1834
1835 } while ((status = adapter->cmb.cmb->int_stats));
1836
1837 /* re-enable Interrupt */
1838 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
1839 return IRQ_HANDLED;
1840 }
1841
1842 /*
1843 * atl1_watchdog - Timer Call-back
1844 * @data: pointer to netdev cast into an unsigned long
1845 */
1846 static void atl1_watchdog(unsigned long data)
1847 {
1848 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1849
1850 /* Reset the timer */
1851 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1852 }
1853
1854 /*
1855 * atl1_phy_config - Timer Call-back
1856 * @data: pointer to netdev cast into an unsigned long
1857 */
1858 static void atl1_phy_config(unsigned long data)
1859 {
1860 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1861 struct atl1_hw *hw = &adapter->hw;
1862 unsigned long flags;
1863
1864 spin_lock_irqsave(&adapter->lock, flags);
1865 adapter->phy_timer_pending = false;
1866 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1867 atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
1868 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
1869 spin_unlock_irqrestore(&adapter->lock, flags);
1870 }
1871
1872 /*
1873 * atl1_tx_timeout - Respond to a Tx Hang
1874 * @netdev: network interface device structure
1875 */
1876 static void atl1_tx_timeout(struct net_device *netdev)
1877 {
1878 struct atl1_adapter *adapter = netdev_priv(netdev);
1879 /* Do the reset outside of interrupt context */
1880 schedule_work(&adapter->tx_timeout_task);
1881 }
1882
1883 /*
1884 * Orphaned vendor comment left intact here:
1885 * <vendor comment>
1886 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
1887 * will assert. We do soft reset <0x1400=1> according
1888 * with the SPEC. BUT, it seemes that PCIE or DMA
1889 * state-machine will not be reset. DMAR_TO_INT will
1890 * assert again and again.
1891 * </vendor comment>
1892 */
1893 static void atl1_tx_timeout_task(struct work_struct *work)
1894 {
1895 struct atl1_adapter *adapter =
1896 container_of(work, struct atl1_adapter, tx_timeout_task);
1897 struct net_device *netdev = adapter->netdev;
1898
1899 netif_device_detach(netdev);
1900 atl1_down(adapter);
1901 atl1_up(adapter);
1902 netif_device_attach(netdev);
1903 }
1904
1905 /*
1906 * atl1_link_chg_task - deal with link change event Out of interrupt context
1907 */
1908 static void atl1_link_chg_task(struct work_struct *work)
1909 {
1910 struct atl1_adapter *adapter =
1911 container_of(work, struct atl1_adapter, link_chg_task);
1912 unsigned long flags;
1913
1914 spin_lock_irqsave(&adapter->lock, flags);
1915 atl1_check_link(adapter);
1916 spin_unlock_irqrestore(&adapter->lock, flags);
1917 }
1918
1919 static void atl1_vlan_rx_register(struct net_device *netdev,
1920 struct vlan_group *grp)
1921 {
1922 struct atl1_adapter *adapter = netdev_priv(netdev);
1923 unsigned long flags;
1924 u32 ctrl;
1925
1926 spin_lock_irqsave(&adapter->lock, flags);
1927 /* atl1_irq_disable(adapter); */
1928 adapter->vlgrp = grp;
1929
1930 if (grp) {
1931 /* enable VLAN tag insert/strip */
1932 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1933 ctrl |= MAC_CTRL_RMV_VLAN;
1934 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1935 } else {
1936 /* disable VLAN tag insert/strip */
1937 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1938 ctrl &= ~MAC_CTRL_RMV_VLAN;
1939 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1940 }
1941
1942 /* atl1_irq_enable(adapter); */
1943 spin_unlock_irqrestore(&adapter->lock, flags);
1944 }
1945
1946 static void atl1_restore_vlan(struct atl1_adapter *adapter)
1947 {
1948 atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1949 }
1950
1951 int atl1_reset(struct atl1_adapter *adapter)
1952 {
1953 int ret;
1954
1955 ret = atl1_reset_hw(&adapter->hw);
1956 if (ret != ATL1_SUCCESS)
1957 return ret;
1958 return atl1_init_hw(&adapter->hw);
1959 }
1960
1961 s32 atl1_up(struct atl1_adapter *adapter)
1962 {
1963 struct net_device *netdev = adapter->netdev;
1964 int err;
1965 int irq_flags = IRQF_SAMPLE_RANDOM;
1966
1967 /* hardware has been reset, we need to reload some things */
1968 atl1_set_multi(netdev);
1969 atl1_init_ring_ptrs(adapter);
1970 atl1_restore_vlan(adapter);
1971 err = atl1_alloc_rx_buffers(adapter);
1972 if (unlikely(!err)) /* no RX BUFFER allocated */
1973 return -ENOMEM;
1974
1975 if (unlikely(atl1_configure(adapter))) {
1976 err = -EIO;
1977 goto err_up;
1978 }
1979
1980 err = pci_enable_msi(adapter->pdev);
1981 if (err) {
1982 dev_info(&adapter->pdev->dev,
1983 "Unable to enable MSI: %d\n", err);
1984 irq_flags |= IRQF_SHARED;
1985 }
1986
1987 err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
1988 netdev->name, netdev);
1989 if (unlikely(err))
1990 goto err_up;
1991
1992 mod_timer(&adapter->watchdog_timer, jiffies);
1993 atl1_irq_enable(adapter);
1994 atl1_check_link(adapter);
1995 return 0;
1996
1997 err_up:
1998 pci_disable_msi(adapter->pdev);
1999 /* free rx_buffers */
2000 atl1_clean_rx_ring(adapter);
2001 return err;
2002 }
2003
2004 void atl1_down(struct atl1_adapter *adapter)
2005 {
2006 struct net_device *netdev = adapter->netdev;
2007
2008 del_timer_sync(&adapter->watchdog_timer);
2009 del_timer_sync(&adapter->phy_config_timer);
2010 adapter->phy_timer_pending = false;
2011
2012 atl1_irq_disable(adapter);
2013 free_irq(adapter->pdev->irq, netdev);
2014 pci_disable_msi(adapter->pdev);
2015 atl1_reset_hw(&adapter->hw);
2016 adapter->cmb.cmb->int_stats = 0;
2017
2018 adapter->link_speed = SPEED_0;
2019 adapter->link_duplex = -1;
2020 netif_carrier_off(netdev);
2021 netif_stop_queue(netdev);
2022
2023 atl1_clean_tx_ring(adapter);
2024 atl1_clean_rx_ring(adapter);
2025 }
2026
2027 /*
2028 * atl1_open - Called when a network interface is made active
2029 * @netdev: network interface device structure
2030 *
2031 * Returns 0 on success, negative value on failure
2032 *
2033 * The open entry point is called when a network interface is made
2034 * active by the system (IFF_UP). At this point all resources needed
2035 * for transmit and receive operations are allocated, the interrupt
2036 * handler is registered with the OS, the watchdog timer is started,
2037 * and the stack is notified that the interface is ready.
2038 */
2039 static int atl1_open(struct net_device *netdev)
2040 {
2041 struct atl1_adapter *adapter = netdev_priv(netdev);
2042 int err;
2043
2044 /* allocate transmit descriptors */
2045 err = atl1_setup_ring_resources(adapter);
2046 if (err)
2047 return err;
2048
2049 err = atl1_up(adapter);
2050 if (err)
2051 goto err_up;
2052
2053 return 0;
2054
2055 err_up:
2056 atl1_reset(adapter);
2057 return err;
2058 }
2059
2060 /*
2061 * atl1_close - Disables a network interface
2062 * @netdev: network interface device structure
2063 *
2064 * Returns 0, this is not allowed to fail
2065 *
2066 * The close entry point is called when an interface is de-activated
2067 * by the OS. The hardware is still under the drivers control, but
2068 * needs to be disabled. A global MAC reset is issued to stop the
2069 * hardware, and all transmit and receive resources are freed.
2070 */
2071 static int atl1_close(struct net_device *netdev)
2072 {
2073 struct atl1_adapter *adapter = netdev_priv(netdev);
2074 atl1_down(adapter);
2075 atl1_free_ring_resources(adapter);
2076 return 0;
2077 }
2078
2079 #ifdef CONFIG_PM
2080 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2081 {
2082 struct net_device *netdev = pci_get_drvdata(pdev);
2083 struct atl1_adapter *adapter = netdev_priv(netdev);
2084 struct atl1_hw *hw = &adapter->hw;
2085 u32 ctrl = 0;
2086 u32 wufc = adapter->wol;
2087
2088 netif_device_detach(netdev);
2089 if (netif_running(netdev))
2090 atl1_down(adapter);
2091
2092 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2093 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2094 if (ctrl & BMSR_LSTATUS)
2095 wufc &= ~ATL1_WUFC_LNKC;
2096
2097 /* reduce speed to 10/100M */
2098 if (wufc) {
2099 atl1_phy_enter_power_saving(hw);
2100 /* if resume, let driver to re- setup link */
2101 hw->phy_configured = false;
2102 atl1_set_mac_addr(hw);
2103 atl1_set_multi(netdev);
2104
2105 ctrl = 0;
2106 /* turn on magic packet wol */
2107 if (wufc & ATL1_WUFC_MAG)
2108 ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2109
2110 /* turn on Link change WOL */
2111 if (wufc & ATL1_WUFC_LNKC)
2112 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2113 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2114
2115 /* turn on all-multi mode if wake on multicast is enabled */
2116 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2117 ctrl &= ~MAC_CTRL_DBG;
2118 ctrl &= ~MAC_CTRL_PROMIS_EN;
2119 if (wufc & ATL1_WUFC_MC)
2120 ctrl |= MAC_CTRL_MC_ALL_EN;
2121 else
2122 ctrl &= ~MAC_CTRL_MC_ALL_EN;
2123
2124 /* turn on broadcast mode if wake on-BC is enabled */
2125 if (wufc & ATL1_WUFC_BC)
2126 ctrl |= MAC_CTRL_BC_EN;
2127 else
2128 ctrl &= ~MAC_CTRL_BC_EN;
2129
2130 /* enable RX */
2131 ctrl |= MAC_CTRL_RX_EN;
2132 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2133 pci_enable_wake(pdev, PCI_D3hot, 1);
2134 pci_enable_wake(pdev, PCI_D3cold, 1);
2135 } else {
2136 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2137 pci_enable_wake(pdev, PCI_D3hot, 0);
2138 pci_enable_wake(pdev, PCI_D3cold, 0);
2139 }
2140
2141 pci_save_state(pdev);
2142 pci_disable_device(pdev);
2143
2144 pci_set_power_state(pdev, PCI_D3hot);
2145
2146 return 0;
2147 }
2148
2149 static int atl1_resume(struct pci_dev *pdev)
2150 {
2151 struct net_device *netdev = pci_get_drvdata(pdev);
2152 struct atl1_adapter *adapter = netdev_priv(netdev);
2153 u32 ret_val;
2154
2155 pci_set_power_state(pdev, 0);
2156 pci_restore_state(pdev);
2157
2158 ret_val = pci_enable_device(pdev);
2159 pci_enable_wake(pdev, PCI_D3hot, 0);
2160 pci_enable_wake(pdev, PCI_D3cold, 0);
2161
2162 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2163 atl1_reset(adapter);
2164
2165 if (netif_running(netdev))
2166 atl1_up(adapter);
2167 netif_device_attach(netdev);
2168
2169 atl1_via_workaround(adapter);
2170
2171 return 0;
2172 }
2173 #else
2174 #define atl1_suspend NULL
2175 #define atl1_resume NULL
2176 #endif
2177
2178 #ifdef CONFIG_NET_POLL_CONTROLLER
2179 static void atl1_poll_controller(struct net_device *netdev)
2180 {
2181 disable_irq(netdev->irq);
2182 atl1_intr(netdev->irq, netdev);
2183 enable_irq(netdev->irq);
2184 }
2185 #endif
2186
2187 /*
2188 * atl1_probe - Device Initialization Routine
2189 * @pdev: PCI device information struct
2190 * @ent: entry in atl1_pci_tbl
2191 *
2192 * Returns 0 on success, negative on failure
2193 *
2194 * atl1_probe initializes an adapter identified by a pci_dev structure.
2195 * The OS initialization, configuring of the adapter private structure,
2196 * and a hardware reset occur.
2197 */
2198 static int __devinit atl1_probe(struct pci_dev *pdev,
2199 const struct pci_device_id *ent)
2200 {
2201 struct net_device *netdev;
2202 struct atl1_adapter *adapter;
2203 static int cards_found = 0;
2204 int err;
2205
2206 err = pci_enable_device(pdev);
2207 if (err)
2208 return err;
2209
2210 /*
2211 * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2212 * shared register for the high 32 bits, so only a single, aligned,
2213 * 4 GB physical address range can be used at a time.
2214 *
2215 * Supporting 64-bit DMA on this hardware is more trouble than it's
2216 * worth. It is far easier to limit to 32-bit DMA than update
2217 * various kernel subsystems to support the mechanics required by a
2218 * fixed-high-32-bit system.
2219 */
2220 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2221 if (err) {
2222 dev_err(&pdev->dev, "no usable DMA configuration\n");
2223 goto err_dma;
2224 }
2225 /* Mark all PCI regions associated with PCI device
2226 * pdev as being reserved by owner atl1_driver_name
2227 */
2228 err = pci_request_regions(pdev, atl1_driver_name);
2229 if (err)
2230 goto err_request_regions;
2231
2232 /* Enables bus-mastering on the device and calls
2233 * pcibios_set_master to do the needed arch specific settings
2234 */
2235 pci_set_master(pdev);
2236
2237 netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2238 if (!netdev) {
2239 err = -ENOMEM;
2240 goto err_alloc_etherdev;
2241 }
2242 SET_NETDEV_DEV(netdev, &pdev->dev);
2243
2244 pci_set_drvdata(pdev, netdev);
2245 adapter = netdev_priv(netdev);
2246 adapter->netdev = netdev;
2247 adapter->pdev = pdev;
2248 adapter->hw.back = adapter;
2249
2250 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2251 if (!adapter->hw.hw_addr) {
2252 err = -EIO;
2253 goto err_pci_iomap;
2254 }
2255 /* get device revision number */
2256 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2257 (REG_MASTER_CTRL + 2));
2258 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
2259
2260 /* set default ring resource counts */
2261 adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2262 adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2263
2264 adapter->mii.dev = netdev;
2265 adapter->mii.mdio_read = mdio_read;
2266 adapter->mii.mdio_write = mdio_write;
2267 adapter->mii.phy_id_mask = 0x1f;
2268 adapter->mii.reg_num_mask = 0x1f;
2269
2270 netdev->open = &atl1_open;
2271 netdev->stop = &atl1_close;
2272 netdev->hard_start_xmit = &atl1_xmit_frame;
2273 netdev->get_stats = &atl1_get_stats;
2274 netdev->set_multicast_list = &atl1_set_multi;
2275 netdev->set_mac_address = &atl1_set_mac;
2276 netdev->change_mtu = &atl1_change_mtu;
2277 netdev->do_ioctl = &atl1_ioctl;
2278 netdev->tx_timeout = &atl1_tx_timeout;
2279 netdev->watchdog_timeo = 5 * HZ;
2280 #ifdef CONFIG_NET_POLL_CONTROLLER
2281 netdev->poll_controller = atl1_poll_controller;
2282 #endif
2283 netdev->vlan_rx_register = atl1_vlan_rx_register;
2284
2285 netdev->ethtool_ops = &atl1_ethtool_ops;
2286 adapter->bd_number = cards_found;
2287
2288 /* setup the private structure */
2289 err = atl1_sw_init(adapter);
2290 if (err)
2291 goto err_common;
2292
2293 netdev->features = NETIF_F_HW_CSUM;
2294 netdev->features |= NETIF_F_SG;
2295 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2296
2297 /*
2298 * FIXME - Until tso performance gets fixed, disable the feature.
2299 * Enable it with ethtool -K if desired.
2300 */
2301 /* netdev->features |= NETIF_F_TSO; */
2302
2303 netdev->features |= NETIF_F_LLTX;
2304
2305 /*
2306 * patch for some L1 of old version,
2307 * the final version of L1 may not need these
2308 * patches
2309 */
2310 /* atl1_pcie_patch(adapter); */
2311
2312 /* really reset GPHY core */
2313 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2314
2315 /*
2316 * reset the controller to
2317 * put the device in a known good starting state
2318 */
2319 if (atl1_reset_hw(&adapter->hw)) {
2320 err = -EIO;
2321 goto err_common;
2322 }
2323
2324 /* copy the MAC address out of the EEPROM */
2325 atl1_read_mac_addr(&adapter->hw);
2326 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2327
2328 if (!is_valid_ether_addr(netdev->dev_addr)) {
2329 err = -EIO;
2330 goto err_common;
2331 }
2332
2333 atl1_check_options(adapter);
2334
2335 /* pre-init the MAC, and setup link */
2336 err = atl1_init_hw(&adapter->hw);
2337 if (err) {
2338 err = -EIO;
2339 goto err_common;
2340 }
2341
2342 atl1_pcie_patch(adapter);
2343 /* assume we have no link for now */
2344 netif_carrier_off(netdev);
2345 netif_stop_queue(netdev);
2346
2347 init_timer(&adapter->watchdog_timer);
2348 adapter->watchdog_timer.function = &atl1_watchdog;
2349 adapter->watchdog_timer.data = (unsigned long)adapter;
2350
2351 init_timer(&adapter->phy_config_timer);
2352 adapter->phy_config_timer.function = &atl1_phy_config;
2353 adapter->phy_config_timer.data = (unsigned long)adapter;
2354 adapter->phy_timer_pending = false;
2355
2356 INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2357
2358 INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
2359
2360 INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2361
2362 err = register_netdev(netdev);
2363 if (err)
2364 goto err_common;
2365
2366 cards_found++;
2367 atl1_via_workaround(adapter);
2368 return 0;
2369
2370 err_common:
2371 pci_iounmap(pdev, adapter->hw.hw_addr);
2372 err_pci_iomap:
2373 free_netdev(netdev);
2374 err_alloc_etherdev:
2375 pci_release_regions(pdev);
2376 err_dma:
2377 err_request_regions:
2378 pci_disable_device(pdev);
2379 return err;
2380 }
2381
2382 /*
2383 * atl1_remove - Device Removal Routine
2384 * @pdev: PCI device information struct
2385 *
2386 * atl1_remove is called by the PCI subsystem to alert the driver
2387 * that it should release a PCI device. The could be caused by a
2388 * Hot-Plug event, or because the driver is going to be removed from
2389 * memory.
2390 */
2391 static void __devexit atl1_remove(struct pci_dev *pdev)
2392 {
2393 struct net_device *netdev = pci_get_drvdata(pdev);
2394 struct atl1_adapter *adapter;
2395 /* Device not available. Return. */
2396 if (!netdev)
2397 return;
2398
2399 adapter = netdev_priv(netdev);
2400
2401 /* Some atl1 boards lack persistent storage for their MAC, and get it
2402 * from the BIOS during POST. If we've been messing with the MAC
2403 * address, we need to save the permanent one.
2404 */
2405 if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2406 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
2407 ETH_ALEN);
2408 atl1_set_mac_addr(&adapter->hw);
2409 }
2410
2411 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2412 unregister_netdev(netdev);
2413 pci_iounmap(pdev, adapter->hw.hw_addr);
2414 pci_release_regions(pdev);
2415 free_netdev(netdev);
2416 pci_disable_device(pdev);
2417 }
2418
2419 static struct pci_driver atl1_driver = {
2420 .name = atl1_driver_name,
2421 .id_table = atl1_pci_tbl,
2422 .probe = atl1_probe,
2423 .remove = __devexit_p(atl1_remove),
2424 .suspend = atl1_suspend,
2425 .resume = atl1_resume
2426 };
2427
2428 /*
2429 * atl1_exit_module - Driver Exit Cleanup Routine
2430 *
2431 * atl1_exit_module is called just before the driver is removed
2432 * from memory.
2433 */
2434 static void __exit atl1_exit_module(void)
2435 {
2436 pci_unregister_driver(&atl1_driver);
2437 }
2438
2439 /*
2440 * atl1_init_module - Driver Registration Routine
2441 *
2442 * atl1_init_module is the first routine called when the driver is
2443 * loaded. All it does is register with the PCI subsystem.
2444 */
2445 static int __init atl1_init_module(void)
2446 {
2447 return pci_register_driver(&atl1_driver);
2448 }
2449
2450 module_init(atl1_init_module);
2451 module_exit(atl1_exit_module);
2452
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